Changeset 8 for trunk/hal/tsar_mips32/hal_remote.c
- Timestamp:
- Apr 26, 2017, 2:20:47 PM (7 years ago)
- File:
-
- 1 edited
-
trunk/hal/tsar_mips32/hal_remote.c (modified) (13 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/hal/tsar_mips32/hal_remote.c
r1 r8 32 32 uint32_t cxy = (uint32_t)GET_CXY( xp ); 33 33 34 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 35 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 36 "sb %0, 0(%1) \n" /* *paddr <= value */ 37 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 38 "sync \n" 39 : 40 : "r" (data), "r" (ptr), "r" (cxy) 41 : "$15" ); 34 asm volatile( 35 ".set noreorder \n" 36 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 37 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 38 "sb %0, 0(%1) \n" /* *paddr <= value */ 39 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 40 "sync \n" 41 ".set reorder \n" 42 : : "r" (data), "r" (ptr), "r" (cxy) : "$15" ); 42 43 } 43 44 … … 50 51 51 52 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 52 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */53 "sw %0, 0(%1) \n" /* *paddr <= value */54 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */55 "sync \n"56 :57 : "r" (data), "r" (ptr), "r" (cxy)58 53 ".set noreorder \n" 54 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 55 "sw %0, 0(%1) \n" /* *paddr <= value */ 56 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 57 "sync \n" 58 ".set reorder \n" 59 : : "r" (data), "r" (ptr), "r" (cxy) : "$15" ); 59 60 } 60 61 … … 69 70 uint32_t data_msb = (uint32_t)(data>>32); 70 71 71 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 72 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 73 "sw %0, 0(%2) \n" /* *paddr <= lsb */ 74 "sw %1, 4(%2) \n" /* *(paddr+4) <= msb */ 75 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 76 "sync \n" 77 : 78 : "r" (data_lsb), "r" (data_msb), "r" (ptr), "r" (cxy) 79 : "$15" ); 72 asm volatile( 73 ".set noreorder \n" 74 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 75 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 76 "sw %0, 0(%2) \n" /* *paddr <= lsb */ 77 "sw %1, 4(%2) \n" /* *(paddr+4) <= msb */ 78 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 79 "sync \n" 80 ".set reorder \n" 81 : : "r" (data_lsb), "r" (data_msb), "r" (ptr), "r" (cxy) : "$15" ); 80 82 } 81 83 … … 94 96 uint32_t cxy = (uint32_t)GET_CXY( xp ); 95 97 96 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 97 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 98 "lb %0, 0(%1) \n" /* data <= *paddr */ 99 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 100 : "=r" (data) 101 : "r" (ptr), "r" (cxy) 102 : "$15" ); 98 asm volatile( 99 ".set noreorder \n" 100 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 101 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 102 "lb %0, 0(%1) \n" /* data <= *paddr */ 103 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 104 ".set reorder \n" 105 : "=r" (data) : "r" (ptr), "r" (cxy) : "$15" ); 103 106 104 107 return ( data ); … … 112 115 uint32_t cxy = (uint32_t)GET_CXY( xp ); 113 116 114 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 115 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 116 "lw %0, 0(%1) \n" /* data <= *paddr */ 117 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 118 : "=r" (data) 119 : "r" (ptr), "r" (cxy) 120 : "$15" ); 117 asm volatile( 118 ".set noreorder \n" 119 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 120 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 121 "lw %0, 0(%1) \n" /* data <= *paddr */ 122 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 123 ".set reorder \n" 124 : "=r" (data) : "r" (ptr), "r" (cxy) : "$15" ); 121 125 122 126 return ( data ); … … 131 135 uint32_t cxy = (uint32_t)GET_CXY( xp ); 132 136 133 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 134 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 135 "lw %0, 0(%2) \n" /* data_lsb <= *paddr */ 136 "lw %1, 4(%2) \n" /* data_msb <= *paddr+4 */ 137 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 138 : "=r" (data_lsb), "=r"(data_msb) 139 : "r" (ptr), "r" (cxy) 140 : "$15" ); 137 asm volatile( 138 ".set noreorder \n" 139 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 140 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 141 "lw %0, 0(%2) \n" /* data_lsb <= *paddr */ 142 "lw %1, 4(%2) \n" /* data_msb <= *paddr+4 */ 143 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 144 ".set reorder \n" 145 : "=r" (data_lsb), "=r"(data_msb) : "r" (ptr), "r" (cxy) : "$15" ); 141 146 142 147 return ( (((uint64_t)data_msb)<<32) + (((uint64_t)data_lsb)) ); … … 157 162 uint32_t cxy = (uint32_t)GET_CXY( xp ); 158 163 159 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 160 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 161 "ll %0, 0(%1) \n" /* data <= *paddr */ 162 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 163 : "=r" (data) 164 : "r" (ptr), "r" (cxy) 165 : "$15" ); 164 asm volatile( 165 ".set noreorder \n" 166 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 167 "mtc2 %2, $24 \n" /* PADDR_EXT <= cxy */ 168 "ll %0, 0(%1) \n" /* data <= *paddr */ 169 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 170 ".set reorder \n" 171 : "=r" (data) : "r" (ptr), "r" (cxy) : "$15" ); 166 172 167 173 return ( data ); … … 177 183 uint32_t cxy = (uint32_t)GET_CXY( xp ); 178 184 179 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 180 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 181 "or $8, $0, %3 \n" /* $8 <= new */ 182 "ll $3, 0(%1) \n" /* $3 <= *paddr */ 183 "bne $3, %2, 1f \n" /* if (new != old) */ 184 "li $7, 0 \n" /* $7 <= 0 */ 185 "sc $8, (%1) \n" /* *paddr <= new */ 186 "or $7, $8, $0 \n" /* $7 <= new */ 187 "sync \n" 188 "1: \n" 189 "or %0, $7, $0 \n" /* isAtomic <= $7 */ 190 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 191 : "=&r" (isAtomic) 192 : "r" (ptr), "r" (old) , "r" (new), "r" (cxy) 193 : "$3", "$7", "$8", "$15" ); 185 asm volatile( 186 ".set noreorder \n" 187 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 188 "mtc2 %4, $24 \n" /* PADDR_EXT <= cxy */ 189 "or $8, $0, %3 \n" /* $8 <= new */ 190 "ll $3, 0(%1) \n" /* $3 <= *paddr */ 191 "bne $3, %2, 1f \n" /* if ($3 != old) */ 192 "li $7, 0 \n" /* $7 <= 0 */ 193 "sc $8, (%1) \n" /* *paddr <= new */ 194 "or $7, $8, $0 \n" /* $7 <= atomic */ 195 "sync \n" 196 "1: \n" 197 "or %0, $7, $0 \n" /* isAtomic <= $7 */ 198 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 199 ".set reorder \n" 200 : "=&r" (isAtomic) : "r" (ptr), "r" (old) , "r" (new), "r" (cxy) 201 : "$3", "$7", "$8", "$15" ); 194 202 195 203 return isAtomic; … … 204 212 uint32_t cxy = (uint32_t)GET_CXY( xp ); 205 213 206 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 207 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 208 "1: \n" 209 "ll %0, (%1) \n" /* current <= *paddr */ 210 "addu $3, %0, %2 \n" /* $3 <= current + incr */ 211 "sc $3, (%1) \n" /* *paddr <= $3 */ 212 "beq $3, $0, 1b \n" /* retry if failure */ 213 "nop \n" 214 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 215 : "=&r" (current) 216 : "r" (ptr), "r" (incr), "r" (cxy) 217 : "$3", "$15" ); 214 asm volatile( 215 ".set noreorder \n" 216 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 217 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 218 "1: \n" 219 "ll %0, (%1) \n" /* current <= *paddr */ 220 "addu $3, %0, %2 \n" /* $3 <= current + incr */ 221 "sc $3, (%1) \n" /* *paddr <= $3 */ 222 "beq $3, $0, 1b \n" /* retry if failure */ 223 "nop \n" 224 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 225 ".set reorder \n" 226 : "=&r" (current) : "r" (ptr), "r" (incr), "r" (cxy) : "$3", "$15" ); 218 227 219 228 return current; … … 228 237 uint32_t cxy = (uint32_t)GET_CXY( xp ); 229 238 230 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 231 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 232 "1: \n" 233 "ll %0, (%1) \n" /* current <= *paddr */ 234 "and $3, %0, %2 \n" /* $3 <= current & mask */ 235 "sc $3, (%1) \n" /* *paddr <= $3 */ 236 "beq $3, $0, 1b \n" /* retry if failure */ 237 "nop \n" 238 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 239 : "=&r" (current) 240 : "r" (ptr), "r" (mask), "r" (cxy) 241 : "$3", "$15" ); 239 asm volatile( 240 ".set noreorder \n" 241 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 242 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 243 "1: \n" 244 "ll %0, (%1) \n" /* current <= *paddr */ 245 "and $3, %0, %2 \n" /* $3 <= current & mask */ 246 "sc $3, (%1) \n" /* *paddr <= $3 */ 247 "beq $3, $0, 1b \n" /* retry if failure */ 248 "nop \n" 249 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 250 ".set reorder \n" 251 : "=&r" (current) : "r" (ptr), "r" (mask), "r" (cxy) : "$3", "$15" ); 242 252 243 253 return current; … … 252 262 uint32_t cxy = (uint32_t)GET_CXY( xp ); 253 263 254 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 255 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 256 "1: \n" 257 "ll %0, (%1) \n" /* current <= *paddr */ 258 "or $3, %0, %2 \n" /* $3 <= current | mask */ 259 "sc $3, (%1) \n" /* *paddr <= $3 */ 260 "beq $3, $0, 1b \n" /* retry if failure */ 261 "nop \n" 262 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 263 : "=&r" (current) 264 : "r" (ptr), "r" (mask), "r" (cxy) 265 : "$3", "$15" ); 264 asm volatile( 265 ".set noreorder \n" 266 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 267 "mtc2 %3, $24 \n" /* PADDR_EXT <= cxy */ 268 "1: \n" 269 "ll %0, (%1) \n" /* current <= *paddr */ 270 "or $3, %0, %2 \n" /* $3 <= current | mask */ 271 "sc $3, (%1) \n" /* *paddr <= $3 */ 272 "beq $3, $0, 1b \n" /* retry if failure */ 273 "nop \n" 274 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 275 ".set reorder \n" 276 : "=&r" (current) : "r" (ptr), "r" (mask), "r" (cxy) : "$3", "$15" ); 266 277 267 278 return current; … … 278 289 uint32_t cxy = (uint32_t)GET_CXY( xp ); 279 290 280 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 281 "mtc2 %4, $24 \n" /* PADDR_EXT <= cxy */ 282 "ll %0, (%2) \n" /* current <= *paddr */ 283 "addu $3, %0, %3 \n" /* $3 <= current + incr */ 284 "sc $3, (%2) \n" /* *paddr <= $3 */ 285 "beq $3, $0, 1f \n" /* exit if failure */ 286 "ori %1, $0, 1 \n" /* fail: ret <= 1 */ 287 "and %1, $0, $0 \n" /* success: ret <= 0 */ 288 "1: \n" 289 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 290 : "=&r" (current), "=&r" (error) 291 : "r" (ptr), "r" (incr), "r" (cxy) 292 : "$3", "$15" ); 291 asm volatile( 292 ".set noreorder \n" 293 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 294 "mtc2 %4, $24 \n" /* PADDR_EXT <= cxy */ 295 "ll %0, (%2) \n" /* current <= *paddr */ 296 "addu $3, %0, %3 \n" /* $3 <= current + incr */ 297 "sc $3, (%2) \n" /* *paddr <= $3 */ 298 "beq $3, $0, 1f \n" /* exit if failure */ 299 "ori %1, $0, 1 \n" /* fail: ret <= 1 */ 300 "and %1, $0, $0 \n" /* success: ret <= 0 */ 301 "1: \n" 302 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 303 ".set reorder \n" 304 : "=&r" (current), "=&r" (error) : "r" (ptr), "r" (incr), "r" (cxy) : "$3", "$15" ); 293 305 294 306 *old = current; … … 314 326 for( i = 0 ; i < wsize ; i++ ) // transfer one word per iteration 315 327 { 316 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 317 "mtc2 %0, $24 \n" /* PADDR_EXT <= scxy */ 318 "lw $3, 0(%1) \n" /* $3 <= *src */ 319 "mtc2 %2, $24 \n" /* PADDR_EXT <= dcxy */ 320 "sw $3, 0(%3) \n" /* *dst <= $3 */ 321 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 322 : 323 : "r"(scxy), "r" (sptr+(i<<2)), "r"(dcxy), "r" (dptr+(i<<2)) 324 : "$3", "$15" ); 328 asm volatile( 329 ".set noreorder \n" 330 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 331 "mtc2 %0, $24 \n" /* PADDR_EXT <= scxy */ 332 "lw $3, 0(%1) \n" /* $3 <= *src */ 333 "mtc2 %2, $24 \n" /* PADDR_EXT <= dcxy */ 334 "sw $3, 0(%3) \n" /* *dst <= $3 */ 335 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 336 ".set reorder \n" 337 : : "r"(scxy), "r" (sptr+(i<<2)), "r"(dcxy), "r" (dptr+(i<<2)) : "$3", "$15" ); 325 338 } 326 339 327 340 for( i = wsize << 2 ; i < size ; i++ ) // transfer one byte per iteration 328 341 { 329 asm volatile( "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 330 "mtc2 %0, $24 \n" /* PADDR_EXT <= scxy */ 331 "lb $3, 0(%1) \n" /* $3 <= *src */ 332 "mtc2 %2, $24 \n" /* PADDR_EXT <= dcxy */ 333 "sb $3, 0(%3) \n" /* *dst <= $3 */ 334 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 335 : 336 : "r"(scxy), "r" (sptr+i), "r"(dcxy), "r" (dptr+i) 337 : "$3", "$15" ); 342 asm volatile( 343 ".set noreorder \n" 344 "mfc2 $15, $24 \n" /* $15 <= PADDR_EXT */ 345 "mtc2 %0, $24 \n" /* PADDR_EXT <= scxy */ 346 "lb $3, 0(%1) \n" /* $3 <= *src */ 347 "mtc2 %2, $24 \n" /* PADDR_EXT <= dcxy */ 348 "sb $3, 0(%3) \n" /* *dst <= $3 */ 349 "mtc2 $15, $24 \n" /* PADDR_EXT <= $15 */ 350 ".set reorder \n" 351 : : "r"(scxy), "r" (sptr+i), "r"(dcxy), "r" (dptr+i) : "$3", "$15" ); 338 352 } 339 353 }
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