17 | | The main ALMOS-MKH specific feature is the following: the physical address space is supposed to be distributed between the clusters, and the MSB bits of the physical address are supposed to define the target cluster. In a physical address, the LSB bits contain the '''lpa''' (Local Physical Address), and the MSB bits define the '''cxy''' (Cluster Identifier). The physical address space is therefore described as a two levels array M[cxy][lpa]. To enforce locality, a kernel instance can use a normal pointer '''ptr''' to access the local physical memory. But, to access the physical memory of a remote cluster (cxy), it must use the specific remote access functions ''remote_read(cxy,ptr)'' and ''remote_write(cxy,ptr), where '''ptr''' is the local pointer in the target cluster. This (cxy,ptr) couple is called an ''extended pointer''. |
| 17 | The main ALMOS-MKH specific feature is the following: the physical address space is supposed to be distributed between the clusters, and the MSB bits of the physical address are supposed to define the target cluster. In a physical address, the LSB bits contain the '''lpa''' (Local Physical Address), and the MSB bits define the '''cxy''' (Cluster Identifier). The physical address space is therefore described as a two levels array M[cxy][lpa]. To enforce locality, a kernel instance can use a normal pointer '''ptr''' to access the local physical memory. But, to access the physical memory of a remote cluster (cxy), it must use the specific remote access functions ''remote_read(cxy,ptr)'' and ''remote_write(cxy,ptr)'', where ''ptr'' is the local pointer in the target cluster. This (cxy,ptr) couple is called an ''extended pointer''. |
19 | | On a typical Intel-based hardware platform containing '''64-bit cores''', the physical address has 44 bits : the 4 MSB bits define the target cluster identifier, and the 40 LSB bits define the local physical address LPA. To avoid contention, the kernel code is replicated in all clusters to define one KCODE physical segment. and ALMOS-MKH uses the '''Instruction MMU''' to map - in each cluster - the local kernel code copy in the kernel virtual space. |
20 | | Regarding the data accesses, each cluster contains one KDATA and one KHEAP physical segments (the KHEAP physical segment contains all local physical memory not occupied by KCODE and KDATA). As the 48 bits virtual address space is large enough to map all these distributed KDATA[cxy] and KHEAP[cxy] segments, they can be all mapped in the kernel virtual space, and the '''Data MMU''' is used to translate both the local and the remote data accesses. |
| 19 | * On a typical Intel-based hardware platform containing '''64-bit cores''', the physical address has 44 bits : the 4 MSB bits define the target cluster identifier, and the 40 LSB bits define the local physical address LPA. To avoid contention, the kernel code is replicated in all clusters to define one KCODE physical segment. and ALMOS-MKH uses the '''Instruction MMU''' to map - in each cluster - the local kernel code copy in the kernel virtual space. Regarding the data accesses, each cluster contains one KDATA and one KHEAP physical segments (the KHEAP physical segment contains all local physical memory not occupied by KCODE and KDATA). As the 48 bits virtual address space is large enough to map all these distributed KDATA[cxy] and KHEAP[cxy] segments, they can be all mapped in the kernel virtual space, and the '''Data MMU''' is used to translate both the local and the remote data accesses. |
22 | | On the TSAR hardware platforms containing '''32-bit cores''', the physical address has 40 bits : the 8 MSB bits define the target cluster identifier CXY, and the 32 LSB bits define the local physical address LPA. On these architectures, |
23 | | the virtual address is 32 bits, and this virtual space is too small to map all the distributed KDATA[cxy] and KHEAP[cxy] physical segments. On these architectures, ALMOS-MKH kernel runs partially in physical addressing: the kernel code is still replicated in all clusters, and uses the '''Instruction MMU''' to map the local kernel code copy in the kernel virtual space. |
24 | | But, for data accesses, the '''Data MMU'' is deactivated as soon as a core enters the kernel, and it is reactivated when it returns to user. To build a 40 bits physical address from a 32 bits pointer, ALMOS-MK uses a software controlable (TSAR-specific) register, containing a cluster identifier, that is concatained to the 32 bits pointer (in pseudo identity mapping). The default value for this register is the local cluster identifier, and is used to access the local physical memory. To access physical memory in a remote cluster, the ''remote_read'' and ''remote_write'' primitives modify the extension register before the remote memory access, and restore it after the remote memory access. |
| 21 | * On the TSAR hardware platforms containing '''32-bit cores''', the physical address has 40 bits : the 8 MSB bits define the target cluster identifier CXY, and the 32 LSB bits define the local physical address LPA. On these architectures, the virtual address is 32 bits, and this virtual space is too small to map all the distributed KDATA[cxy] and KHEAP[cxy] physical segments. On these architectures, ALMOS-MKH kernel runs partially in physical addressing: the kernel code is still replicated in all clusters, and uses the '''Instruction MMU''' to map the local kernel code copy in the kernel virtual space. But, for data accesses, the '''Data MMU'' is deactivated as soon as a core enters the kernel, and it is reactivated when it returns to user. To build a 40 bits physical address from a 32 bits pointer, ALMOS-MK uses a software controlable (TSAR-specific) register, containing a cluster identifier, that is concatened to the 32 bits pointer (in pseudo identity mapping). The default value for this register is the local cluster identifier, and is used to access the local physical memory. To access physical memory in a remote cluster, the ''remote_read'' and ''remote_write'' primitives modify the extension register before the remote memory access, and restore it after the remote memory access. |