| 198 | | [[PageOutline]] |
| 199 | | |
| 200 | | == A) __General Principles__ |
| 201 | | |
| 202 | | The ALMOS-MKH boot procedure can be decomposed in two phases: |
| 203 | | * The architecture dependent phase, implemented by an architecture specific '''boot_loader''' procedure. |
| 204 | | * The architecture independent phase, implemented by a generic (architecture independent) '''kernel-init''' procedure. |
| 205 | | |
| 206 | | As the generic (i.e. architecture independent) kernel initialization procedure is executed in parallel by all kernel instances in all clusters containing at least one core and one memory bank, the main task of the boot-loader is to load - in each cluster - a local copy of |
| 207 | | the ALMOS-MKH kernel code. This code includes a description of the hardware architecture, contained in the ''boot_info_t'' data-structure. |
| 208 | | |
| 209 | | This fixed size ''boot_info_t'' structure is build by the boot-loader, and stored at the beginning of the local copy of the kdata segment. As it contains both general and cluster specific information, the content depends on the cluster: |
| 210 | | * general hardware architecture features : number of clusters, topology, etc. |
| 211 | | * available external (shared) peripherals : types and features. |
| 212 | | * number of cores in cluster, |
| 213 | | * available internal (private) peripherals in cluster : types and features. |
| 214 | | * available physical memory in cluster. |
| 215 | | |
| 216 | | This boot_info_t structure is defined in the '''boot_info.h''' file. |
| 217 | | |
| 218 | | To build the various boot_info_t structures (one per cluster), the boot-loader uses the '''arch_info_t''' binary structure, that is described in |
| 219 | | section [wiki:arch_info Hardware Platform Definition]. This binary structure is contained in the '''arch_info.bin''' file, and must be stored |
| 220 | | in the file system root directory. |
| 221 | | |
| 222 | | This method allows the boot_loader to check and reconfigure the hardware components, to guaranty that the generated boot_info_t structures contain only functionally tested hardware components. |
| 223 | | |
| 224 | | We describe below the boot_loader for the TSAR architecture, the boot_loader for the I86 architecture, and the generic kernel initialization procedure. |
| 225 | | |
| 226 | | == B) __Boot-loader for the TSAR architecture__ == |
| 227 | | |
| 228 | | The TSAR boot-loader uses an OS-independent '''pre-loader''', stored in an external ROM, that load the TSAR |
| 229 | | '''boot-loader''' code from an external block-device to the memory. This preloader is specific for the TSAR architecture, but independent on the Operating System. It is used by ALMOS-MKH, but also by LINUX, NetBSD, ALMOS_MKH, or the GIET-VM. |
| 230 | | |
| 231 | | The TSAR boot_loader allocates - in each cluster containing a physical memory bank - five fixed size memory zones, to store various |
| 232 | | binary files or data structures : |
| 233 | | || || size || local physical address || |
| 234 | | || préloader code itself || PRELOADER_MAX_SIZE (16 Kb) || PRELOADER_BASE(0x0) || |
| 235 | | || boot-loader code local copy || BOOT_MAX_SIZE (1 Mb) || BOOT_BASE (0x100000) || |
| 236 | | || arch_info.bin file local copy || ARCHINFO_MAX_SIZE (2 Mb) || ARCHINFO_BASE (0x200000) || |
| 237 | | || kernel.elf binary file || KERN_MAX_SIZE (1 Mb) || KERN_BASE (0x400000) || |
| 238 | | || execution stacks (one per core) || BOOT_STACK_SIZE (1 Mb) || BOOT_STACK_BASE (0x500000) || |
| 239 | | |
| 240 | | The values given in this array are indicative. The actual values are defined by configuration parameters in the '''boot_config.h''' file. |
| 241 | | These memory zones are only used for temporary storage : when the TSAR boot_loader completes, and transfer control to the kernel_init procedure, |
| 242 | | the kernel code (i.e. the code and data segments) has been copied - in each cluster - in the lowest part of the cluster physical memory. |
| 243 | | The four pages (16 Kbytes) reserved for the prelloader are only used in cluster 0. |
| 244 | | |
| 245 | | A core is identified by two indexes[cxy][lid] : ''cxy'' is the cluster identifier, an ''lid'' is the core local index in cluster cxy. |
| 246 | | |
| 247 | | |
| 248 | | We describe below the four phases for the TSAR boot-loader: |
| 249 | | |
| 250 | | === B1. Preloader phase === |
| 251 | | |
| 252 | | At reset, the MMU is de-activated, and the extension address registers (for both data and instructions) in all cores[cxy][lid] contain the 0 value. |
| 253 | | Therefore, all cores can only access the physical address space of cluster 0. |
| 254 | | * In the TSAR_LETI architecture, the preloader is loaded in the first 16 kbytes of the RAM located in cluster 0. |
| 255 | | * In the TSAR_IOB architecture, the preloader is stored in an external ROM, that is accessed throug the IO_bridge located in cluster 0. |
| 256 | | |
| 257 | | All cores execute the same preloader code, but the work done depends on the core identifier. The core[0][0] (i.e. Core0 in cluster 0) load |
| 258 | | in local memory of cluster 0, the boot-loader code. All other cores do only one task before going to sleep (low-power) state: |
| 259 | | each core activates its private WTI channel in the local ICU (Interrupt Controller Unit) to be wake-up by core [0][0], using an |
| 260 | | IPI (Inter Processor Interrupt). |
| 261 | | |
| 262 | | This shows the memory content after this first phase. |
| 263 | | [[Image(Phys_Mem1.svg)]] |
| 264 | | |
| 265 | | === B2. Sequencial phase === |
| 266 | | |
| 267 | | In this second phase the work is entirely done by core[0][0]. |
| 268 | | |
| 269 | | * The core[0][0] initializes the stack pointer. The boot stack size is a configuration parameter. |
| 270 | | * The core[0][0] initializes 2 peripherals: The '''TTY''' terminal (channel 0) to display log info, and the '''IOC''' to access the disk. |
| 271 | | * The core[0][0] loads in cluster 0 the '''arch_info.bin''' file and the '''kernel.elf''' file at addresses ARCHINFO_BASE and KERN_BASE respectively. |
| 272 | | * The core[0][0] uses the '''arch_info.bin'''structure to initialize the local '''boot_info_t''' structure in cluster 0. |
| 273 | | * The core[0][0] send IPIs to activate all cores [i][0] in all other clusters. |
| 274 | | |
| 275 | | All Core0 in all clusters synchronize through a synchronisation barrier before entering the next phase. |
| 276 | | This shows the memory content after this phase. |
| 277 | | [[Image(Phys_Mem2.svg)]] |
| 278 | | |
| 279 | | === B3. partially parallel phase === |
| 280 | | |
| 281 | | In each cluster(i), the core[I][0] exécutes the boot-loader code (stored in physical memory of cluster 0), to do he following tasks: |
| 282 | | * each core[i][0] analyses the '''arch_info.bin''' structure (stored in physical memory of cluster 0), to search his own cluster identifier '''cxy'''. This is done in parallel by all cores[i][0], and can create contention. |
| 283 | | * each core[i][0] updates its own extended address register to access the data stored in its local physical memory. Nevertheless, it still access to the boot code stored in cluster(0), as long as the code has not been copied in local cluster. |
| 284 | | * each core[i][0] allocates a private stack at address BOOT_STACK_BASE in its local memory. |
| 285 | | * each core[i][0] copy l'image du boot-loader et le fichier '''arch_info.bin''' aux mêmes adresses, respectivement '''0x100000''' et '''0x200000''', dans la mémoire physique locale. À partir d'ici, chaque '''CP0''' peut exécuter le code du boot-loader en local. |
| 286 | | * Il copie ensuite l'image du noyau à l'adresse '''0x4000''' de la mémoire physique locale de son cluster (c'est à dire, juste après les quatre pages réservées au prélasser). |
| 287 | | * Il utilise la structure '''arch_info.bin''' locale pour initialiser les différents champs de la structure '''boot_info_t''' de son cluster. Cette tâche n'utilise que des accès mémoire locaux puisque toutes les informations nécessaires sont disponibles localement. |
| 288 | | * Il arrive à la barrière de synchronisation, et le dernier '''CP0''' débloque tous les '''CP0''' (y compris '''bscpu'''), |
| 289 | | * Chaque CP0 envoie des IPIs pour réveiller les autres cores dans son cluster local. |
| 290 | | * Les '''CP0''' se mettent en attente jusqu'à ce que tous les autres cores arrivent à ce point de rendez-vous en utilisant le mécanisme de barrière de synchronisation. |
| 291 | | |
| 292 | | This shows the memory content after this phase. |
| 293 | | [[Image(Phys_Mem3.svg)]] |
| 294 | | |
| 295 | | === B4. Fully parallel phase === |
| 296 | | |
| 297 | | Chaque core CPi ('''lid''' non nul), réveillé par le CP0 local de son cluster, sort du code du preloader et exécute le boot-loader dans le cluster de boot puisque ses registres d'extension d'adresse ne sont pas encore mis à jour. Une fois sortis du preloader, ces cores décrémentent le compteur de la barrière de synchronisation et débloquent les '''CP0'''. Tous ces '''CP0''' sauf un, se mettent tout de suite en attente jusqu'à ce que les '''CPi''' finissent leur exécution du boot-loader. Le seul '''CP0''' qui n'arrive pas encore à cette barrière de synchronisation, celui du cluster(0,0), peut maintenant écraser le code du preloader en déplaçant l'image du noyau à l'adresse '''0x0''' de l'espace adressable physique du cluster(0,0), puisque tous les cores sont déjà sortis du preloader. Il rejoint ensuite les autres '''CP0''' au dernier point de rendez-vous dans le boot-loader. Les '''CPi''', quant à eux, exécutent, pour le moment, le code du boot-loader se trouvant dans le cluster de boot car leurs registres d'extension d'adresse ont toujours la valeur 0 par défaut. Chacun de ces '''CPi''' effectue les étapes suivantes: |
| 298 | | * Il analyse le contenu de '''arch_info.bin''' (dans l'espace adressable physique du cluster de boot) en parcourant le tableau de descripteurs de core pour retrouver son identificateur de cluster '''cxy''' ainsi que son identificateur de core local dans son cluster '''lid'''. Notons que cette étape est exécutée parallèlement par tous les '''CPi''', ce qui entraine une contention, encore plus forte que celle créée par les accès parallèles des '''CP0''', au banc mémoire contenant ce tableau de descripteurs de core . |
| 299 | | * Il peut maintenant, à partir de son '''cxy''', mettre à jour les valeurs dans ses registres d'extension d'adresse de code et de données. Comme le '''CP0''' du même cluster a déjà copié les informations nécessaires dans le banc mémoire local aux mêmes adresses que du cluster de boot, il peut toujours exécuter le code du boot-loader en local. |
| 300 | | * Il alloue sa pile de boot en initialisant son pointeur de pile à l'adresse '''0x600000 - 4K*lid''' dans l'espace adressable physique locale de son cluster (grâce à la nouvelle valeur dans le registre d'extension d'adresse de code). |
| 301 | | * La structure '''boot_info_t''' du cluster étant déjà initialisée, chacun des '''CPi''' ne fait que vérifier les informations qui le concernent. |
| 302 | | * Il arrive finalement au point de rendez-vous avec tous les '''CP0''', décrémente le compteur de la barrière de synchronisation et se met en attente. |
| 303 | | * Dès que le dernier core arrive à ce point et débloque les autres, tous les cores se branchent à la fonction '''kern_init()'''. |
| 304 | | |
| 305 | | There is the physical memory content at boot completion. |
| 306 | | |
| 307 | | [[Image(Phys_Mem4.svg)]] |
| 308 | | |
| 309 | | At this point, the boot-loader completed its job: |
| 310 | | * The kernel code ''kcode'' and ''kdata'' segments are loaded - in all clusters - in the first ''offset'' physical pages. |
| 311 | | * The hardware architecture described by the '''arch_info.bin'''file has been analyzed, and copied - in each cluster - in the '''boot_info_t''' structure, stored in the kdata segment. |
| 312 | | * Each local kernel instance can use all the physical memory that is not used to store the kernel ''kcode'' and ''kdata'' segments themselves. |
| 313 | | |
| 314 | | == C) __Boot-loader for the I86 architecture__ == |
| 315 | | |
| 316 | | TODO |
| 317 | | |
| 318 | | == D) __Generic kernel initialization procedure__ == |
| 319 | | |
| 320 | | The kernel_init( boot_info_t * info ) function is the kernel entry point when the boot_loader transfer control to the kernel. |
| 321 | | The ''info'' argument is a pointer on the fixed size boot_info_t structure, that is stored in the data kernel segment. |
| 322 | | |
| 323 | | All cores execute this procedure in parallel, but some tasks are only executed by the CP0 core. |
| 324 | | This procedure uses two synchronisation barriers, defined as global variables in the data segment: |
| 325 | | * the global_barrier variable is used to synchronize all CP0 cores in all clusters containing a kernel instance. |
| 326 | | * the local_barrier variable is used to synchronize all cores in a given cluster. |
| 327 | | |
| 328 | | The kernel initialization procedure execute sequentially the following steps: |
| 329 | | |
| 330 | | === D1) Core and cluster identification === |
| 331 | | |
| 332 | | Each core has an unique hardware identifier, called '''gid''', that is hard-wired in a read-only register. |
| 333 | | From the kernel point of view a core is identified by a composite index (cxy,lid), where '''cxy''' is the cluster identifier, and ''lid'' is a local (continuous) index in the cluster. The association between the gid hardware index and the (cxy,lid) composite index is defined in the boot_info_t structure. |
| 334 | | In this first step, each core makes an associative search in the boot_info_t structure to obtain the ('''cxy,lid''') indexes from the '''gid''' index. |
| 335 | | Then the CP0 initialize the global variable '''local_cxy''' defining the local cluster identifier. |
| 336 | | |
| 337 | | === D2) TXT0 device initialization === |
| 338 | | |
| 339 | | The core[io_cxy][0] (i.e. CP0 in I/O cluster) initializes the chdev descriptor associated to the kernel text terminal TXT0. This terminal is used by any kernel instance running on any core to display log or debug messages. This terminal is configured in ''non-descheduling'' mode : |
| 340 | | the calling thread call directly the relevant TXT driver, without using a server thread. |
| 341 | | |
| 342 | | A first synchonization barrier is used to avoid other cores to use the TXT0 terminal before initialization completion. |
| 343 | | |
| 344 | | === D3) Cluster manager initialization === |
| 345 | | |
| 346 | | In each cluster, the CP0 makes the cluster manager initialization, namely the cores descriptors array, and the physical memory allocators. |
| 347 | | Then it initializes the local process_zero, containing al kernel threads in a given cluster. |
| 348 | | |
| 349 | | A second synchonization barrier is used to avoid other cores to access cluster manager before initialization completion. |
| 350 | | |
| 351 | | === D4) Internal & external devices initialization === |
| 352 | | |
| 353 | | In each cluster, the CP0 makes the devices initialization. For multi-channels devices, there is one channel device (called chdev_t) per channel. |
| 354 | | For internal (replicated) devices, the khedive descriptors are allocated in the local cluster. For external (shared) devices, the chdev descriptors are regularly distributed on all clusters. These external chdev are indexed by a global index, and the host cluster is computed from this |
| 355 | | index by a modulo. |
| 356 | | |
| 357 | | The internal devices descriptors are created first( ICU, then MMC, then DMA ), because the ICU device is used by all other devices. |
| 358 | | Then the WTI mailboxes used for IPIs (Inter Processor Interrupt) are allocated in local ICU : one WTI mailbox per core. |
| 359 | | Then each external chdev descriptor is created by the CP0 in the cluster where it must be created. |
| 360 | | |
| 361 | | A third synchonization barrier is used to avoid other cores to access devices before initialization completion. |
| 362 | | |
| 363 | | === D5) Idle thread initialization === |
| 364 | | |
| 365 | | In this step, each core creates and initializes its private idle thread descriptor. |
| 366 | | |
| 367 | | === D6) File system initialization === |
| 368 | | |
| 369 | | The CP0 in I/O cluster) initializes the file system. |
| 370 | | |
| 371 | | A fourth synchonization barrier is used to avoid other cores to access file system before initialization completion. |
| 372 | | |
| 373 | | === D7) Scheduler activation === |
| 374 | | |
| 375 | | Finally, each core enables its private timer IRQ to activate its private scheduler, and jump to the idle thread code. |
