source: anr/coach_irisa.bib @ 2

@InProceedings{KluterCodes08,
  author =       {{Theo Kluter and  Philip Brisk and  Paolo Ienne and  and Edoardo Charbon}},
  title =        {{Speculative DMA for Architecturally Visible Storage in Instruction Set Extensions}},
  booktitle = {ISSS/CODES},
  year =         {2008},
}

@InProceedings{KluterDAC09,
  author =       {{Theo Kluter and  Philip Brisk and  Paolo Ienne and  and Edoardo Charbon}},
  title =        {{Way Stealing : Cache-assisted Automatic Instruction Set Extensions}},
  booktitle = {Design Automation Conference (DAC)},
  year =         {2009},
}

@InProceedings{YuCodes04,
  author =       {{Pan Yu and Tulika Mitra}},
  title =        {{Scalable Custom Instructions Identification for Instruction Set Extensible Processors}},
  booktitle = {ISSS/CODES},
  year =         {2004},
}

@InProceedings{Dinh08,
  author =       {{Quang Dinh and Deming Chen and Martin D.~F.~Wong}},
  title =        {{Efficient ASIP Design for Configurable Processors with Fine-Grained Resource Sharing}},
  booktitle = {ACM Internatibnal Conference Field Programmable Gate Arrays (FPGA)},
  year =         {2008},
}

@Misc{NIOS2UG,
  title =        {{Nios II Custom Instruction User Guide, Altera Corp.}},
  year =         {2008},
  
}