Changeset 248


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Timestamp:
Feb 17, 2010, 2:56:27 PM (14 years ago)
Author:
coach
Message:

UBS

Location:
anr
Files:
2 edited

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  • anr/section-2.1.tex

    r247 r248  
    6262of FPGA-based solutions is limited by the lack of design automation.
    6363\\
    64 Nowadays, there are neither commercial nor academic tools covering the whole design process
    65 from the system level specification to the bit stream generation neither for embedded system design
     64\\
     65Nowadays, there are no commercial or academic tools covering the whole design flow
     66from the system level specification to the bitstream generation neither for embedded system design
    6667nor for HPC.
    6768
     
    103104%the design process very complex and achievable only by designers skilled in many domains.
    104105
    105 \begin{center}\begin{minipage}{.8\linewidth}\textit{
     106\begin{center}\begin{minipage}{.9\linewidth}\textit{
    106107The aim of the COACH project is to integrate all these design steps into a single design framework
    107 and to allow \textbf{pure software} developpers to develop embedded systems.
     108and to allow \textbf{pure software} developpers to design embedded systems.
    108109}\end{minipage}\end{center}
    109110
  • anr/section-2.2.tex

    r247 r248  
    1414%%%
    1515\parlf
    16 COACH will contribute to build an open development and run-time
     16COACH will contribute to build an open design and run-time
    1717environment, including communication middleware and tools to support
    1818developers in the production of embedded software, through all phases of the software lifecycle,
     
    2222\item High level methods and concepts (esp. requirements and architectural level) for system
    2323design, development and integration, addressing complexity aspects and modularity.
    24 \item Open and modular development environments, enabling flexibility and extensibility by
     24\item Open and modular design environments, enabling flexibility and extensibility by
    2525means of new or sector-specific tools and ensuring consistency and traceability along the
    2626development lifecycle.
     
    2929\end{itemize}
    3030COACH outcome will contribute to strengthen Europe's competitive position by developing
    31 technologies and methodologies for product development, focusing (in compliance with the
     31technologies and methodologies for product design, focusing (in compliance with the
    3232%scope of the above program) on technologies, engineering methodologies, novel tools,
    3333%methods which facilitate resource use efficiency. The approaches and tools to be developed
     
    7575%    The TSAR MEDEA+ project (2008-2010) targets the design of a
    7676    scalable, coherent shared memory, multi-cores processor architecture, and uses the SoCLib
    77     plaform for virtual prototyping. The COACH project will benefit from the synthesizable VHDL
     77    plaform for virtual prototyping. COACH will benefit from the synthesizable VHDL
    7878    models developped in the framework of TSAR (MIPS32 processor core, and RING interconnect).
    7979  \item[BioWic]
     
    134134\item[Axis 2] \textit{Infrastructures pour l'Internet, le calcul intensif ou les services} \\
    135135COACH will address High-Performance Computing (HPC) by helping designers to accelerate an
    136 application running on a PC by migrating critical parts into a SoC implemented on an FPGA
    137 plugged to the PC bus (through a communication link like PCI/X). COACH will reduce the designer
    138 effort through the development of tools that translate high level language programs to FPGA
    139 configurations. Moreover, Dynamic Partial Reconfiguration will be used for improving HPC performance
     136application running on a PC.
     137By providing tools that translate high level language programs to FPGA
     138configurations, COACH will allow to easily migrate critical parts into an FPGA plugged to the
     139PC bus (through a communication link like PCI/X).
     140Moreover, Dynamic Partial Reconfiguration will be used for improving HPC performance
    140141as well as reducing the required area.
    141142\textbf{Thereby COACH partially corresponds to axis 2}.
     
    168169\item [Axis 3] \textit {Robotique et contr\^{o}le/commande}:
    169170
    170 COACH will address robotic and control applications domains by
    171 allowing to design complex digital systems based on MPSoC architecture.
     171COACH will address robotic and control applications by
     172allowing to design complex systems based on MPSoC architecture.
    172173Like in the consumer electronics domain, future control applications
    173174will employ more and more SoC for safety and security applications.
    174 Application domains for such systems are for example automotive,
    175 aerospace or avionics domains (e.g. collision-detection, intelligent navigation...).
     175Application domains for such systems are for example automotive
     176or avionics domains (e.g. collision-detection, intelligent navigation...).
    176177Manufacturing technology will also increasingly need high-end vision analysis and high-speed
    177178robot control.
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