Changeset 328

Timestamp:

Jun 16, 2014, 3:15:08 PM (10 years ago)

Author:

alain

Message:

Introduce genmap tool in giet_python

Location:

soft/giet_vm/giet_python

Files:

• genmap (moved) (moved from soft/giet_vm/giet_python/tsarmap) (12 diffs)
• mapping.py (modified) (11 diffs)

soft/giet_vm/giet_python/genmap

@@ -2 +2 @@
 
 #######################################################################################
-#   file   : tsarmap
+#   file   : genmap
 #   date   : april 2014
 #   author : Alain Greiner
@@ -34 +34 @@
 # - sort (one thread per processor)
 # - transpose (one thread per processor)
+# - convol (one thread per processor)
 #######################################################################################
 
@@ -42 +43 @@
 from transpose import *
 from sort import *
+from convol import *
 
 import sys
@@ -86 +88 @@
 parser.add_option( '--transpose', action = 'store_true', dest = 'transpose',
                    default = False,
-                   help = 'map the "transpose" application for the GIET' )
+                   help = 'map the "transpose" application for the GietVM' )
 
 parser.add_option( '--sort', action = 'store_true', dest = 'sort',     
                    default = False,
-                   help = 'map the "sort" application for the GIET' )
+                   help = 'map the "sort" application for the GietVM' )
+
+parser.add_option( '--convol', action = 'store_true', dest = 'filt',     
+                   default = False,
+                   help = 'map the "convol" application for the GietVM' )
 
 ######################################################################################
@@ -112 +118 @@
 xml_path      = options.xml_path    # path for map.xml file     
 
-map_transpose = options.transpose   # map "sort" application if True
-map_sort      = options.sort        # map "transpose" application if True
+map_transpose = options.transpose   # map "transpose" application if True
+map_sort      = options.sort        # map "sort" application if True
+map_convol    = options.filt        # map "convol" application if True
 
 ######################################################################################
@@ -131 +138 @@
 # build mapping calling the function (function name)
 mapping = select.genmap( x_size, y_size, nprocs )
-print '[tsarmap] platform %s build' % mapping.name 
+print '[genmap] platform %s build' % mapping.name 
 
 # generate the hard_confi.h file for top.cpp compilation
@@ -137 +144 @@
 f = open ( pathname, 'w' )
 f.write( mapping.hard_config() )
-print '[tsarmap] %s generated' % pathname
+print '[genmap] %s generated' % pathname
 
 ######################################################################################
@@ -145 +152 @@
 if ( map_transpose ): 
     transpose( mapping )
-    print '[tsarmap] application "transpose" loaded'
+    print '[genmap] application "transpose" loaded'
 
 if ( map_sort ):      
     sort( mapping )
-    print '[tsarmap] application "sort" loaded'
+    print '[genmap] application "sort" loaded'
+
+if ( map_convol ):      
+    convol( mapping )
+    print '[genmap] application "convol" loaded'
 
 ######################################################################################
@@ -160 +171 @@
     f = open ( pathname, 'w' )
     f.write( mapping.xml() )
-    print '[tsarmap] %s generated for debug' % pathname
+    print '[genmap] %s generated for debug' % pathname
 
 ######################################################################################
@@ -171 +182 @@
     f = open ( pathname, 'w' )
     f.write( mapping.netbsd_dts() )
-    print '[tsarmap] %s generated for netbsd' % pathname
+    print '[genmap] %s generated for netbsd' % pathname
 
 ######################################################################################
@@ -182 +193 @@
     f = open ( pathname, 'w' )
     f.write( mapping.almos_arch() )
-    print '[tsarmap] %s generated for almos' % pathname
+    print '[genmap] %s generated for almos' % pathname
 
 ######################################################################################
@@ -194 +205 @@
     f = open ( pathname, 'w' )
     f.write( str( mapping.cbin( verbose ) ) )
-    print '[tsarmap] %s generated for giet_vm' % pathname
+    print '[genmap] %s generated for giet_vm' % pathname
 
     pathname = giet_path + '/hard_config.h'
     f = open ( pathname, 'w' )
     f.write( mapping.hard_config() )
-    print '[tsarmap] %s generated for giet_vm' % pathname
+    print '[genmap] %s generated for giet_vm' % pathname
 
     pathname = giet_path + '/giet_vsegs.ld'
     f = open ( pathname, 'w' )
     f.write( mapping.giet_vsegs() )
-    print '[tsarmap] %s generated for giet_vm' % pathname
-
+    print '[genmap] %s generated for giet_vm' % pathname
+

soft/giet_vm/giet_python/mapping.py

@@ -143 +143 @@
                   x_io = 0,                      # cluster_io x coordinate
                   y_io = 0,                      # cluster_io y coordinate
+                  peri_increment = 0x10000,      # address increment for globals
                   reset_address = 0xBFC00000 ):  # Processor wired boot_address
 
@@ -158 +159 @@
         self.x_io           = x_io
         self.y_io           = y_io
+        self.peri_increment = peri_increment
         self.reset_address  = reset_address
-
-        self.vseg_increment = 0x10000
 
         self.total_vspaces  = 0
@@ -344 +344 @@
                    pseg,                # destination pseg name
                    identity   = False,  # identity mapping required if true
-                   replicated = False,  # replicated in all clusters if true
                    binpath    = '' ):   # pathname for binary code
 
-        assert (identity and replicated) == False
-
         assert mode in VSEGMODES
 
@@ -357 +354 @@
         assert (x < self.x_size) and (y < self.y_size)
 
-        if ( replicated ):                  # replicated
-            for x_rep in xrange( self.x_size ):            
-                for y_rep in xrange( self.y_size ):            
-                    vbase_rep = vbase + (((x_rep << self.y_width) + y_rep) << 16)
-                    name_rep  = name + '_%d_%d' % ( x_rep , y_rep )
-  
-                    # add one vseg [x,y] into mapping
-                    vseg = Vseg( name_rep, vbase_rep, mode, x_rep, y_rep, pseg, identity )
-                    self.globs.append( vseg )
-                    self.total_globals += 1
-                    vseg.index = self.total_vsegs 
-                    self.total_vsegs += 1
+        # add one vseg into mapping
+        vseg = Vseg( name, vbase, mode, x, y, pseg, identity )
+        self.globs.append( vseg )
+        self.total_globals += 1
+        vseg.index = self.total_vsegs 
+        self.total_vsegs += 1
             
-                    # add one vobj [x,y] in the mapping
-                    vobj = Vobj( name_rep, size, vtype, binpath, 0, 0 )
-                    vseg.vobjs.append( vobj )
-                    vobj.index = self.total_vobjs
-                    self.total_vobjs += 1
-
-        else:                          # single vseg
-            # add one vseg into mapping
-            vseg = Vseg( name, vbase, mode, x, y, pseg, identity )
-            self.globs.append( vseg )
-            self.total_globals += 1
-            vseg.index = self.total_vsegs 
-            self.total_vsegs += 1
-            
-            # add one vobj into mapping
-            vobj = Vobj( name, size, vtype, binpath, 0, 0 )
-            vseg.vobjs.append( vobj )
-            vobj.index = self.total_vobjs
-            self.total_vobjs += 1
+        # add one vobj into mapping
+        vobj = Vobj( name, size, vtype, binpath, 0, 0 )
+        vseg.vobjs.append( vobj )
+        vobj.index = self.total_vobjs
+        self.total_vobjs += 1
 
         return
@@ -825 +802 @@
         nb_fbf       = 0
         fbf_channels = 0
+        fbf_arg      = 0
         seg_fbf_base = 0xFFFFFFFF
         seg_fbf_size = 0
@@ -885 +863 @@
         nb_xcu       = 0
         xcu_channels = 0
+        xcu_arg      = 0
         seg_xcu_base = 0xFFFFFFFF
         seg_xcu_size = 0
@@ -911 +890 @@
                     seg_fbf_size = periph.pseg.size
                     fbf_channels = periph.channels
+                    fbf_arg      = periph.arg
                     nb_fbf +=1
 
@@ -986 +966 @@
                     seg_xcu_size = periph.pseg.size
                     xcu_channels = periph.channels
+                    xcu_arg      = periph.arg
                     nb_xcu +=1
     
@@ -1048 +1029 @@
                 boot_stack_found        = True
 
-        # check all BOOT vsegs are found and identity mapping
+        # check that BOOT vsegs are found and identity mapping
         if ( (boot_mapping_found == False) or (boot_mapping_ident == False) ):
              print 'error in hard_config() : seg_boot_mapping missing or not ident'
@@ -1126 +1107 @@
         s += '#define USE_RAMDISK            %d\n'    % self.use_ramdisk
         s += '\n'
+        s += '#define FBUF_X_SIZE            %d\n'    % fbf_arg
+        s += '#define FBUF_Y_SIZE            %d\n'    % fbf_arg
+        s += '\n'
+        s += '#define XCU_NB_INPUTS          %d\n'    % xcu_arg
+        s += '\n'
 
         s += '/* physical base addresses for peripherals */\n'
@@ -1177 +1163 @@
         s += '#define SEG_RDK_SIZE           0x%x\n'  % seg_rdk_size
         s += '\n'
-        s += '#define VSEG_CLUSTER_INCREMENT 0x%x\n'  % self.vseg_increment
+        s += '#define PERI_CLUSTER_INCREMENT 0x%x\n'  % self.peri_increment
         s += '\n'