Changes between Version 9 and Version 10 of boot_loader

Timestamp:

Nov 5, 2014, 6:06:14 PM (10 years ago)

Author:

alain

Comment:

--

boot_loader

@@ -1 +1 @@
 = GIET_VM / Boot Procedure =
 
-The system boot is done in three phases.
+The boot procedure is done in three steps: 
+ * The generic ''reset'' code (hard-coded in the external ROM) is executed by processor (0,0,0), and load the ''boot-loader'' code from the hard disk to the physical memory. 
+ * The ''boot-loader'' is executed by processor (0,0,0). It load the ''map.bin'' file, build the page tables, initializes the schedulers as specified in the mapping, initializes the peripherals, and load the kernel code, as well as the user application(s) code into memory. 
+ * Finally, the ''kernel_init()'' function is executed by all processors, and completes the kernel initialisation.The system boot is done in three phases.
 
-== __Phase 1 : Reset Initialization__ ==
+== __Step 1 : Reset Initialization__ ==
 
-This phase is executed in case of hard reset: all processors execute the ''reset'' code (also called ''preloader'' code) stored in the external ROM,
-but the work done depends on the processor global index. This ''reset'' code is generic. It is entirely defined by the target hardware architecture, and can be used to boot any operating system.  
+In case of hard reset, all processors execute the same ''reset'' code (also called ''preloader'' code) stored in the external ROM, but the work done depends on the processor global index. This ''reset'' code is generic. It is entirely defined by the target hardware architecture, and can be used to boot any operating system.  
  * Processor (0,0,0) load the GIET_VM boot-loader code from the external disk (or any other mass storage peripheral), to the physical memory of cluster(0,0).
  * All other processors initialize their private interrupt controller, to be able to receive an inter-processor interrupt (WTI), and enter ''wait_state'' in low-power mode.
 
-== __Phase 2 : Boot Initialization__ ==
+== __Step 2 : Boot Initialization__ ==
 
-In this this phase the GIET_VM boot-loader is executed by processor (0,0,0), while other processors are in wait state.
+The GIET_VM boot-loader is executed by processor (0,0,0), while other processors are in wait state.
 The GIET-VM boot-loader is defined in the [source:soft/giet_vm/giet_boot/boot.c boot.c] file.
 The main steps are the following:
@@ -48 +50 @@
 to the ''kernel_init()''  function.
 
-== __Phase 3 : Kernel Initialization__ ==
+== __Step 3 : Kernel Initialization__ ==
 
-This phase is executed by all processors in parallel. All processors enter the same [source:soft/giet_vm/giet_kernel/kernel_init.c kernel_init()] function.
-The main steps are the following:
+This code is executed by all processors in parallel. All processors enter the same [source:soft/giet_vm/giet_kernel/kernel_init.c kernel_init()] function that makes the following actions:
 
- * Step 1 : each processor get its scheduler virtual address from CP0_SCHED register and contributes to _schedulers[] array initialisation
- * step 2 : each processor loops on all allocated tasks to build the _ptabs_vaddr[] & _ptabs_ptprs[] arrays from the tasks contexts.
- * step 3 : each processor computes and set the XCU masks, as specified in the HWI, PTI, and WTI interrupt vectors.
- * step 4 : each processor starts its TICK timer if it has at least at least one task allocated
- * step 5 : each processor updates the idle_task context (CTX_SP, CTX_RA, CTX_EPC). 
- * step 6 : when all processors reach the synchronisation barrier, each processor set registers SP, SR, PTPR, EPC, with the values corresponding to the first allocated task, and jump to user code 
+ .1 : each processor get its scheduler virtual address from CP0_SCHED register and contributes to _schedulers[] array initialisation.
+ .2 : each processor loops on all allocated tasks to build the _ptabs_vaddr[] & _ptabs_ptprs[] arrays from the tasks contexts.
+ .3 : each processor computes and set the XCU masks, as specified in the HWI, PTI, and WTI interrupt vectors.
+ .4 : each processor starts its TICK timer if it has at least at least one task allocated.
+ .5 : each processor updates the idle_task context (CTX_SP, CTX_RA, CTX_EPC). 
+ .6 : when all processors reach the synchronisation barrier, each processor set registers SP, SR, PTPR, EPC, with the values corresponding to the first allocated task, and jump to user code.