Changes between Version 21 and Version 22 of boot_loader

Timestamp:

Mar 21, 2015, 12:39:47 PM (9 years ago)

Author:

alain

Comment:

--

boot_loader

@@ -10 +10 @@
 == Phase 1 : Reset Initialization ==
 
-After hard reset, all processors execute the same ''reset'' code (also called ''preloader'' code) stored in the external ROM, but the work done depends on the processor global index: 
+After hard reset, all processors execute the same ''reset'' code (also called ''preloader'' code) stored in the external ROM. The work done depends on the processor global index: 
  * Processor P(0,0,0) load the GIET_VM boot-loader code from the external disk (or another bootable peripheral), to the physical memory bank in cluster(0,0): segments seg_boot_code and seg_boot_data.
  * All other processors initialize their private interrupt controller, to be able to receive an inter-processor interrupt (WTI), and enter ''wait_state'' in low-power mode.
@@ -42 +42 @@
 In each cluster(x,y), processor P(x,y,0) makes the schedulers initialization for all processors in the cluster (function '''boot_schedulers init()''') as specified in the mapping: 
  * There is one scheduler per processor. 
+ * The HWI, PTI, WTI interrupts vectors are initialised.
+ * The local IRQs routing (defined by the XCU masks) is statically defined.
  * Any task defined in any application can be allocated to any processor.
  * The allocation of task to processors is fully static (no task migration).
  * One single processor cannot schedule more than 14 tasks.
-  * One scheduler occupies 8 Kbytes, and contains the contexts of all tasks allocated to the processor (256 bytes per task).
+ * One scheduler occupies 8 Kbytes, and contains the contexts of all tasks allocated to the processor (256 bytes per task).
  
 === step 5 ===
@@ -56 +58 @@
 == Phase 3 : Kernel Initialisation ==
 
-This code is executed in parallel by all processors P(x,y,p). All processors enter the same [source:soft/giet_vm/giet_kernel/kernel_init.c kernel_init.c] code and execute the following steps, separated
-by synchronization barriers when required.
+This code is executed in parallel by all processors P(x,y,p). All processors enter the same [source:soft/giet_vm/giet_kernel/kernel_init.c kernel_init.c] code and execute the following steps, separated by synchronization barriers. Step 0 is done by processor P(0,0,0) only,
+others steps are done by all processors in parallel.
 
 === step 0 ===
-Processor P(0,0,0) makes kernel_heap[x][y] array, kernel fat initialization, TTY0 lock initialization, and barrier initialization.
+Processor P(0,0,0) makes kernel_heap[x][y] array, TTY0 lock initialization, and barrier initialization.
 
 === step 1 ===
@@ -66 +68 @@
 
 === step 2 ===
-Each processor P(x,y,p) loops on all allocated tasks to build the _ptabs_vaddr[vspace] & _ptabs_ptprs[vspace] arrays from the tasks contexts.
+Each processor P(x,y,p) loops on all allocated tasks to build the _ptabs_vaddr[vspace] & _ptabs_ptprs[vspace] arrays from the tasks contexts,
+and to complete the tasks contexts initialization (CTX_RA and CTS_EPC slots).
 
 === step 3 === 
-Each processor P(x,y,p) computes and set the XCU masks, as specified in the HWI, PTI, and WTI interrupt vectors.
+Each processor P(x,y,p) completes its private idle_task context. Each processor P(x,y,p) starts its TICK timer if it has at least one task allocated. Processor P(0,0,0) initializes the kernel FAT.
 
-=== step 4 === 
-Each processor P(x,y,p) starts its TICK timer if it has at least one task allocated.
-
-=== step 5 ===
-Each processor updates its private idle_task context (CTX_SP, CTX_RA, CTX_EPC). 
-
-=== step 6 ===
+=== step 4 ===
 Each processor P(x,y,p) set registers SP, SR, PTPR, EPC, with the values corresponding to the first allocated task, and jump to user code.