Changes between Version 4 and Version 5 of boot_loader

Timestamp:

Nov 5, 2014, 4:59:12 PM (10 years ago)

Author:

alain

Comment:

--

boot_loader

@@ -29 +29 @@
 
 === '''boot_schedulers init()''' ===
-This function makes the schedulers initialisation, as specified in the mapping, with the following principles.
+This function makes the schedulers initialisation, as specified in the mapping, respecting the following principles.
  * There is one scheduler per processor. 
  * Any task defined in any application can be allocated to any processor.
  * The allocation of task to processors is fully static (no task migration).
  * One single processor cannot schedule more than 14 tasks.
- One scheduler occupies 8 Kbytes, and contains the contexts of all tasks allocated to the processor (256 bytes per task).
+  * One scheduler occupies 8 Kbytes, and contains the contexts of all tasks allocated to the processor (256 bytes per task).
  
 === '''boot_peripherals_init()''' ===
 This function makes the external peripherals and coprocessors initialisation. 
 
-
 === '''''boot_elf_load()''' ===
 This function load into memory the kernel code (''kernel.elf'' file), and the user code for all applications specified in the mapping.
-
 
 Finally, processor(0,0,0) starts all other processors, using an inter-processor interrupt (WTI).
@@ -48 +46 @@
 to the ''kernel_init()''  function.
 
-== __Phase 2__ ==
+== __Phase 2 : Kernel__ ==
+
+This phase is executed by all processors in parallel. All processors enter the same [source:soft/giet_vm/giet_kernel/kernel_init.c kernel_init() function.
+The main steps are the following:
+
+ * Step 1 : each processor get its scheduler virtual address from CP0_SCHED register and contributes to _schedulers[] array initialisation
+ * step 2 : each processor loops on all allocated tasks to build the _ptabs_vaddr[] & _ptabs_ptprs[] arrays from the tasks contexts.
+ * step 3 : each processor computes and set the XCU masks, as specified in the HWI, PTI, and WTI interrupt vectors.
+ * step 4 : each processor starts its TICK timer if it has at least at least one task allocated
+ * step 5 : each processor updates the idle_task context (CTX_SP, CTX_RA, CTX_EPC). 
+ * step 6 : when all processors reach the synchronisation barrier, each processor set registers SP, SR, PTPR, EPC, with the values corresponding to the first allocated task, and jump to user code