Changes between Version 68 and Version 69 of library_stdio

Timestamp:

Apr 12, 2015, 1:17:03 PM (9 years ago)

Author:

alain

Comment:

--

library_stdio

@@ -51 +51 @@
 The '''vci_mwmr_dma''' component implements two transfer modes that can be configured by the user application through dedicate system calls.
  * In '''MODE_MWMR''', each channel FSM  implements the 7 steps MWMR protocol. It is activated by writing a non-zero value in the CHANNEL_RUNNING register, and transfer an "infinite" data stream, between the coprocessor port and a MWMR software FIFO in memory. There is no transfer completion signaling, as the synchronisation is done through the MWMR FIFOs. The MWR IRQ is only asserted if a VCI error is reported in memory access. 
- * In '''MODE_DMA_IRQ''' or '''MODE_DMA_NO_IRQ, each channel FSM transfer a single buffer between the coprocessor port and the memory. It is activated by writing a non-zero value in the CHANNEL_RUNNING register. When transfer is completed, the channel FSM keep blocked until a zero value is written in the CHANNEL_RUNNING register. In MODE_DMA_IRQ, the calling task is descheduled after coprocessor activation in the ''giet_coproc_start()'' system call. The transfer completion is signaled by the WMR IRQ that updates the ''_coproc_done'' / ''_coproc_status'' variables, deactivate the coprocessor, and resume the calling task.  In '''MODE_DMA_NO_IRQ''', the ''giet_coproc_start()'' is not blocking, and the user task must use the ''giet_coproc_completed()'' system call to detect transfer completion (by polling the coprocessor registers).
-
-'''WARNING''' : For all channels, the memory buffer address and size  must be multiple of the hardware burst size.
-
-'''WARNING''': If all channels are not running in the same mode, the result is unpredictable.
+ * In '''MODE_DMA_IRQ''' or '''MODE_DMA_NO_IRQ''', each channel FSM transfers a single buffer between the coprocessor port and the memory. It is activated by writing a non-zero value in the CHANNEL_RUNNING register. When transfer is completed, the channel FSM keep blocked until a zero value is written in the CHANNEL_RUNNING register. In MODE_DMA_IRQ, the calling task is descheduled after coprocessor activation in the ''giet_coproc_start()'' system call. The transfer completion is signaled by the MWR IRQ that updates the ''_coproc_done'' / ''_coproc_status'' variables, deactivates the coprocessor, and resumes the calling task.  In '''MODE_DMA_NO_IRQ''', the ''giet_coproc_start()'' is not blocking, and the user task must use the ''giet_coproc_completed()'' system call to detect transfer completion (by polling the coprocessor registers).
+
+'''WARNING''': For a given coprocessor, all channels must be running in the same mode. If this is not the case, the result is unpredictable.
+
+'''WARNING''' : For all channels, the memory buffer base address and size  must be multiple of the hardware burst size.
 
 The VCI transactions corresponding to different TO_COPROC / FROM_COPROC channels are interleaved and parallelized on the VCI network.