52 | | The user application must use the ''giet_coproc_alloc()'' system call to get a private hardware coprocessor. Then it must use the ''giet_coproc_channel_init() system call to configure the TO_COPROC/FROM_COPROC channels. |
53 | | * In '''MODE_MWMR''', each channel FSM implements the 7 steps MWMR protocol. It is activated by writing a non-zero value in the CHANNEL_RUNNING register, and transfer an "infinite" data stream, between one coprocessor port and a MWMR software FIFO in memory. There is no transfer completion signaling, as the synchronisation is done through the MWMR FIFOs. The MWR IRQ is only asserted if a VCI error is reported in memory access. |
54 | | * In '''MODE_DMA_IRQ''' or '''MODE_DMA_NO_IRQ''', each channel FSM transfers a single buffer between one coprocessor port and the memory. It is activated by writing a non-zero value in the CHANNEL_RUNNING register. When transfer is completed, the channel FSM keep blocked until a zero value is written in the CHANNEL_RUNNING register. In '''MODE_DMA_IRQ''', the calling task is descheduled after coprocessor activation in the ''giet_coproc_start()'' system call. The transfer completion is signaled by the MWR IRQ that updates the ''_coproc_done'' / ''_coproc_status'' variables, deactivates the coprocessor, and resumes the calling task. In '''MODE_DMA_NO_IRQ''', the ''giet_coproc_start()'' system call is not blocking, and the user task must use the ''giet_coproc_completed()'' system call to detect transfer completion (by polling the coprocessor registers). |
| 52 | The user application must use the ''giet_coproc_alloc()'' system call to get a private hardware coprocessor. Then it must use the ''giet_coproc_channel_init()'' system call to configure the TO_COPROC/FROM_COPROC channels. |
| 53 | The coprocessor and the communication channels are activated / deactivated by the ''get_coproc_run()'' system call. |
| 54 | * In '''MODE_MWMR''', each channel FSM implements the 7 steps MWMR protocol, and transfer an "infinite" data stream, between one coprocessor port and a MWMR software FIFO in memory. The There is no transfer completion signaling, as the synchronisation is done through the MWMR FIFOs. The MWR IRQ is only asserted if a VCI error is reported in memory access. |
| 55 | * In '''MODE_DMA_IRQ''' or '''MODE_DMA_NO_IRQ''', each channel FSM transfers a single buffer between one coprocessor port and the memory. When transfer is completed, the channel FSM keep blocked until it is re-activated. In '''MODE_DMA_IRQ''', the calling task is descheduled, after coprocessor activation, in the ''giet_coproc_run()'' system call. The transfer completion is signaled by the MWR IRQ that updates the ''_coproc_done'' / ''_coproc_status'' variables, deactivates the coprocessor, and resumes the calling task. In '''MODE_DMA_NO_IRQ''', the ''giet_coproc_start()'' system call is not blocking, and the user task must use the ''giet_coproc_completed()'' system call to detect transfer completion (by polling the coprocessor registers). |