Changes between Version 27 and Version 28 of mapping_info


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Timestamp:
Feb 15, 2015, 11:16:03 AM (9 years ago)
Author:
alain
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  • mapping_info

    v27 v28  
    7171The Mapping( ) constructor build a mapping object and define the target architecture general parameters:
    7272
    73 || name               || mapping name == architecture name ||
    74 || x_size              || number of clusters in a row of the 2D mesh ||
    75 || y_size              || number of clusters in a column of the 2D mesh ||             
    76 || nprocs             || max number of processors per cluster ||     
    77 || x_width           || number of bits to encode X coordinate in paddr  ||
    78 || y_width            || number of bits to encode Y coordinate in paddr  ||
    79 || p_width            || number of bits to encode local processor index  ||
    80 || paddr_width     ||  number of bits in physical address ||
    81 || coherence        || Boolean true if hardware cache coherence ||     
    82 || irq_per_proc     || number of IRQ lines between XCU and one proc (GIET_VM use only one) ||
    83 || use_ramdisk     || Boolean true if the architecture contains a RamDisk ||
    84 || x_io                  || io_cluster X coordinate ||         
    85 || y_io                  || io_cluster Y coordinate ||
    86 || peri_increment || virtual address increment for peripherals replicated in all clusters ||
    87 || reset_address   || physical base address of the ROM containing the preloader code ||
    88 || ram_base          ||physical memory bank base address in cluster [0,0] ||
    89 || ram_size          || physical memory bank size in one cluster (bytes) ||
     73|| '''name'''               || mapping name == architecture name ||
     74|| '''x_size'''              || number of clusters in a row of the 2D mesh ||
     75|| '''y_size'''              || number of clusters in a column of the 2D mesh ||             
     76|| '''nprocs'''             || max number of processors per cluster ||     
     77|| '''x_width'''           || number of bits to encode X coordinate in paddr  ||
     78|| '''y_width'''            || number of bits to encode Y coordinate in paddr  ||
     79|| '''p_width'''            || number of bits to encode local processor index  ||
     80|| '''paddr_width'''     ||  number of bits in physical address ||
     81|| '''coherence'''        || Boolean true if hardware cache coherence ||     
     82|| '''irq_per_proc'''     || number of IRQ lines between XCU and one proc (GIET_VM use only one) ||
     83|| '''use_ramdisk'''     || Boolean true if the architecture contains a RamDisk ||
     84|| '''x_io'''                  || io_cluster X coordinate ||         
     85|| '''y_io'''                  || io_cluster Y coordinate ||
     86|| '''peri_increment''' || virtual address increment for peripherals replicated in all clusters ||
     87|| '''reset_address'''   || physical base address of the ROM containing the preloader code ||
     88|| '''ram_base'''          ||physical memory bank base address in cluster [0,0] ||
     89|| '''ram_size'''          || physical memory bank size in one cluster (bytes) ||
    9090
    9191=== 2. Processor core ===
    9292
    93 The '''mapping.addProc( )''' construct adds one MIPS32 processor core in a cluster (number of processor cores can different in different clusters). It has the following arguments:
    94 || x      || cluster x coordinate ||
    95 || y      || physical ||
    96 || p      || physical memory bank size (bytes) ||
     93The '''mapping.addProc( )''' construct adds one MIPS32 processor core in a cluster. It has the following arguments:
     94|| '''x'''      || cluster x coordinate ||
     95|| '''y'''      || cluster y coordinate ||
     96|| '''p'''      || physical memory bank size (bytes) ||
    9797
    9898The global processor index is : ( ( x << y_width ) + y ) << p_width ) + p
     
    100100=== 3. Physical memory bank ===
    101101
    102 The '''mapping.addRam( )''' construct adds one physical memory bank, and the associated physical segment in a cluster. It has the following arguments:
    103 || name      || segment name ||
    104 || base       || physical memory bank base address ||
    105 || size        || physical memory bank size (bytes) ||
     102The '''mapping.addRam( )''' construct adds one physical memory segment in a cluster. It has the following arguments:
     103|| '''name'''      || pseg name ||
     104|| '''base'''       || physical base address ||
     105|| '''size'''        || segment size (bytes) ||
    106106
    107107The target cluster coordinates (x,y) are implicitely defined by the base address MSB bits.
     
    110110
    111111The '''mapping.addPeriph( )''' construct adds one peripheral, and the associated physical segment in a cluster. It has the following arguments:
    112 || name      || segment name ||
    113 || base       || peripheral segment physical base address ||
    114 || size        || peripheral segment size (bytes) ||
    115 || ptype     || Peripheral type ||
    116 || subtype  || Peripheral subtype ||
    117 || channels || number of channels for multi-channels peripherals ||
    118 || arg          || optionnal argument depending on peripheral type ||
    119 
    120 The target cluster coordinates (x,y) are defined by the base address MSB bits.
     112|| '''name'''      || pseg name ||
     113|| '''base'''       || peripheral segment physical base address ||
     114|| '''size'''        || peripheral segment size (bytes) ||
     115|| '''ptype'''     || Peripheral type ||
     116|| '''subtype'''  || Peripheral subtype ||
     117|| '''channels''' || number of channels for multi-channels peripherals ||
     118|| '''arg'''          || optionnal argument depending on peripheral type ||
     119
     120The target cluster coordinates (x,y) are implicitely defined by the base address MSB bits.
    121121The supported peripheral types and subtypes are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
    122122The optionnal argument has the following semantic:
     
    126126=== 5. Interrupt line ===
    127127
    128 The '''mapping.addIrq()''' construct adds one IRQ line input to an XCU peripheral, or to a PIC peripheral. It has the following arguments:
    129 || periph   || peripheral receiving the IRQ line ||
    130 || index    || input port index ||
    131 || isrtype  || Interrupt Service Routine type ||
    132 || channel || channel index for multi-channel ISR ||
     128The '''mapping.addIrq()''' construct adds one input IRQ line to an XCU peripheral, or to a PIC peripheral. It has the following arguments:
     129|| '''periph'''   || peripheral receiving the IRQ line ||
     130|| '''index'''    || input port index ||
     131|| '''isrtype'''  || Interrupt Service Routine type ||
     132|| '''channel''' || channel index for multi-channel ISR ||
    133133
    134134The supported ISR types are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
     
    141141
    142142The '''mapping.addGlobal()''' construct define the mapping for one kernel vseg. It has the following arguments:
    143 || name       || virtual segment name  ||
    144 || vbase       || virtual base address ||
    145 || size          || segment size (bytes ||
    146 || mode        || access rights (CXWU) ||
    147 || vtype        || vseg type  ||
    148 || x              || destination cluster X coordinate ||
    149 || y              || destination cluster Y coordinate ||
    150 || pseg        || destination pseg name ||
    151 || identity    || identity mapping required (default = False) ||
    152 || binpath    || pathname for binary file if required (default = ' ') ||
    153 || align        || alignment constraint if required (default = 0) ||
    154 || local        || only mapped in local page table if true (default = False) ||
    155 || big          || to be mapped in big pages (default = False) ||
    156 
    157 The supported values for the ''mode'' argument, and for the ''vtype'' arguments are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
     143|| '''name'''       || vseg name  ||
     144|| '''vbase'''       || virtual base address ||
     145|| '''size'''          || segment size (bytes) ||
     146|| '''mode'''        || access rights (CXWU) ||
     147|| '''vtype'''        || vseg type  ||
     148|| '''x'''              || destination cluster X coordinate ||
     149|| '''y'''              || destination cluster Y coordinate ||
     150|| '''pseg'''        || destination pseg name ||
     151|| '''identity'''    || identity mapping required (default = False) ||
     152|| '''binpath'''    || pathname for binary file if required (default = ' ') ||
     153|| '''align'''        || alignment constraint if required (default = 0) ||
     154|| '''local'''        || only mapped in local page table if true (default = False) ||
     155|| '''big'''          || to be mapped in big pages (default = False) ||
     156
     157The supported values for the ''mode'' and ''vtype'' arguments are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
    158158
    159159The (''x'', ''y'', ''pseg'') arguments define actually the vseg placement.
     
    165165 * The '''seg_boot_code''' vseg contains the boot-loader code. It is loaded from disk by the preloader.
    166166 * The '''seg_boot_data''' vseg contains the boot-loader global data.
    167  * The '''seg_boot_stacks''' vseg contains the stacks for all processors.
    168 These 4 vsegs must be identity mapping (because the page table are not available), and are mapped in the first big physical page (2 Mbytes) in cluster [0][0].
     167 * The '''seg_boot_stacks''' vseg contains the temporary stacks for all processors.
     168These 4 vsegs must be identity mapping (because they are accessed when the page table are not yet available), and are mapped in the first big physical page (2 Mbytes) in cluster [0][0].
    169169
    170170=== 2. Kernel vsegs ===
    171171
    172 Most kernel vsegs are replicated or distributed in all clusters, to improve locality and minimize contention, as explained below:
    173  * The '''seg_kernel_ptab_x_y''' vsegs have type PTAB. They contains the page tables for all vspaces (one page table per vspace). There is one such vseg in each cluster (one set of page tables per cluster). Each PTAB vseg is mapped in one big physical page.
     172Most kernel vsegs are replicated or distributed in all clusters, to improve locality and minimize contention during execution, as explained below:
     173 * The '''seg_kernel_ptab_x_y''' vsegs have type PTAB. They contains the page tables associated to  vspaces (one page table per vspace). There is one PTAB vseg per cluster (one set of page tables per cluster). Each PTAB vseg is mapped in one big physical page.
    174174 * The '''seg_kernel_code''' & '''seg_kernel_init''' have type ELF. They contain the kernel code. These two vsegs are mapped in one big physical page. They are  replicated in each cluster. The ''local'' attribute must be set, because the same virtual address will be mapped on different physical address depending on the cluster.   
    175  * The  '''seg_kernel_data''' has type ELF, and contains the kernel global data. They are not replicated, and is mapped in cluster[0][0].
    176  * The '''seg_kernel_sched_x_y''' vseg have type SCHED. It contains the processor schedulers (one scheduler per processor). There is one such vseg in each cluster, and it must be mapped on small pages (two small pages per scheduler).
    177  * The '''seg_kernel_heap_x_y''' vseg have type HEAP, and contain the distributed kernel heap. There is one HEAP vseg per cluster, and is mapped in at least one big page.
     175 * The  '''seg_kernel_data''' has type ELF, and contains the kernel global data. It is not replicated, and is mapped in cluster[0][0].
     176 * The '''seg_kernel_sched_x_y''' vseg have type SCHED. It contains the processor schedulers (one scheduler per processor). There is one SCHED vseg in each cluster, and it is mapped on small pages (two small pages per scheduler).
     177 * The '''seg_kernel_heap_x_y''' vseg have type HEAP, and contain the distributed kernel heap. There is one HEAP vseg per cluster, and is mapped in (at least) one big page.
    178178
    179179=== 3. Peripheral vsegs ===
     
    186186The mapping of a given application  must be defined in the ''application.py'' file.
    187187
    188 A vspace, containing a variable number of tasks, and a variable number of vsegs, must be defined for each application.
    189 
    190 There is several types of user vseg 
     188A vspace, contains a variable number of tasks, and a variable number of vsegs, that must be defined for each application.
     189
     190There is several types of user vseg:
    191191 * The '''code''' vsegs must have type ELF. They can be (optionally) replicated in all clusters.
    192192 * The '''data''' vseg must have type ELF. It is not replicated. It must contain the ''start_vector'' defining the entry points of the application tasks.
    193  * It must exist as many '''stack'''' vseg as the number of tasks. They have type BUFFER, and should be placed in the cluster containing the processor running the task.
    194  * Zero, one or several '''heap''' vseg(s), can be used by the ''malloc'' user library. They must have type HEAP.
    195  * One or several '''mwmr''' vseg(s) can be used by the ''mwmr'' user library. They must have the BUFFER type.
     193 * It must exist as many '''stack'''' vseg as the number of tasks (one private stack per task). They have type BUFFER, and should be placed in the cluster containing the processor running the task.
     194 * One or several '''heap''' vseg(s), can be used by the ''malloc'' user library. They must have type HEAP.
     195 * One or several '''mwmr''' vseg(s) can be used by the ''mwmr'' user library. They must have type BUFFER.
    196196 
    197197=== 1. create the vspace ===
    198198
    199199The '''mapping.addvspace( )''' construct define a vspace. It has the following arguments:
    200 || name        || vspace name == application name  ||
    201 || startname || name of vseg containing the start_vector   ||
     200|| '''name'''        || vspace name == application name  ||
     201|| '''startname''' || name of vseg containing the start_vector   ||
    202202
    203203===  2. vseg mapping ===
    204204
    205205The '''mapping.addVseg( )''' construct define the mapping of a vseg in the vspace. It has the following arguments:
    206 || vspace     || vspace containing the vseg ||
    207 || name       || vseg name ||
    208 || vbase       || virtual base address ||
    209 || size         || vseg size (bytes) ||
    210 || mode      || access rights (CXWU) ||
    211 || vtype       || vseg type ||
    212 || x              || destination cluster X coordinate ||
    213 || y              || destination cluster Y coordinate ||
    214 || pseg        || destination pseg name ||
    215 || binpath    || pathname for binary file if required (default = ' ') ||
    216 || align        || alignment constraint if required (default = 0) ||
    217 || local        || only mapped in local page table if true (default = False) ||
    218 || big          || to be mapped in big pages (default = False) ||
    219 
    220 The supported values for the ''mode'' argument, and for the ''vtype'' arguments are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
     206|| '''vspace'''     || vspace containing the vseg ||
     207|| '''name'''       || vseg name ||
     208|| '''vbase'''       || virtual base address ||
     209|| '''size'''         || vseg size (bytes) ||
     210|| '''mode'''      || access rights (CXWU) ||
     211|| '''vtype'''       || vseg type ||
     212|| '''x'''              || destination cluster X coordinate ||
     213|| '''y'''              || destination cluster Y coordinate ||
     214|| '''pseg'''        || destination pseg name ||
     215|| '''local'''        || only mapped in local page table if true (default = False) ||
     216|| '''big'''          || to be mapped in big pages (default = False) ||
     217|| '''binpath'''   || pathname for binary file if required (default = ' ') ||
     218
     219The supported values for the ''mode'' and ''vtype'' arguments are defined in the [source:soft/giet_vm/giet_python/mapping.py mapping.py] file.
    221220
    222221The (''x'', ''y'', ''pseg'') arguments define actually the vseg placement.
     
    225224
    226225The '''mapping.addTask( )''' construct  defines the mapping of  a task on a processor. It has the following arguments:
    227 || vspace       || vspace containing the task ||
    228 || name         || task name (unique in vspace) ||
    229 || trdid          || thread index (unique in vspace] ||
    230 || x                || destination cluster X coordinate ||
    231 || y                || destination cluster Y coordinate ||
    232 || lpid            || destination processor local index ||
    233 || stackname || name of vseg containing the task stack ||
    234 || heapname  || name of vseg containing the task heap ||
    235 || startid        || index in start vector (defining the task entry point virtual address) ||
     226|| '''vspace'''       || vspace containing the task ||
     227|| '''name'''         || task name (unique in vspace) ||
     228|| '''trdid'''          || thread index (unique in vspace] ||
     229|| '''x'''                || destination cluster X coordinate ||
     230|| '''y'''                || destination cluster Y coordinate ||
     231|| '''lpid'''            || destination processor local index ||
     232|| '''stackname''' || name of vseg containing the task stack ||
     233|| '''heapname'''  || name of vseg containing the task heap ||
     234|| '''startid'''        || index in start vector (defining the task entry point virtual address) ||
    236235
    237236The (''x'', ''y'', ''lpid'') arguments define actually the task placement.