GIET_VM / MWR Driver

The mwr_driver.c​ and mwr_driver.h​ files define the MWR driver.

The vci_mwmr_dma component is a multi-channels hardware component that can be used to connect an hardware coprocesseur to a VCI interconnect. This component provides the coprocessor one or several TO_COPROC or FROM_COPROC FIFO type communication channels, without address. Each T0_COPROC/FROM coproc port contains an hardware FIFO interface (data, r_wok, w_rok signals), plus three signals (REQ, ACK, BURSTS) allowing the coprocessor to request an integer number of data burst. Each burst contains a fixed number of 32 bits words. Each channel implements two running modes:

• in MWMR mode the channel FSM transfer an infinite" stream of data to or from a MWMR software FIFO, implementing the 7 steps MWMR protocol.
• in DMA mode the channel FSM transfer a fixed size chunk of data to or from a memory buffer, with a completion signaling interrupt.

It is an internal peripheral, even if it is not replicated in all clusters.

WARNING : The MWR driver is not available yet.