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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h @ 88

Last change on this file since 88 was 88, checked in by rosiere, 15 years ago
Almost complete design with Test and test platform
Property svn:keywords set to `Id`
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1	#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_write_queue_Write_queue_h
2	#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_write_queue_Write_queue_h
3
4	/*
5	* $Id: Write_queue.h 88 2008-12-10 18:31:39Z rosiere $
6	*
7	* [ Description ]
8	*
9	*/
10
11	#ifdef SYSTEMC
12	#include "systemc.h"
13	#endif
14
15	#include <iostream>
16	#include <list>
17	#include "Common/include/ToString.h"
18	#include "Common/include/Debug.h"
19
20	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Parameters.h"
21	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Types.h"
22
23	#ifdef STATISTICS
24	#include "Behavioural/include/Stat.h"
25	#endif
26	#include "Behavioural/include/Component.h"
27	#ifdef VHDL
28	#include "Behavioural/include/Vhdl.h"
29	#endif
30	#include "Behavioural/include/Usage.h"
31
32	namespace morpheo {
33	namespace behavioural {
34	namespace core {
35	namespace multi_execute_loop {
36	namespace execute_loop {
37	namespace multi_write_unit {
38	namespace write_unit {
39	namespace write_queue {
40
41	class Write_queue
42	#if SYSTEMC
43	: public sc_module
44	#endif
45	{
46	// -----[ fields ]----------------------------------------------------
47	// Parameters
48	protected : const std::string _name;
49	protected : const Parameters * _param;
50	private : const Tusage_t _usage;
51
52	#ifdef STATISTICS
53	public : Stat * _stat;
54
55	private : counter_t * _stat_use_queue;
56	private : counter_t * _stat_average_use_queue;
57	private : counter_t * _stat_percent_use_queue;
58
59	#endif
60
61	public : Component * _component;
62	private : Interfaces * _interfaces;
63
64	#ifdef SYSTEMC
65	// ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
66	// Interface
67	public : SC_CLOCK * in_CLOCK ;
68	public : SC_IN (Tcontrol_t) * in_NRESET ;
69
70	// -----[ Interface "Write_queue_in" ]--------------------------------
71	public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_VAL ;
72	public : SC_OUT(Tcontrol_t ) * out_WRITE_QUEUE_IN_ACK ;
73	public : SC_IN (Tcontext_t ) * in_WRITE_QUEUE_IN_CONTEXT_ID ;
74	public : SC_IN (Tcontext_t ) * in_WRITE_QUEUE_IN_FRONT_END_ID ;
75	public : SC_IN (Tcontext_t ) * in_WRITE_QUEUE_IN_OOO_ENGINE_ID;
76	public : SC_IN (Tpacket_t ) * in_WRITE_QUEUE_IN_PACKET_ID ;
77	//public : SC_IN (Toperation_t ) * in_WRITE_QUEUE_IN_OPERATION ;
78	public : SC_IN (Ttype_t ) * in_WRITE_QUEUE_IN_TYPE ;
79	public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_WRITE_RD ;
80	public : SC_IN (Tgeneral_address_t) * in_WRITE_QUEUE_IN_NUM_REG_RD ;
81	public : SC_IN (Tgeneral_data_t ) * in_WRITE_QUEUE_IN_DATA_RD ;
82	public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_WRITE_RE ;
83	public : SC_IN (Tspecial_address_t) * in_WRITE_QUEUE_IN_NUM_REG_RE ;
84	public : SC_IN (Tspecial_data_t ) * in_WRITE_QUEUE_IN_DATA_RE ;
85	public : SC_IN (Texception_t ) * in_WRITE_QUEUE_IN_EXCEPTION ;
86	public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_IN_NO_SEQUENCE ;
87	public : SC_IN (Tgeneral_data_t ) * in_WRITE_QUEUE_IN_ADDRESS ;
88
89	// -----[ Interface "Write_queue_out" ]-------------------------------
90	public : SC_OUT(Tcontrol_t ) * out_WRITE_QUEUE_OUT_VAL ;
91	public : SC_IN (Tcontrol_t ) * in_WRITE_QUEUE_OUT_ACK ;
92	public : SC_OUT(Tcontext_t ) * out_WRITE_QUEUE_OUT_CONTEXT_ID ;
93	public : SC_OUT(Tcontext_t ) * out_WRITE_QUEUE_OUT_FRONT_END_ID ;
94	public : SC_OUT(Tcontext_t ) * out_WRITE_QUEUE_OUT_OOO_ENGINE_ID;
95	public : SC_OUT(Tpacket_t ) * out_WRITE_QUEUE_OUT_PACKET_ID ;
96	//public : SC_OUT(Toperation_t ) * out_WRITE_QUEUE_OUT_OPERATION ;
97	//public : SC_OUT(Ttype_t ) * out_WRITE_QUEUE_OUT_TYPE ;
98	public : SC_OUT(Tspecial_data_t ) * out_WRITE_QUEUE_OUT_FLAGS ;
99	public : SC_OUT(Texception_t ) * out_WRITE_QUEUE_OUT_EXCEPTION ;
100	public : SC_OUT(Tcontrol_t ) * out_WRITE_QUEUE_OUT_NO_SEQUENCE ;
101	public : SC_OUT(Tgeneral_data_t ) * out_WRITE_QUEUE_OUT_ADDRESS ;
102	public : SC_OUT(Tgeneral_data_t ) * out_WRITE_QUEUE_OUT_DATA ;
103
104	// -----[ Interface "gpr_write" ]-------------------------------------
105	public : SC_OUT(Tcontrol_t ) ** out_GPR_WRITE_VAL ;
106	public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_ACK ;
107	public : SC_OUT(Tcontext_t ) ** out_GPR_WRITE_OOO_ENGINE_ID ;
108	public : SC_OUT(Tgeneral_address_t) ** out_GPR_WRITE_NUM_REG ;
109	public : SC_OUT(Tgeneral_data_t ) ** out_GPR_WRITE_DATA ;
110
111	// -----[ Interface "spr_write" ]-------------------------------------
112	public : SC_OUT(Tcontrol_t ) ** out_SPR_WRITE_VAL ;
113	public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_ACK ;
114	public : SC_OUT(Tcontext_t ) ** out_SPR_WRITE_OOO_ENGINE_ID ;
115	public : SC_OUT(Tspecial_address_t) ** out_SPR_WRITE_NUM_REG ;
116	public : SC_OUT(Tspecial_data_t ) ** out_SPR_WRITE_DATA ;
117
118	// -----[ Interface "bypass_write" ]----------------------------------
119	public : SC_OUT(Tcontext_t ) ** out_BYPASS_WRITE_OOO_ENGINE_ID ;
120	public : SC_OUT(Tcontrol_t ) ** out_BYPASS_WRITE_GPR_VAL ;
121	public : SC_OUT(Tgeneral_address_t) ** out_BYPASS_WRITE_GPR_NUM_REG ; // RD
122	public : SC_OUT(Tgeneral_data_t ) ** out_BYPASS_WRITE_GPR_DATA ;
123	public : SC_OUT(Tcontrol_t ) ** out_BYPASS_WRITE_SPR_VAL ;
124	public : SC_OUT(Tspecial_address_t) ** out_BYPASS_WRITE_SPR_NUM_REG ; // RE
125	public : SC_OUT(Tspecial_data_t ) ** out_BYPASS_WRITE_SPR_DATA ;
126
127	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
128
129	// ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
130	protected : std::list<write_queue_entry_t > _queue;
131
132	// ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
133	Tcontrol_t internal_WRITE_QUEUE_IN_ACK;
134	Tcontrol_t internal_WRITE_QUEUE_OUT_VAL;
135	Tcontrol_t internal_GPR_WRITE_VAL;
136	Tcontrol_t internal_SPR_WRITE_VAL;
137	#endif
138
139	// -----[ Methods ]---------------------------------------------------
140
141	#ifdef SYSTEMC
142	SC_HAS_PROCESS (Write_queue);
143	#endif
144	public : Write_queue
145	(
146	#ifdef SYSTEMC
147	sc_module_name name,
148	#else
149	std::string name,
150	#endif
151	#ifdef STATISTICS
152	morpheo::behavioural::Parameters_Statistics * param_statistics,
153	#endif
154	Parameters * param,
155	morpheo::behavioural::Tusage_t usage
156	);
157	public : ~Write_queue (void);
158
159	private : void allocation (void);
160	private : void deallocation (void);
161
162	#ifdef SYSTEMC
163	public : void transition (void);
164	public : void genMoore (void);
165	#endif
166	#ifdef STATISTICS
167	public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics);
168	#endif
169
170	#if VHDL
171	public : void vhdl (void);
172	private : void vhdl_declaration (Vhdl * & vhdl);
173	private : void vhdl_body (Vhdl * & vhdl);
174	#endif
175
176	#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
177	private : void end_cycle (void);
178	#endif
179	};
180
181	}; // end namespace write_queue
182	}; // end namespace write_unit
183	}; // end namespace multi_write_unit
184	}; // end namespace execute_loop
185	}; // end namespace multi_execute_loop
186	}; // end namespace core
187
188	}; // end namespace behavioural
189	}; // end namespace morpheo
190
191	#endif

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