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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_allocation.cpp @ 74

Last change on this file since 74 was 74, checked in by rosiere, 16 years ago
New component : Read_unit (instance between a write queue and a optionnal execute_queue)
File size: 8.5 KB

Line
1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_execute_loop {
15	namespace execute_loop {
16	namespace multi_write_unit {
17	namespace write_unit {
18	namespace write_queue {
19
20
21	#undef FUNCTION
22	#define FUNCTION "Write_queue::allocation"
23	void Write_queue::allocation (void)
24	{
25	string rename;
26
27	log_printf(FUNC,Write_queue,FUNCTION,"Begin");
28
29	_component = new Component (_usage);
30
31	Entity * entity = _component->set_entity (_name
32	,"Write_queue"
33	#ifdef POSITION
34	,COMBINATORY
35	#endif
36	);
37
38	_interfaces = entity->set_interfaces();
39
40	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
41
42	Interface * interface = _interfaces->set_interface(""
43	#ifdef POSITION
44	,IN
45	,SOUTH,
46	"Generalist interface"
47	#endif
48	);
49
50	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
51	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
52
53	// -----[ Interface "Write_queue_in" ]--------------------------------
54	{
55	ALLOC_INTERFACE ("write_queue_in", IN, WEST, "Input of write_queue");
56
57	ALLOC_VAL_IN ( in_WRITE_QUEUE_IN_VAL);
58	ALLOC_ACK_OUT (out_WRITE_QUEUE_IN_ACK);
59	if(_param->_have_port_context_id)
60	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
61	if(_param->_have_port_front_end_id)
62	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
63	if(_param->_have_port_ooo_engine_id)
64	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id );
65	if(_param->_have_port_packet_id)
66	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id );
67	// ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
68	// ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_TYPE ,"type" ,Ttype_t ,_param->_size_type );
69	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
70	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register );
71	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_DATA_RD ,"data_rd" ,Tgeneral_data_t ,_param->_size_general_data );
72	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
73	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register );
74	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_DATA_RE ,"data_re" ,Tspecial_data_t ,_param->_size_special_data );
75	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception );
76	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1 );
77	ALLOC_SIGNAL_IN ( in_WRITE_QUEUE_IN_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_general_data );
78	}
79
80	// -----[ Interface "Write_queue_out" ]-------------------------------
81	{
82	ALLOC_INTERFACE ("write_queue_out", OUT, EAST, "Output of write_queue");
83
84	ALLOC_VAL_OUT (out_WRITE_QUEUE_OUT_VAL);
85	ALLOC_ACK_IN ( in_WRITE_QUEUE_OUT_ACK);
86	if(_param->_have_port_context_id)
87	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
88	if(_param->_have_port_front_end_id)
89	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id );
90	if(_param->_have_port_ooo_engine_id)
91	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id);
92	if(_param->_have_port_packet_id)
93	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_packet_id );
94	// ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
95	// ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_TYPE ,"type" ,Ttype_t ,_param->_size_type );
96	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_FLAGS ,"flags" ,Tspecial_data_t,_param->_size_special_data );
97	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception );
98	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1 );
99	ALLOC_SIGNAL_OUT(out_WRITE_QUEUE_OUT_ADDRESS ,"address" ,Tgeneral_data_t,_param->_size_general_data );
100	}
101
102	// -----[ Interface "gpr_write" ]-------------------------------------
103	{
104	ALLOC1_INTERFACE("gpr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_gpr_write);
105
106	ALLOC1_VAL_OUT (out_GPR_WRITE_VAL ,_param->_nb_gpr_write);
107	ALLOC1_ACK_IN ( in_GPR_WRITE_ACK ,_param->_nb_gpr_write);
108	if(_param->_have_port_ooo_engine_id)
109	ALLOC1_SIGNAL_OUT(out_GPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ,_param->_nb_gpr_write);
110	ALLOC1_SIGNAL_OUT(out_GPR_WRITE_NUM_REG ,"num_reg" ,Tgeneral_address_t,_param->_size_general_register,_param->_nb_gpr_write);
111	ALLOC1_SIGNAL_OUT(out_GPR_WRITE_DATA ,"data" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_gpr_write);
112	}
113
114	// -----[ Interface "spr_write" ]-------------------------------------
115	{
116	ALLOC1_INTERFACE("spr_write", OUT, SOUTH ,"Output of write_queue", _param->_nb_spr_write);
117
118	ALLOC1_VAL_OUT (out_SPR_WRITE_VAL ,_param->_nb_spr_write);
119	ALLOC1_ACK_IN ( in_SPR_WRITE_ACK ,_param->_nb_spr_write);
120	if(_param->_have_port_ooo_engine_id)
121	ALLOC1_SIGNAL_OUT(out_SPR_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id ,_param->_nb_spr_write);
122	ALLOC1_SIGNAL_OUT(out_SPR_WRITE_NUM_REG ,"num_reg" ,Tspecial_address_t,_param->_size_special_register,_param->_nb_spr_write);
123	ALLOC1_SIGNAL_OUT(out_SPR_WRITE_DATA ,"data" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_spr_write);
124	}
125
126	// -----[ Interface "bypass_write" ]----------------------------------
127	{
128	ALLOC1_INTERFACE("bypass_write", OUT, NORTH ,"Output of internal write_queue", _param->_nb_bypass_write);
129
130	if(_param->_have_port_ooo_engine_id)
131	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_OOO_ENGINE_ID,"ooo_engine_id",Tcontext_t ,_param->_size_ooo_engine_id , _param->_nb_bypass_write);
132	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_VAL ,"gpr_val" ,Tcontrol_t ,1 , _param->_nb_bypass_write);
133	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_NUM_REG ,"gpr_num_reg" ,Tgeneral_address_t,_param->_size_general_register, _param->_nb_bypass_write);
134	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_GPR_DATA ,"gpr_data" ,Tgeneral_data_t ,_param->_size_general_data , _param->_nb_bypass_write);
135	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_VAL ,"spr_val" ,Tcontrol_t ,1 , _param->_nb_bypass_write);
136	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_NUM_REG ,"spr_num_reg" ,Tspecial_address_t,_param->_size_special_register, _param->_nb_bypass_write);
137	ALLOC1_SIGNAL_OUT(out_BYPASS_WRITE_SPR_DATA ,"spr_data" ,Tspecial_data_t ,_param->_size_special_data , _param->_nb_bypass_write);
138	}
139	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
140
141	_queue = new list<write_queue_entry_t *>;
142
143	#ifdef POSITION
144	_component->generate_file();
145	#endif
146
147	log_printf(FUNC,Write_queue,FUNCTION,"End");
148	};
149
150	}; // end namespace write_queue
151	}; // end namespace write_unit
152	}; // end namespace multi_write_unit
153	}; // end namespace execute_loop
154	}; // end namespace multi_execute_loop
155	}; // end namespace core
156
157	}; // end namespace behavioural
158	}; // end namespace morpheo

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