source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy.cpp @ 115

Last change on this file since 115 was 115, checked in by rosiere, 15 years ago

1) Write queue with mealy
2) Network : fix bug
3) leak memory

  • Property svn:keywords set to Id
File size: 3.9 KB
Line 
1#ifdef SYSTEMC
2/*
3 * $Id: Write_queue_genMealy.cpp 115 2009-04-20 21:29:17Z rosiere $
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_execute_loop {
15namespace execute_loop {
16namespace multi_write_unit {
17namespace write_unit {
18namespace write_queue {
19
20
21#undef  FUNCTION
22#define FUNCTION "Write_queue::genMealy"
23  void Write_queue::genMealy (void)
24  {
25    log_begin(Write_queue,FUNCTION);
26    log_function(Write_queue,FUNCTION,_name.c_str());
27   
28    // -----[ Interface "bypass_write" ]----------------------------------
29    // in genMoore
30    // -----[ Interface "Write_queue_in" ]--------------------------------
31    // in genMoore
32
33    bool       val      = not _queue->empty();
34    Tcontrol_t write_rd = val and _queue->front()->_write_rd;
35    Tcontrol_t write_re = val and _queue->front()->_write_re;
36
37    // -----[ Interface "gpr_write" ]-------------------------------------
38    // -----[ Interface "spr_write" ]-------------------------------------
39    {
40      internal_GPR_WRITE_VAL = val and write_rd;
41      internal_SPR_WRITE_VAL = val and write_re;
42     
43      PORT_WRITE(out_GPR_WRITE_VAL [0], internal_GPR_WRITE_VAL);
44      PORT_WRITE(out_SPR_WRITE_VAL [0], internal_SPR_WRITE_VAL);
45
46      write_rd = (write_rd)?(not PORT_READ(in_GPR_WRITE_ACK [0])):0;
47      write_re = (write_re)?(not PORT_READ(in_SPR_WRITE_ACK [0])):0;
48
49      if (val)
50        {
51          if (_param->_have_port_ooo_engine_id)
52          {
53          PORT_WRITE(out_GPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
54          PORT_WRITE(out_SPR_WRITE_OOO_ENGINE_ID [0], _queue->front()->_ooo_engine_id);
55          }
56          PORT_WRITE(out_GPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_rd);
57          PORT_WRITE(out_GPR_WRITE_DATA          [0], _queue->front()->_data_rd   );
58          PORT_WRITE(out_SPR_WRITE_NUM_REG       [0], _queue->front()->_num_reg_re);
59          PORT_WRITE(out_SPR_WRITE_DATA          [0], _queue->front()->_data_re   );
60        }
61    }
62
63    // -----[ Interface "Write_queue_out" ]--------------------------------
64    {
65      Texception_t load_speculative = (_queue->front()->_exception == EXCEPTION_MEMORY_LOAD_SPECULATIVE);
66
67      internal_WRITE_QUEUE_OUT_VAL = ((val                 ) and
68                                      (not load_speculative) and
69                                      (not write_rd        ) and
70                                      (not write_re        ));
71     
72      PORT_WRITE(out_WRITE_QUEUE_OUT_VAL, internal_WRITE_QUEUE_OUT_VAL);
73
74      if (internal_WRITE_QUEUE_OUT_VAL)
75        {
76          if (_param->_have_port_context_id)
77          PORT_WRITE(out_WRITE_QUEUE_OUT_CONTEXT_ID   , _queue->front()->_context_id   );
78          if (_param->_have_port_front_end_id)
79          PORT_WRITE(out_WRITE_QUEUE_OUT_FRONT_END_ID , _queue->front()->_front_end_id );
80          if (_param->_have_port_ooo_engine_id)
81          PORT_WRITE(out_WRITE_QUEUE_OUT_OOO_ENGINE_ID, _queue->front()->_ooo_engine_id);
82          if (_param->_have_port_rob_ptr  )
83          PORT_WRITE(out_WRITE_QUEUE_OUT_PACKET_ID    , _queue->front()->_packet_id    );
84//        PORT_WRITE(out_WRITE_QUEUE_OUT_OPERATION    , _queue->front()->_operation    );
85//        PORT_WRITE(out_WRITE_QUEUE_OUT_TYPE         , _queue->front()->_type         );
86          PORT_WRITE(out_WRITE_QUEUE_OUT_FLAGS        , _queue->front()->_data_re      );
87          PORT_WRITE(out_WRITE_QUEUE_OUT_EXCEPTION    , _queue->front()->_exception    );
88          PORT_WRITE(out_WRITE_QUEUE_OUT_NO_SEQUENCE  , _queue->front()->_no_sequence  );
89          PORT_WRITE(out_WRITE_QUEUE_OUT_ADDRESS      , _queue->front()->_address      );
90          PORT_WRITE(out_WRITE_QUEUE_OUT_DATA         , _queue->front()->_data_rd      );
91        }
92    }
93
94    log_end(Write_queue,FUNCTION);
95  };
96
97}; // end namespace write_queue
98}; // end namespace write_unit
99}; // end namespace multi_write_unit
100}; // end namespace execute_loop
101}; // end namespace multi_execute_loop
102}; // end namespace core
103
104}; // end namespace behavioural
105}; // end namespace morpheo             
106#endif
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