source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/src/Write_queue_genMealy_bypass.cpp @ 118

Last change on this file since 118 was 118, checked in by rosiere, 15 years ago

1) Stat List : scan all queue to find free register
2) Write_queue : test "genMealy" add bypass [0]
3) Functionnal_unit : add const parameters to add or not the pipeline_in
4) Load Store Unit : if load make an exception, free nb_check
5) Debug, change test to add model

  • Property svn:keywords set to Id
File size: 1.8 KB
Line 
1#ifdef SYSTEMC
2/*
3 * $Id: Write_queue_genMealy_bypass.cpp 118 2009-05-20 22:01:32Z rosiere $
4 *
5 * [ Description ]
6 *
7 */
8
9#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
10
11namespace morpheo                    {
12namespace behavioural {
13namespace core {
14namespace multi_execute_loop {
15namespace execute_loop {
16namespace multi_write_unit {
17namespace write_unit {
18namespace write_queue {
19
20
21#undef  FUNCTION
22#define FUNCTION "Write_queue::genMealy_bypass"
23  void Write_queue::genMealy_bypass (void)
24  {
25    log_begin(Write_queue,FUNCTION);
26    log_function(Write_queue,FUNCTION,_name.c_str());
27
28    Tcontrol_t val = PORT_READ(in_WRITE_QUEUE_IN_VAL);
29
30    if (_param->_have_port_ooo_engine_id)
31    PORT_WRITE(out_BYPASS_WRITE_OOO_ENGINE_ID [0], PORT_READ(in_WRITE_QUEUE_IN_OOO_ENGINE_ID));
32    PORT_WRITE(out_BYPASS_WRITE_GPR_VAL       [0], val and PORT_READ(in_WRITE_QUEUE_IN_WRITE_RD     ));
33    PORT_WRITE(out_BYPASS_WRITE_GPR_NUM_REG   [0], PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RD   )); // RD
34    PORT_WRITE(out_BYPASS_WRITE_GPR_DATA      [0], PORT_READ(in_WRITE_QUEUE_IN_DATA_RD      ));
35    PORT_WRITE(out_BYPASS_WRITE_SPR_VAL       [0], val and PORT_READ(in_WRITE_QUEUE_IN_WRITE_RE     ));
36    PORT_WRITE(out_BYPASS_WRITE_SPR_NUM_REG   [0], PORT_READ(in_WRITE_QUEUE_IN_NUM_REG_RE   )); // RE
37    PORT_WRITE(out_BYPASS_WRITE_SPR_DATA      [0], PORT_READ(in_WRITE_QUEUE_IN_DATA_RE      ));
38   
39    // -----[ Interface "bypass_write" ]----------------------------------
40
41    log_end(Write_queue,FUNCTION);
42  };
43
44}; // end namespace write_queue
45}; // end namespace write_unit
46}; // end namespace multi_write_unit
47}; // end namespace execute_loop
48}; // end namespace multi_execute_loop
49}; // end namespace core
50
51}; // end namespace behavioural
52}; // end namespace morpheo             
53#endif
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