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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Write_unit.h @ 136

Last change on this file since 136 was 136, checked in by rosiere, 15 years ago
1) Add new algo in ifetch queue 2) Add Cancel bit 3) new config
Property svn:keywords set to `Id`
File size: 8.2 KB

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1	#ifndef morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Write_unit_h
2	#define morpheo_behavioural_core_multi_execute_loop_execute_loop_multi_write_unit_write_unit_Write_unit_h
3
4	/*
5	* $Id: Write_unit.h 136 2009-10-20 18:52:15Z rosiere $
6	*
7	* [ Description ]
8	*
9	*/
10
11	#ifdef SYSTEMC
12	#include "systemc.h"
13	#endif
14
15	#include <iostream>
16	#include "Common/include/ToString.h"
17	#include "Common/include/Debug.h"
18	#include "Behavioural/include/Types.h"
19
20	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/include/Parameters.h"
21	#ifdef STATISTICS
22	#include "Behavioural/include/Stat.h"
23	#endif
24	#include "Behavioural/include/Component.h"
25	#ifdef VHDL
26	#include "Behavioural/include/Vhdl.h"
27	#endif
28	#include "Behavioural/include/Usage.h"
29
30	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Write_queue/include/Write_queue.h"
31	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Multi_Write_unit/Write_unit/Execute_queue/include/Execute_queue.h"
32
33	namespace morpheo {
34	namespace behavioural {
35	namespace core {
36	namespace multi_execute_loop {
37	namespace execute_loop {
38	namespace multi_write_unit {
39	namespace write_unit {
40
41	class Write_unit
42	#if SYSTEMC
43	: public sc_module
44	#endif
45	{
46	// -----[ fields ]----------------------------------------------------
47	// Parameters
48	protected : const std::string _name;
49	protected : const Parameters * _param;
50	public : Tusage_t _usage;
51
52	#ifdef STATISTICS
53	public : Stat * _stat;
54	#endif
55
56	public : Component * _component;
57	private : Interfaces * _interfaces;
58
59	#ifdef SYSTEMC
60	// ~~~~~[ Interface ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
61	// Interface
62	public : SC_CLOCK * in_CLOCK ;
63	public : SC_IN (Tcontrol_t) * in_NRESET ;
64
65	// -----[ Interface "write_unit_in" ]---------------------------------
66	public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_VAL ;
67	public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_IN_ACK ;
68	public : SC_IN (Tcontext_t ) * in_WRITE_UNIT_IN_CONTEXT_ID ;
69	public : SC_IN (Tcontext_t ) * in_WRITE_UNIT_IN_FRONT_END_ID ;
70	public : SC_IN (Tcontext_t ) * in_WRITE_UNIT_IN_OOO_ENGINE_ID;
71	public : SC_IN (Tpacket_t ) * in_WRITE_UNIT_IN_PACKET_ID ;
72	//public : SC_IN (Toperation_t ) * in_WRITE_UNIT_IN_OPERATION ;
73	//public : SC_IN (Ttype_t ) * in_WRITE_UNIT_IN_TYPE ;
74	public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_CANCEL ;
75	public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_WRITE_RD ;
76	public : SC_IN (Tgeneral_address_t) * in_WRITE_UNIT_IN_NUM_REG_RD ;
77	public : SC_IN (Tgeneral_data_t ) * in_WRITE_UNIT_IN_DATA_RD ;
78	public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_WRITE_RE ;
79	public : SC_IN (Tspecial_address_t) * in_WRITE_UNIT_IN_NUM_REG_RE ;
80	public : SC_IN (Tspecial_data_t ) * in_WRITE_UNIT_IN_DATA_RE ;
81	public : SC_IN (Texception_t ) * in_WRITE_UNIT_IN_EXCEPTION ;
82	public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_IN_NO_SEQUENCE ;
83	public : SC_IN (Taddress_t ) * in_WRITE_UNIT_IN_ADDRESS ;
84
85	// -----[ Interface "write_unit_out" ]--------------------------------
86	public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_VAL ;
87	public : SC_IN (Tcontrol_t ) * in_WRITE_UNIT_OUT_ACK ;
88	public : SC_OUT(Tcontext_t ) * out_WRITE_UNIT_OUT_CONTEXT_ID ;
89	public : SC_OUT(Tcontext_t ) * out_WRITE_UNIT_OUT_FRONT_END_ID ;
90	public : SC_OUT(Tcontext_t ) * out_WRITE_UNIT_OUT_OOO_ENGINE_ID;
91	public : SC_OUT(Tpacket_t ) * out_WRITE_UNIT_OUT_PACKET_ID ;
92	//public : SC_OUT(Toperation_t ) * out_WRITE_UNIT_OUT_OPERATION ;
93	//public : SC_OUT(Ttype_t ) * out_WRITE_UNIT_OUT_TYPE ;
94	public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_CANCEL ;
95	public : SC_OUT(Tspecial_data_t ) * out_WRITE_UNIT_OUT_FLAGS ;
96	public : SC_OUT(Texception_t ) * out_WRITE_UNIT_OUT_EXCEPTION ;
97	public : SC_OUT(Tcontrol_t ) * out_WRITE_UNIT_OUT_NO_SEQUENCE ;
98	public : SC_OUT(Taddress_t ) * out_WRITE_UNIT_OUT_ADDRESS ;
99	public : SC_OUT(Tgeneral_data_t ) * out_WRITE_UNIT_OUT_DATA ;
100
101	// -----[ Interface "gpr_write" ]-------------------------------------
102	public : SC_OUT(Tcontrol_t ) ** out_GPR_WRITE_VAL ;
103	public : SC_IN (Tcontrol_t ) ** in_GPR_WRITE_ACK ;
104	public : SC_OUT(Tcontext_t ) ** out_GPR_WRITE_OOO_ENGINE_ID ;
105	public : SC_OUT(Tgeneral_address_t) ** out_GPR_WRITE_NUM_REG ;
106	public : SC_OUT(Tgeneral_data_t ) ** out_GPR_WRITE_DATA ;
107
108	// -----[ Interface "spr_write" ]-------------------------------------
109	public : SC_OUT(Tcontrol_t ) ** out_SPR_WRITE_VAL ;
110	public : SC_IN (Tcontrol_t ) ** in_SPR_WRITE_ACK ;
111	public : SC_OUT(Tcontext_t ) ** out_SPR_WRITE_OOO_ENGINE_ID ;
112	public : SC_OUT(Tspecial_address_t) ** out_SPR_WRITE_NUM_REG ;
113	public : SC_OUT(Tspecial_data_t ) ** out_SPR_WRITE_DATA ;
114
115	// -----[ Interface "bypass_write" ]----------------------------------
116	public : SC_OUT(Tcontext_t ) ** out_BYPASS_WRITE_OOO_ENGINE_ID ;
117	public : SC_OUT(Tcontrol_t ) ** out_BYPASS_WRITE_GPR_VAL ;
118	public : SC_OUT(Tgeneral_address_t) ** out_BYPASS_WRITE_GPR_NUM_REG ; // RD
119	public : SC_OUT(Tgeneral_data_t ) ** out_BYPASS_WRITE_GPR_DATA ;
120	public : SC_OUT(Tcontrol_t ) ** out_BYPASS_WRITE_SPR_VAL ;
121	public : SC_OUT(Tspecial_address_t) ** out_BYPASS_WRITE_SPR_NUM_REG ; // RE
122	public : SC_OUT(Tspecial_data_t ) ** out_BYPASS_WRITE_SPR_DATA ;
123
124	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
125
126	private : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::write_queue ::Write_queue * component_write_queue ;
127	private : morpheo::behavioural::core::multi_execute_loop::execute_loop::multi_write_unit::write_unit::execute_queue::Execute_queue * component_execute_queue;
128
129	// ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
130
131	// ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
132	#endif
133
134	// -----[ Methods ]---------------------------------------------------
135
136	#ifdef SYSTEMC
137	SC_HAS_PROCESS (Write_unit);
138	#endif
139	public : Write_unit
140	(
141	#ifdef SYSTEMC
142	sc_module_name name,
143	#else
144	std::string name,
145	#endif
146	#ifdef STATISTICS
147	morpheo::behavioural::Parameters_Statistics * param_statistics,
148	#endif
149	Parameters * param,
150	morpheo::behavioural::Tusage_t usage
151	);
152	public : ~Write_unit (void);
153
154	private : void allocation (
155	#ifdef STATISTICS
156	morpheo::behavioural::Parameters_Statistics * param_statistics
157	#else
158	void
159	#endif
160	);
161	private : void deallocation (void);
162
163	#ifdef SYSTEMC
164	#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
165	public : void transition (void);
166	#endif
167	#endif
168	#ifdef STATISTICS
169	public : void statistics_declaration (morpheo::behavioural::Parameters_Statistics * param_statistics);
170	#endif
171
172	#if VHDL
173	public : void vhdl (void);
174	#endif
175
176	#if defined(STATISTICS) or defined(VHDL_TESTBENCH)
177	private : void end_cycle (void);
178	#endif
179	};
180
181	}; // end namespace write_unit
182	}; // end namespace multi_write_unit
183	}; // end namespace execute_loop
184	}; // end namespace multi_execute_loop
185	}; // end namespace core
186
187	}; // end namespace behavioural
188	}; // end namespace morpheo
189
190	#endif

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