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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/src/test.cpp @ 64

Last change on this file since 64 was 64, checked in by rosiere, 17 years ago
test du Register_unit
File size: 39.1 KB

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1	/*
2	* $Id$
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#include "Behavioural/Core/Multi_Execute_loop/Execute_loop/Register_unit/SelfTest/include/test.h"
10	#include "Common/include/Test.h"
11
12	#define NB_ITERATION 1
13	#define CYCLE_MAX (10240*NB_ITERATION)
14
15	#define LABEL(str) \
16	{ \
17	cout << "{"+toString(static_cast<uint32_t>(sc_simulation_time()))+"} " << str << endl; \
18	} while(0)
19
20	static uint32_t cycle = 0;
21
22	#define SC_START(cycle_offset) \
23	do \
24	{ \
25	/cout << "SC_START (begin)" << endl;/ \
26	\
27	uint32_t cycle_current = static_cast<uint32_t>(sc_simulation_time()); \
28	if (cycle_current != cycle) \
29	{ \
30	cycle = cycle_current; \
31	cout << "##########[ cycle "<< cycle << " ]" << endl; \
32	} \
33	\
34	if (cycle_current > CYCLE_MAX) \
35	{ \
36	TEST_KO("Maximal cycles Reached"); \
37	} \
38	sc_start(cycle_offset); \
39	/cout << "SC_START (end )" << endl;/ \
40	} while(0)
41
42	void test (string name,
43	morpheo::behavioural::core::multi_execute_loop::execute_loop::register_unit::Parameters * _param)
44	{
45	cout << "<" << name << "> : Simulation SystemC" << endl;
46
47	#ifdef STATISTICS
48	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
49	#endif
50
51	Register_unit * _Register_unit = new Register_unit (name.c_str(),
52	#ifdef STATISTICS
53	_parameters_statistics,
54	#endif
55	_param);
56
57	#ifdef SYSTEMC
58	/*********************************************************************
59	* Déclarations des signaux
60	*********************************************************************/
61	sc_clock * in_CLOCK;
62	sc_signal<Tcontrol_t> * in_NRESET;
63
64	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
65	sc_signal<Tcontrol_t > ** in_GPR_READ_VAL ;
66	sc_signal<Tcontrol_t > ** out_GPR_READ_ACK ;
67	sc_signal<Tcontext_t > ** in_GPR_READ_OOO_ENGINE_ID ;
68	sc_signal<Tgeneral_address_t> ** in_GPR_READ_NUM_REG ;
69	sc_signal<Tgeneral_data_t > ** out_GPR_READ_DATA ;
70	sc_signal<Tcontrol_t > ** out_GPR_READ_DATA_VAL ;
71
72	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
73	sc_signal<Tcontrol_t > ** in_GPR_WRITE_VAL ;
74	sc_signal<Tcontrol_t > ** out_GPR_WRITE_ACK ;
75	sc_signal<Tcontext_t > ** in_GPR_WRITE_OOO_ENGINE_ID ;
76	sc_signal<Tgeneral_address_t> ** in_GPR_WRITE_NUM_REG ;
77	sc_signal<Tgeneral_data_t > ** in_GPR_WRITE_DATA ;
78
79	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
80	sc_signal<Tcontrol_t > ** in_SPR_READ_VAL ;
81	sc_signal<Tcontrol_t > ** out_SPR_READ_ACK ;
82	sc_signal<Tcontext_t > ** in_SPR_READ_OOO_ENGINE_ID ;
83	sc_signal<Tspecial_address_t> ** in_SPR_READ_NUM_REG ;
84	sc_signal<Tspecial_data_t > ** out_SPR_READ_DATA ;
85	sc_signal<Tcontrol_t > ** out_SPR_READ_DATA_VAL ;
86
87	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
88	sc_signal<Tcontrol_t > ** in_SPR_WRITE_VAL ;
89	sc_signal<Tcontrol_t > ** out_SPR_WRITE_ACK ;
90	sc_signal<Tcontext_t > ** in_SPR_WRITE_OOO_ENGINE_ID ;
91	sc_signal<Tspecial_address_t> ** in_SPR_WRITE_NUM_REG ;
92	sc_signal<Tspecial_data_t > ** in_SPR_WRITE_DATA ;
93
94	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
95	sc_signal<Tcontrol_t > *** in_INSERT_ROB_VAL ;
96	sc_signal<Tcontrol_t > *** out_INSERT_ROB_ACK ;
97	sc_signal<Tcontrol_t > *** in_INSERT_ROB_RD_USE ;
98	sc_signal<Tgeneral_address_t> *** in_INSERT_ROB_RD_NUM_REG ; // use=1 : status[num_reg]<- 0
99	sc_signal<Tcontrol_t > *** in_INSERT_ROB_RE_USE ;
100	sc_signal<Tspecial_address_t> *** in_INSERT_ROB_RE_NUM_REG ;
101
102	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
103	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_VAL ;
104	sc_signal<Tcontrol_t > *** out_RETIRE_ROB_ACK ;
105	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_OLD_USE ;
106	sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_OLD_NUM_REG ; // old_use=1 : status[old_num_reg]<- 0
107	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RD_NEW_USE ;
108	sc_signal<Tgeneral_address_t> *** in_RETIRE_ROB_RD_NEW_NUM_REG ; // new_use=1 : status[new_num_reg]<- 1
109	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_OLD_USE ;
110	sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_OLD_NUM_REG ;
111	sc_signal<Tcontrol_t > *** in_RETIRE_ROB_RE_NEW_USE ;
112	sc_signal<Tspecial_address_t> *** in_RETIRE_ROB_RE_NEW_NUM_REG ;
113
114	string rename = "signal";
115
116	in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
117	in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
118
119
120	// ~~~~~[ Interface "gpr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
121	in_GPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
122	out_GPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
123	in_GPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_read];
124	in_GPR_READ_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_read];
125	out_GPR_READ_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_read];
126	out_GPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_read];
127
128	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
129	{
130	in_GPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
131	out_GPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
132	in_GPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
133	in_GPR_READ_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str());
134	out_GPR_READ_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str());
135	out_GPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
136	}
137
138	// ~~~~~[ Interface "gpr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
139	in_GPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
140	out_GPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_gpr_write];
141	in_GPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_gpr_write];
142	in_GPR_WRITE_NUM_REG = new sc_signal<Tgeneral_address_t> * [_param->_nb_gpr_write];
143	in_GPR_WRITE_DATA = new sc_signal<Tgeneral_data_t > * [_param->_nb_gpr_write];
144
145	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
146	{
147	in_GPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
148	out_GPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
149	in_GPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
150	in_GPR_WRITE_NUM_REG [i]= new sc_signal<Tgeneral_address_t> (rename.c_str());
151	in_GPR_WRITE_DATA [i]= new sc_signal<Tgeneral_data_t > (rename.c_str());
152	}
153
154	// ~~~~~[ Interface "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
155	in_SPR_READ_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
156	out_SPR_READ_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
157	in_SPR_READ_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_read];
158	in_SPR_READ_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_read];
159	out_SPR_READ_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_read];
160	out_SPR_READ_DATA_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_read];
161
162	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
163	{
164	in_SPR_READ_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
165	out_SPR_READ_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
166	in_SPR_READ_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
167	in_SPR_READ_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str());
168	out_SPR_READ_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str());
169	out_SPR_READ_DATA_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
170	}
171
172	// ~~~~~[ Interface "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
173	in_SPR_WRITE_VAL = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
174	out_SPR_WRITE_ACK = new sc_signal<Tcontrol_t > * [_param->_nb_spr_write];
175	in_SPR_WRITE_OOO_ENGINE_ID = new sc_signal<Tcontext_t > * [_param->_nb_spr_write];
176	in_SPR_WRITE_NUM_REG = new sc_signal<Tspecial_address_t> * [_param->_nb_spr_write];
177	in_SPR_WRITE_DATA = new sc_signal<Tspecial_data_t > * [_param->_nb_spr_write];
178
179	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
180	{
181	in_SPR_WRITE_VAL [i]= new sc_signal<Tcontrol_t > (rename.c_str());
182	out_SPR_WRITE_ACK [i]= new sc_signal<Tcontrol_t > (rename.c_str());
183	in_SPR_WRITE_OOO_ENGINE_ID [i]= new sc_signal<Tcontext_t > (rename.c_str());
184	in_SPR_WRITE_NUM_REG [i]= new sc_signal<Tspecial_address_t> (rename.c_str());
185	in_SPR_WRITE_DATA [i]= new sc_signal<Tspecial_data_t > (rename.c_str());
186	}
187
188	// ~~~~~[ Interface "insert_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
189	in_INSERT_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
190	out_INSERT_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
191	in_INSERT_ROB_RD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
192	in_INSERT_ROB_RD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
193	in_INSERT_ROB_RE_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
194	in_INSERT_ROB_RE_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
195
196	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
197	{
198	uint32_t x=_param->_nb_inst_insert_rob [i];
199
200	in_INSERT_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x];
201	out_INSERT_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x];
202	in_INSERT_ROB_RD_USE [i] = new sc_signal<Tcontrol_t > * [x];
203	in_INSERT_ROB_RD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
204	in_INSERT_ROB_RE_USE [i] = new sc_signal<Tcontrol_t > * [x];
205	in_INSERT_ROB_RE_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
206
207	for (uint32_t j=0; j<x; j++)
208	{
209	in_INSERT_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
210	out_INSERT_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
211	in_INSERT_ROB_RD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
212	in_INSERT_ROB_RD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
213	in_INSERT_ROB_RE_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
214	in_INSERT_ROB_RE_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
215
216	}
217	}
218
219	// ~~~~~[ Interface "retire_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
220	in_RETIRE_ROB_VAL = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
221	out_RETIRE_ROB_ACK = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
222	in_RETIRE_ROB_RD_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
223	in_RETIRE_ROB_RD_OLD_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
224	in_RETIRE_ROB_RE_OLD_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
225	in_RETIRE_ROB_RE_OLD_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
226	in_RETIRE_ROB_RD_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
227	in_RETIRE_ROB_RD_NEW_NUM_REG = new sc_signal<Tgeneral_address_t> ** [_param->_nb_ooo_engine];
228	in_RETIRE_ROB_RE_NEW_USE = new sc_signal<Tcontrol_t > ** [_param->_nb_ooo_engine];
229	in_RETIRE_ROB_RE_NEW_NUM_REG = new sc_signal<Tspecial_address_t> ** [_param->_nb_ooo_engine];
230
231	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
232	{
233	uint32_t x=_param->_nb_inst_retire_rob [i];
234
235	in_RETIRE_ROB_VAL [i] = new sc_signal<Tcontrol_t > * [x];
236	out_RETIRE_ROB_ACK [i] = new sc_signal<Tcontrol_t > * [x];
237	in_RETIRE_ROB_RD_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x];
238	in_RETIRE_ROB_RD_OLD_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
239	in_RETIRE_ROB_RE_OLD_USE [i] = new sc_signal<Tcontrol_t > * [x];
240	in_RETIRE_ROB_RE_OLD_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
241	in_RETIRE_ROB_RD_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x];
242	in_RETIRE_ROB_RD_NEW_NUM_REG [i] = new sc_signal<Tgeneral_address_t> * [x];
243	in_RETIRE_ROB_RE_NEW_USE [i] = new sc_signal<Tcontrol_t > * [x];
244	in_RETIRE_ROB_RE_NEW_NUM_REG [i] = new sc_signal<Tspecial_address_t> * [x];
245
246	for (uint32_t j=0; j<x; j++)
247	{
248	in_RETIRE_ROB_VAL [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
249	out_RETIRE_ROB_ACK [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
250	in_RETIRE_ROB_RD_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
251	in_RETIRE_ROB_RD_OLD_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
252	in_RETIRE_ROB_RE_OLD_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
253	in_RETIRE_ROB_RE_OLD_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
254	in_RETIRE_ROB_RD_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
255	in_RETIRE_ROB_RD_NEW_NUM_REG [i][j] = new sc_signal<Tgeneral_address_t> (rename.c_str());
256	in_RETIRE_ROB_RE_NEW_USE [i][j] = new sc_signal<Tcontrol_t > (rename.c_str());
257	in_RETIRE_ROB_RE_NEW_NUM_REG [i][j] = new sc_signal<Tspecial_address_t> (rename.c_str());
258	}
259	}
260
261
262	/********************************************************
263	* Instanciation
264	********************************************************/
265
266	cout << "<" << name << "> Instanciation of _Register_unit" << endl;
267
268	((_Register_unit->in_CLOCK)) ((in_CLOCK));
269	((_Register_unit->in_NRESET)) ((in_NRESET));
270
271	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
272	{
273	((_Register_unit-> in_GPR_READ_VAL [i]))(( in_GPR_READ_VAL [i]));
274	((_Register_unit->out_GPR_READ_ACK [i]))((out_GPR_READ_ACK [i]));
275	if (_param->_have_port_ooo_engine_id == true)
276	((_Register_unit-> in_GPR_READ_OOO_ENGINE_ID [i]))(( in_GPR_READ_OOO_ENGINE_ID [i]));
277	((_Register_unit-> in_GPR_READ_NUM_REG [i]))(( in_GPR_READ_NUM_REG [i]));
278	((_Register_unit->out_GPR_READ_DATA [i]))((out_GPR_READ_DATA [i]));
279	((_Register_unit->out_GPR_READ_DATA_VAL [i]))((out_GPR_READ_DATA_VAL [i]));
280	}
281	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
282	{
283	((_Register_unit-> in_GPR_WRITE_VAL [i]))(( in_GPR_WRITE_VAL [i]));
284	((_Register_unit->out_GPR_WRITE_ACK [i]))((out_GPR_WRITE_ACK [i]));
285	if (_param->_have_port_ooo_engine_id == true)
286	((_Register_unit-> in_GPR_WRITE_OOO_ENGINE_ID [i]))(( in_GPR_WRITE_OOO_ENGINE_ID [i]));
287	((_Register_unit-> in_GPR_WRITE_NUM_REG [i]))(( in_GPR_WRITE_NUM_REG [i]));
288	((_Register_unit-> in_GPR_WRITE_DATA [i]))(( in_GPR_WRITE_DATA [i]));
289	}
290	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
291	{
292	((_Register_unit-> in_SPR_READ_VAL [i]))(( in_SPR_READ_VAL [i]));
293	((_Register_unit->out_SPR_READ_ACK [i]))((out_SPR_READ_ACK [i]));
294	if (_param->_have_port_ooo_engine_id == true)
295	((_Register_unit-> in_SPR_READ_OOO_ENGINE_ID [i]))(( in_SPR_READ_OOO_ENGINE_ID [i]));
296	((_Register_unit-> in_SPR_READ_NUM_REG [i]))(( in_SPR_READ_NUM_REG [i]));
297	((_Register_unit->out_SPR_READ_DATA [i]))((out_SPR_READ_DATA [i]));
298	((_Register_unit->out_SPR_READ_DATA_VAL [i]))((out_SPR_READ_DATA_VAL [i]));
299	}
300	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
301	{
302	((_Register_unit-> in_SPR_WRITE_VAL [i]))(( in_SPR_WRITE_VAL [i]));
303	((_Register_unit->out_SPR_WRITE_ACK [i]))((out_SPR_WRITE_ACK [i]));
304	if (_param->_have_port_ooo_engine_id == true)
305	((_Register_unit-> in_SPR_WRITE_OOO_ENGINE_ID [i]))(( in_SPR_WRITE_OOO_ENGINE_ID [i]));
306	((_Register_unit-> in_SPR_WRITE_NUM_REG [i]))(( in_SPR_WRITE_NUM_REG [i]));
307	((_Register_unit-> in_SPR_WRITE_DATA [i]))(( in_SPR_WRITE_DATA [i]));
308	}
309	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
310	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
311	{
312	((_Register_unit-> in_INSERT_ROB_VAL [i][j]))(( in_INSERT_ROB_VAL [i][j]));
313	((_Register_unit->out_INSERT_ROB_ACK [i][j]))((out_INSERT_ROB_ACK [i][j]));
314	((_Register_unit-> in_INSERT_ROB_RD_USE [i][j]))(( in_INSERT_ROB_RD_USE [i][j]));
315	((_Register_unit-> in_INSERT_ROB_RD_NUM_REG [i][j]))(( in_INSERT_ROB_RD_NUM_REG [i][j]));
316	((_Register_unit-> in_INSERT_ROB_RE_USE [i][j]))(( in_INSERT_ROB_RE_USE [i][j]));
317	((_Register_unit-> in_INSERT_ROB_RE_NUM_REG [i][j]))(( in_INSERT_ROB_RE_NUM_REG [i][j]));
318	}
319	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
320	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
321	{
322	((_Register_unit-> in_RETIRE_ROB_VAL [i][j]))(( in_RETIRE_ROB_VAL [i][j]));
323	((_Register_unit->out_RETIRE_ROB_ACK [i][j]))((out_RETIRE_ROB_ACK [i][j]));
324	((_Register_unit-> in_RETIRE_ROB_RD_OLD_USE [i][j]))(( in_RETIRE_ROB_RD_OLD_USE [i][j]));
325	((_Register_unit-> in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]))(( in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]));
326	((_Register_unit-> in_RETIRE_ROB_RE_OLD_USE [i][j]))(( in_RETIRE_ROB_RE_OLD_USE [i][j]));
327	((_Register_unit-> in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]))(( in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]));
328	((_Register_unit-> in_RETIRE_ROB_RD_NEW_USE [i][j]))(( in_RETIRE_ROB_RD_NEW_USE [i][j]));
329	((_Register_unit-> in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]))(( in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]));
330	((_Register_unit-> in_RETIRE_ROB_RE_NEW_USE [i][j]))(( in_RETIRE_ROB_RE_NEW_USE [i][j]));
331	((_Register_unit-> in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]))(( in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]));
332	}
333
334	cout << "<" << name << "> Start Simulation ............" << endl;
335	Time * _time = new Time();
336
337	/********************************************************
338	* Simulation - Begin
339	********************************************************/
340
341	// Initialisation
342	uint32_t max_nb_general_register = 0;
343
344	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
345	if (_param->_nb_general_register [i] > max_nb_general_register)
346	max_nb_general_register = _param->_nb_general_register [i];
347
348	uint32_t max_nb_special_register = 0;
349
350	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
351	if (_param->_nb_special_register [i] > max_nb_special_register)
352	max_nb_special_register = _param->_nb_special_register [i];
353
354	const int32_t percent_transaction_read = 70;
355	const int32_t percent_transaction_write = 70;
356	const int32_t percent_transaction_insert = 70;
357	const int32_t percent_transaction_insert_use = 70;
358	const int32_t percent_transaction_retire = 70;
359	const int32_t percent_transaction_retire_use = 70;
360	const uint32_t nb_request = max_nb_general_register;
361
362	const uint32_t seed = 0;
363	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
364
365	srand(seed);
366
367	Tgeneral_data_t gpr [_param->_nb_ooo_engine][max_nb_general_register];
368	Tcontrol_t gpr_status [_param->_nb_ooo_engine][max_nb_general_register];
369	Tspecial_data_t spr [_param->_nb_ooo_engine][max_nb_special_register];
370	Tcontrol_t spr_status [_param->_nb_ooo_engine][max_nb_special_register];
371
372	SC_START(0);
373
374	LABEL("Initialisation");
375
376	for (uint32_t i=0; i<_param->_nb_gpr_read ; i++)
377	in_GPR_READ_VAL [i]->write(0);
378	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
379	in_GPR_WRITE_VAL [i]->write(0);
380	for (uint32_t i=0; i<_param->_nb_spr_read ; i++)
381	in_SPR_READ_VAL [i]->write(0);
382	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
383	in_SPR_WRITE_VAL [i]->write(0);
384	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
385	{
386	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
387	in_INSERT_ROB_VAL [i][j]->write(0);
388	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
389	in_RETIRE_ROB_VAL [i][j]->write(0);
390	}
391
392	Tgeneral_address_t gpr_address [_param->_nb_gpr_write];
393	Tgeneral_address_t gpr_address_next;
394	uint32_t nb_port_gpr_active; // number of port active
395
396	Tspecial_address_t spr_address [_param->_nb_spr_write];
397	Tspecial_address_t spr_address_next;
398	uint32_t nb_port_spr_active; // number of port active
399
400	LABEL("Loop of Test");
401
402	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
403	{
404	LABEL("Iteration "+toString(iteration));
405
406	LABEL("(GPR) Write default value");
407
408	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
409	for(uint32_t j=0; j<max_nb_general_register; j++)
410	{
411	gpr [i][j] = rand()%_param->_size_general_data;
412	gpr_status [i][j] = 1;
413	}
414
415	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
416	{
417	gpr_address_next = _param->_nb_gpr_write;
418	nb_port_gpr_active = _param->_nb_gpr_write;
419
420	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
421	{
422	gpr_address[j] = j;
423	if (j >= _param->_nb_general_register [i])
424	nb_port_gpr_active --;
425	}
426
427	while (nb_port_gpr_active > 0)
428	{
429	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
430	{
431	in_GPR_WRITE_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
432	((rand() % 100) < percent_transaction_write));
433	in_GPR_WRITE_OOO_ENGINE_ID [j]->write(i);
434	in_GPR_WRITE_NUM_REG [j]->write(gpr_address[j]);
435	in_GPR_WRITE_DATA [j]->write(gpr [i][gpr_address[j]]);
436	}
437
438	SC_START(1);
439
440	// Test if write
441	for (uint32_t j=0; j<_param->_nb_gpr_write; j++)
442	if (in_GPR_WRITE_VAL [j]->read() and out_GPR_WRITE_ACK [j]->read())
443	{
444	gpr_address[j] = gpr_address_next;
445
446	if (gpr_address_next >= _param->_nb_general_register [i])
447	nb_port_gpr_active --;
448
449	gpr_address_next ++;
450	}
451	}
452	}
453
454	for (uint32_t i=0; i<_param->_nb_gpr_write; i++)
455	in_GPR_WRITE_VAL [i]->write(0);
456
457	LABEL("(GPR) Read - and test data writted");
458
459	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
460	{
461	gpr_address_next = _param->_nb_gpr_read;
462	nb_port_gpr_active = _param->_nb_gpr_read;
463
464	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
465	{
466	gpr_address[j] = j;
467	if (j >= _param->_nb_general_register [i])
468	nb_port_gpr_active --;
469	}
470
471	while (nb_port_gpr_active > 0)
472	{
473	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
474	{
475	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
476	((rand() % 100) < percent_transaction_read));
477	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
478	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
479	}
480
481	SC_START(1);
482
483	// Test if read
484	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
485	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
486	{
487	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
488	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
489
490	gpr_address[j] = gpr_address_next;
491
492	if (gpr_address_next >= _param->_nb_general_register [i])
493	nb_port_gpr_active --;
494
495	gpr_address_next ++;
496	}
497	}
498	}
499
500	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
501	in_GPR_READ_VAL [i]->write(0);
502
503	LABEL("(SPR) Write default value");
504
505	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
506	for(uint32_t j=0; j<max_nb_special_register; j++)
507	{
508	spr [i][j] = rand()%_param->_size_special_data;
509	spr_status [i][j] = 1;
510	}
511
512	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
513	{
514	spr_address_next = _param->_nb_spr_write;
515	nb_port_spr_active = _param->_nb_spr_write;
516
517	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
518	{
519	spr_address[j] = j;
520	if (j >= _param->_nb_special_register [i])
521	nb_port_spr_active --;
522	}
523
524	while (nb_port_spr_active > 0)
525	{
526	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
527	{
528	in_SPR_WRITE_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
529	((rand() % 100) < percent_transaction_write));
530	in_SPR_WRITE_OOO_ENGINE_ID [j]->write(i);
531	in_SPR_WRITE_NUM_REG [j]->write(spr_address[j]);
532	in_SPR_WRITE_DATA [j]->write(spr [i][spr_address[j]]);
533	}
534
535	SC_START(1);
536
537	// Test if write
538	for (uint32_t j=0; j<_param->_nb_spr_write; j++)
539	if (in_SPR_WRITE_VAL [j]->read() and out_SPR_WRITE_ACK [j]->read())
540	{
541	spr_address[j] = spr_address_next;
542
543	if (spr_address_next >= _param->_nb_special_register [i])
544	nb_port_spr_active --;
545
546	spr_address_next ++;
547	}
548	}
549	}
550
551	for (uint32_t i=0; i<_param->_nb_spr_write; i++)
552	in_SPR_WRITE_VAL [i]->write(0);
553
554	LABEL("(SPR) Read - and test data writted");
555
556	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
557	{
558	spr_address_next = _param->_nb_spr_read;
559	nb_port_spr_active = _param->_nb_spr_read;
560
561	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
562	{
563	spr_address[j] = j;
564	if (j >= _param->_nb_special_register [i])
565	nb_port_spr_active --;
566	}
567
568	while (nb_port_spr_active > 0)
569	{
570	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
571	{
572	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
573	((rand() % 100) < percent_transaction_read));
574	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
575	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
576	}
577
578	SC_START(1);
579
580	// Test if read
581	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
582	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
583	{
584	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
585	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
586
587	spr_address[j] = spr_address_next;
588
589	if (spr_address_next >= _param->_nb_special_register [i])
590	nb_port_spr_active --;
591
592	spr_address_next ++;
593	}
594	}
595	}
596
597	for (uint32_t i=0; i<_param->_nb_spr_read; i++)
598	in_SPR_READ_VAL [i]->write(0);
599
600	LABEL("insert rob");
601
602	uint32_t cpt = 0;
603
604	while (cpt < nb_request)
605	{
606	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
607	{
608	uint32_t x=_param->_nb_inst_insert_rob [i];
609	for (uint32_t j=0; j<x; j++)
610	{
611	in_INSERT_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_insert);
612	in_INSERT_ROB_RD_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use);
613	in_INSERT_ROB_RD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
614	in_INSERT_ROB_RE_USE [i][j]->write((rand() % 100) < percent_transaction_insert_use);
615	in_INSERT_ROB_RE_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
616	}
617	}
618
619	SC_START(1);
620
621	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
622	{
623	uint32_t x=_param->_nb_inst_insert_rob [i];
624	for (uint32_t j=0; j<x; j++)
625	{
626	if (in_INSERT_ROB_VAL [i][j]->read() and out_INSERT_ROB_ACK [i][j]->read())
627	{
628	cpt ++;
629
630	if (in_INSERT_ROB_RD_USE [i][j]->read())
631	gpr_status [i][in_INSERT_ROB_RD_NUM_REG [i][j]->read()] = 0;
632
633	if (in_INSERT_ROB_RE_USE [i][j]->read())
634	spr_status [i][in_INSERT_ROB_RE_NUM_REG [i][j]->read()] = 0;
635	}
636	}
637	}
638	}
639	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
640	for (uint32_t j=0; j<_param->_nb_inst_insert_rob [i]; j++)
641	in_INSERT_ROB_VAL [i][j]->write(0);
642
643	LABEL("(GPR) Read - and test data writted");
644
645	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
646	{
647	gpr_address_next = _param->_nb_gpr_read;
648	nb_port_gpr_active = _param->_nb_gpr_read;
649
650	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
651	{
652	gpr_address[j] = j;
653	if (j >= _param->_nb_general_register [i])
654	nb_port_gpr_active --;
655	}
656
657	while (nb_port_gpr_active > 0)
658	{
659	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
660	{
661	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
662	((rand() % 100) < percent_transaction_read));
663	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
664	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
665	}
666
667	SC_START(1);
668
669	// Test if read
670	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
671	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
672	{
673	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
674	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
675
676	gpr_address[j] = gpr_address_next;
677
678	if (gpr_address_next >= _param->_nb_general_register [i])
679	nb_port_gpr_active --;
680
681	gpr_address_next ++;
682	}
683	}
684	}
685
686	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
687	in_GPR_READ_VAL [i]->write(0);
688
689	LABEL("(SPR) Read - and test data writted");
690
691	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
692	{
693	spr_address_next = _param->_nb_spr_read;
694	nb_port_spr_active = _param->_nb_spr_read;
695
696	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
697	{
698	spr_address[j] = j;
699	if (j >= _param->_nb_special_register [i])
700	nb_port_spr_active --;
701	}
702
703	while (nb_port_spr_active > 0)
704	{
705	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
706	{
707	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
708	((rand() % 100) < percent_transaction_read));
709	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
710	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
711	}
712
713	SC_START(1);
714
715	// Test if read
716	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
717	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
718	{
719	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
720	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
721
722	spr_address[j] = spr_address_next;
723
724	if (spr_address_next >= _param->_nb_special_register [i])
725	nb_port_spr_active --;
726
727	spr_address_next ++;
728	}
729	}
730	}
731
732	LABEL("retire rob");
733
734	cpt = 0;
735
736	while (cpt < nb_request)
737	{
738	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
739	{
740	uint32_t x=_param->_nb_inst_retire_rob [i];
741	for (uint32_t j=0; j<x; j++)
742	{
743	in_RETIRE_ROB_VAL [i][j]->write((rand() % 100) < percent_transaction_retire);
744	in_RETIRE_ROB_RD_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
745	in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
746	in_RETIRE_ROB_RD_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
747	in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_general_register [i]);
748	in_RETIRE_ROB_RE_OLD_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
749	in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
750	in_RETIRE_ROB_RE_NEW_USE [i][j]->write((rand() % 100) < percent_transaction_retire_use);
751	in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->write(rand() % _param->_nb_special_register [i]);
752	}
753	}
754
755	SC_START(1);
756
757	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
758	{
759	uint32_t x=_param->_nb_inst_retire_rob [i];
760	for (uint32_t j=0; j<x; j++)
761	{
762	if (in_RETIRE_ROB_VAL [i][j]->read() and out_RETIRE_ROB_ACK [i][j]->read())
763	{
764	cpt ++;
765
766	if (in_RETIRE_ROB_RD_OLD_USE [i][j]->read())
767	gpr_status [i][in_RETIRE_ROB_RD_OLD_NUM_REG [i][j]->read()] = 0;
768	if (in_RETIRE_ROB_RD_NEW_USE [i][j]->read())
769	gpr_status [i][in_RETIRE_ROB_RD_NEW_NUM_REG [i][j]->read()] = 1;
770	if (in_RETIRE_ROB_RE_OLD_USE [i][j]->read())
771	spr_status [i][in_RETIRE_ROB_RE_OLD_NUM_REG [i][j]->read()] = 0;
772	if (in_RETIRE_ROB_RE_NEW_USE [i][j]->read())
773	spr_status [i][in_RETIRE_ROB_RE_NEW_NUM_REG [i][j]->read()] = 1;
774	}
775	}
776	}
777	}
778	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
779	for (uint32_t j=0; j<_param->_nb_inst_retire_rob [i]; j++)
780	in_RETIRE_ROB_VAL [i][j]->write(0);
781
782	LABEL("(GPR) Read - and test data writted");
783
784	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
785	{
786	gpr_address_next = _param->_nb_gpr_read;
787	nb_port_gpr_active = _param->_nb_gpr_read;
788
789	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
790	{
791	gpr_address[j] = j;
792	if (j >= _param->_nb_general_register [i])
793	nb_port_gpr_active --;
794	}
795
796	while (nb_port_gpr_active > 0)
797	{
798	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
799	{
800	in_GPR_READ_VAL [j]->write((gpr_address[j] < _param->_nb_general_register [i]) and
801	((rand() % 100) < percent_transaction_read));
802	in_GPR_READ_OOO_ENGINE_ID [j]->write(i);
803	in_GPR_READ_NUM_REG [j]->write(gpr_address[j]);
804	}
805
806	SC_START(1);
807
808	// Test if read
809	for (uint32_t j=0; j<_param->_nb_gpr_read; j++)
810	if (in_GPR_READ_VAL [j]->read() and out_GPR_READ_ACK [j]->read())
811	{
812	TEST(Tgeneral_data_t, out_GPR_READ_DATA [j]->read(), gpr [i][gpr_address[j]]);
813	TEST(Tcontrol_t , out_GPR_READ_DATA_VAL[j]->read(), gpr_status [i][gpr_address[j]]);
814
815	gpr_address[j] = gpr_address_next;
816
817	if (gpr_address_next >= _param->_nb_general_register [i])
818	nb_port_gpr_active --;
819
820	gpr_address_next ++;
821	}
822	}
823	}
824
825	for (uint32_t i=0; i<_param->_nb_gpr_read; i++)
826	in_GPR_READ_VAL [i]->write(0);
827
828	LABEL("(SPR) Read - and test data writted");
829
830	for (uint32_t i=0; i<_param->_nb_ooo_engine; i++)
831	{
832	spr_address_next = _param->_nb_spr_read;
833	nb_port_spr_active = _param->_nb_spr_read;
834
835	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
836	{
837	spr_address[j] = j;
838	if (j >= _param->_nb_special_register [i])
839	nb_port_spr_active --;
840	}
841
842	while (nb_port_spr_active > 0)
843	{
844	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
845	{
846	in_SPR_READ_VAL [j]->write((spr_address[j] < _param->_nb_special_register [i]) and
847	((rand() % 100) < percent_transaction_read));
848	in_SPR_READ_OOO_ENGINE_ID [j]->write(i);
849	in_SPR_READ_NUM_REG [j]->write(spr_address[j]);
850	}
851
852	SC_START(1);
853
854	// Test if read
855	for (uint32_t j=0; j<_param->_nb_spr_read; j++)
856	if (in_SPR_READ_VAL [j]->read() and out_SPR_READ_ACK [j]->read())
857	{
858	TEST(Tspecial_data_t, out_SPR_READ_DATA [j]->read(), spr [i][spr_address[j]]);
859	TEST(Tcontrol_t , out_SPR_READ_DATA_VAL[j]->read(), spr_status [i][spr_address[j]]);
860
861	spr_address[j] = spr_address_next;
862
863	if (spr_address_next >= _param->_nb_special_register [i])
864	nb_port_spr_active --;
865
866	spr_address_next ++;
867	}
868	}
869	}
870
871	}
872
873	/********************************************************
874	* Simulation - End
875	********************************************************/
876
877	TEST_OK ("End of Simulation");
878	delete _time;
879	cout << "<" << name << "> ............ Stop Simulation" << endl;
880
881	delete in_CLOCK;
882	delete in_NRESET;
883
884	delete [] in_GPR_READ_VAL ;
885	delete [] out_GPR_READ_ACK ;
886	delete [] in_GPR_READ_OOO_ENGINE_ID ;
887	delete [] in_GPR_READ_NUM_REG ;
888	delete [] out_GPR_READ_DATA ;
889	delete [] out_GPR_READ_DATA_VAL ;
890	delete [] in_GPR_WRITE_VAL ;
891	delete [] out_GPR_WRITE_ACK ;
892	delete [] in_GPR_WRITE_OOO_ENGINE_ID ;
893	delete [] in_GPR_WRITE_NUM_REG ;
894	delete [] in_GPR_WRITE_DATA ;
895	delete [] in_SPR_READ_VAL ;
896	delete [] out_SPR_READ_ACK ;
897	delete [] in_SPR_READ_OOO_ENGINE_ID ;
898	delete [] in_SPR_READ_NUM_REG ;
899	delete [] out_SPR_READ_DATA ;
900	delete [] out_SPR_READ_DATA_VAL ;
901	delete [] in_SPR_WRITE_VAL ;
902	delete [] out_SPR_WRITE_ACK ;
903	delete [] in_SPR_WRITE_OOO_ENGINE_ID ;
904	delete [] in_SPR_WRITE_NUM_REG ;
905	delete [] in_SPR_WRITE_DATA ;
906	delete [] in_INSERT_ROB_VAL ;
907	delete [] out_INSERT_ROB_ACK ;
908	delete [] in_INSERT_ROB_RD_USE ;
909	delete [] in_INSERT_ROB_RD_NUM_REG ;
910	delete [] in_INSERT_ROB_RE_USE ;
911	delete [] in_INSERT_ROB_RE_NUM_REG ;
912	delete [] in_RETIRE_ROB_VAL ;
913	delete [] out_RETIRE_ROB_ACK ;
914	delete [] in_RETIRE_ROB_RD_OLD_USE ;
915	delete [] in_RETIRE_ROB_RD_OLD_NUM_REG ;
916	delete [] in_RETIRE_ROB_RD_NEW_USE ;
917	delete [] in_RETIRE_ROB_RD_NEW_NUM_REG ;
918	delete [] in_RETIRE_ROB_RE_OLD_USE ;
919	delete [] in_RETIRE_ROB_RE_OLD_NUM_REG ;
920	delete [] in_RETIRE_ROB_RE_NEW_USE ;
921	delete [] in_RETIRE_ROB_RE_NEW_NUM_REG ;
922	#endif
923
924	delete _Register_unit;
925	#ifdef STATISTICS
926	delete _parameters_statistics;
927	#endif
928	}

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