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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/src/Decod_unit_allocation.cpp @ 112

Last change on this file since 112 was 112, checked in by rosiere, 15 years ago
1) Stat_list : fix retire old and new register bug 2) Stat_list : remove read_counter and valid flag, because validation of destination is in retire step (not in commit step) 3) Model : add class Model (cf Morpheo.sim) 4) Allocation : alloc_interface_begin and alloc_interface_end to delete temporary array. 5) Script : add distexe.sh 6) Add Comparator, Multiplier, Divider. But this component are not implemented 7) Software : add Dhrystone
Property svn:keywords set to `Id`
File size: 29.1 KB

Line
1	/*
2	* $Id: Decod_unit_allocation.cpp 112 2009-03-18 22:36:26Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_Front_end/Front_end/Decod_unit/include/Decod_unit.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_front_end {
15	namespace front_end {
16	namespace decod_unit {
17
18
19
20	#undef FUNCTION
21	#define FUNCTION "Decod_unit::allocation"
22	void Decod_unit::allocation
23	(
24	#ifdef STATISTICS
25	morpheo::behavioural::Parameters_Statistics * param_statistics
26	#else
27	void
28	#endif
29	)
30	{
31	log_begin(Decod_unit,FUNCTION);
32
33	_component = new Component (_usage);
34
35	Entity * entity = _component->set_entity (_name
36	,"Decod_unit"
37	#ifdef POSITION
38	,COMBINATORY
39	#endif
40	);
41
42	_interfaces = entity->set_interfaces();
43
44	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
45	{
46	Interface * interface = _interfaces->set_interface(""
47	#ifdef POSITION
48	,IN
49	,SOUTH,
50	"Generalist interface"
51	#endif
52	);
53
54	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
55	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
56	}
57
58	// ~~~~~[ Interface : "ifetch" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
59	{
60	ALLOC2_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context, _param->_nb_inst_fetch[it1]);
61
62	_ALLOC2_VALACK_IN ( in_IFETCH_VAL ,VAL, _param->_nb_context, _param->_nb_inst_fetch[it1]);
63	_ALLOC2_VALACK_OUT(out_IFETCH_ACK ,ACK, _param->_nb_context, _param->_nb_inst_fetch[it1]);
64	_ALLOC2_SIGNAL_IN ( in_IFETCH_INSTRUCTION,"instruction", Tinstruction_t, _param->_size_instruction,_param->_nb_context, _param->_nb_inst_fetch[it1]);
65
66	ALLOC2_INTERFACE_END(_param->_nb_context, _param->_nb_inst_fetch[it1]);
67	}
68	{
69	ALLOC1_INTERFACE_BEGIN("ifetch", IN, WEST, _("Instruction's bundle"), _param->_nb_context);
70
71	ALLOC1_SIGNAL_IN (in_IFETCH_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
72	ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS ,"address" ,Tgeneral_address_t ,_param->_size_instruction_address );
73	// ALLOC1_SIGNAL_IN (in_IFETCH_ADDRESS_NEXT ,"address_next" ,Tgeneral_address_t ,_param->_size_instruction_address );
74	ALLOC1_SIGNAL_IN (in_IFETCH_INST_IFETCH_PTR ,"inst_ifetch_ptr" ,Tinst_ifetch_ptr_t ,_param->_size_inst_ifetch_ptr );
75	ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state );
76	ALLOC1_SIGNAL_IN (in_IFETCH_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );
77	ALLOC1_SIGNAL_IN (in_IFETCH_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_ifetch);
78
79	ALLOC1_INTERFACE_END(_param->_nb_context);
80	}
81
82	// ~~~~~[ Interface : "decod" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
83	{
84	ALLOC1_INTERFACE_BEGIN("decod", OUT, EAST, _("Instruction decoded"), _param->_nb_inst_decod);
85
86	ALLOC1_VALACK_OUT(out_DECOD_VAL ,VAL);
87	ALLOC1_VALACK_IN ( in_DECOD_ACK ,ACK);
88	ALLOC1_SIGNAL_OUT(out_DECOD_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
89	ALLOC1_SIGNAL_OUT(out_DECOD_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth );
90	ALLOC1_SIGNAL_OUT(out_DECOD_TYPE ,"type" ,Ttype_t ,_param->_size_type );
91	ALLOC1_SIGNAL_OUT(out_DECOD_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
92	ALLOC1_SIGNAL_OUT(out_DECOD_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 );
93	ALLOC1_SIGNAL_OUT(out_DECOD_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 );
94	#ifdef DEBUG
95	ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS ,"address" ,Tgeneral_data_t ,_param->_size_instruction_address );
96	#endif
97	ALLOC1_SIGNAL_OUT(out_DECOD_ADDRESS_NEXT ,"address_next" ,Tgeneral_data_t ,_param->_size_instruction_address );
98	ALLOC1_SIGNAL_OUT(out_DECOD_HAS_IMMEDIAT ,"has_immediat" ,Tcontrol_t ,1 );
99	ALLOC1_SIGNAL_OUT(out_DECOD_IMMEDIAT ,"immediat" ,Tgeneral_data_t ,_param->_size_general_data );
100	ALLOC1_SIGNAL_OUT(out_DECOD_READ_RA ,"read_ra" ,Tcontrol_t ,1 );
101	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RA ,"num_reg_ra" ,Tgeneral_address_t,_param->_size_general_register_logic);
102	ALLOC1_SIGNAL_OUT(out_DECOD_READ_RB ,"read_rb" ,Tcontrol_t ,1 );
103	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RB ,"num_reg_rb" ,Tgeneral_address_t,_param->_size_general_register_logic);
104	ALLOC1_SIGNAL_OUT(out_DECOD_READ_RC ,"read_rc" ,Tcontrol_t ,1 );
105	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RC ,"num_reg_rc" ,Tspecial_address_t,_param->_size_special_register_logic);
106	ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 );
107	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register_logic);
108	ALLOC1_SIGNAL_OUT(out_DECOD_WRITE_RE ,"write_re" ,Tcontrol_t ,1 );
109	ALLOC1_SIGNAL_OUT(out_DECOD_NUM_REG_RE ,"num_reg_re" ,Tspecial_address_t,_param->_size_special_register_logic);
110	ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION_USE,"exception_use",Texception_t ,_param->_size_exception_use );
111	ALLOC1_SIGNAL_OUT(out_DECOD_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception_decod );
112
113	ALLOC1_INTERFACE_END(_param->_nb_inst_decod);
114	}
115
116	// ~~~~~[ Interface : "predict" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
117	{
118	ALLOC1_INTERFACE_BEGIN("predict",OUT,NORTH,_("Decod a branch -> inform the branch predictor."),_param->_nb_inst_decod);
119
120	ALLOC1_VALACK_OUT(out_PREDICT_VAL ,VAL);
121	ALLOC1_VALACK_IN ( in_PREDICT_ACK ,ACK);
122	ALLOC1_SIGNAL_OUT(out_PREDICT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
123	ALLOC1_SIGNAL_OUT(out_PREDICT_MATCH_INST_IFETCH_PTR ,"match_inst_ifetch_ptr" ,Tcontrol_t ,1 );
124	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STATE ,"branch_state" ,Tbranch_state_t ,_param->_size_branch_state );
125	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_UPDATE_PREDICTION_ID,"branch_update_prediction_id",Tprediction_ptr_t ,_param->_size_depth );
126	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_CONDITION ,"branch_condition" ,Tbranch_condition_t,_param->_size_branch_condition);
127	// ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_STACK_WRITE ,"branch_stack_write" ,Tcontrol_t ,1 );
128	ALLOC1_SIGNAL_OUT(out_PREDICT_BRANCH_DIRECTION ,"branch_direction" ,Tcontrol_t ,1 );
129	ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_SRC ,"address_src" ,Tgeneral_data_t ,_param->_size_instruction_address );
130	ALLOC1_SIGNAL_OUT(out_PREDICT_ADDRESS_DEST ,"address_dest" ,Tgeneral_data_t ,_param->_size_instruction_address );
131	ALLOC1_SIGNAL_IN ( in_PREDICT_CAN_CONTINUE ,"can_continue" ,Tcontrol_t ,1 );
132
133	ALLOC1_INTERFACE_END(_param->_nb_inst_decod);
134	}
135
136	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
137	{
138	ALLOC1_INTERFACE_BEGIN("depth",IN ,NORTH,_("Depth"), _param->_nb_context);
139
140	ALLOC1_SIGNAL_IN ( in_DEPTH_MIN ,"min" ,Tdepth_t ,_param->_size_depth);
141	ALLOC1_SIGNAL_IN ( in_DEPTH_MAX ,"max" ,Tdepth_t ,_param->_size_depth);
142	ALLOC1_SIGNAL_IN ( in_DEPTH_FULL ,"full" ,Tcontrol_t ,1);
143
144	ALLOC1_INTERFACE_END(_param->_nb_context);
145	}
146
147	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
148	{
149	ALLOC1_INTERFACE_BEGIN("nb_inst",OUT,NORTH,_("Instruction's number"), _param->_nb_context);
150
151	ALLOC1_SIGNAL_OUT(out_NB_INST_DECOD_ALL ,"decod_all" ,Tcontext_t ,_param->_size_nb_inst_decod);
152
153	ALLOC1_INTERFACE_END(_param->_nb_context);
154	}
155
156	// ~~~~~[ Interface : "context" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
157	{
158	ALLOC1_INTERFACE_BEGIN("context", IN, NORTH, _("context's information"), _param->_nb_context);
159
160	ALLOC1_SIGNAL_IN (in_CONTEXT_DECOD_ENABLE,"decod_enable",Tcontrol_t,1);
161	ALLOC1_SIGNAL_IN (in_CONTEXT_DEPTH_VAL ,"depth_val" ,Tcontrol_t,1);
162	ALLOC1_SIGNAL_IN (in_CONTEXT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth);
163
164	ALLOC1_INTERFACE_END(_param->_nb_context);
165	}
166
167	// ~~~~~[ Interface : "context_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
168	{
169	ALLOC0_INTERFACE_BEGIN("context_event", OUT, NORTH, _("context's evenement"));
170
171	ALLOC0_VALACK_OUT(out_CONTEXT_EVENT_VAL ,VAL);
172	ALLOC0_VALACK_IN ( in_CONTEXT_EVENT_ACK ,ACK);
173	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id );
174	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth );
175	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type );
176	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_IS_DELAY_SLOT,"is_delay_slot",Tcontrol_t ,1 );
177	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS ,"address" ,Tgeneral_data_t,_param->_size_instruction_address);
178	ALLOC0_SIGNAL_OUT(out_CONTEXT_EVENT_ADDRESS_EPCR ,"address_epcr" ,Tgeneral_data_t,_param->_size_instruction_address);
179
180	ALLOC0_INTERFACE_END();
181	}
182
183	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
184	std::string src,dest;
185
186	{
187	src = _name+"_decod";
188	log_printf(INFO,Decod_unit,FUNCTION,_("Create : %s"),src.c_str());
189
190	_component_decod = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod::Decod
191	(src.c_str()
192	#ifdef STATISTICS
193	,param_statistics
194	#endif
195	,_param->_param_decod
196	,_usage);
197
198	_component->set_component (_component_decod->_component
199	#ifdef POSITION
200	, 50, 50, 10, 10
201	#endif
202	);
203	}
204
205	{
206	src = _name+"_decod_queue";
207	log_printf(INFO,Decod_unit,FUNCTION,_("Create : %s"),src.c_str());
208
209	_component_decod_queue = new morpheo::behavioural::core::multi_front_end::front_end::decod_unit::decod_queue::Decod_queue
210	(src.c_str()
211	#ifdef STATISTICS
212	,param_statistics
213	#endif
214	,_param->_param_decod_queue
215	,_usage);
216
217	_component->set_component (_component_decod_queue->_component
218	#ifdef POSITION
219	, 50, 50, 10, 10
220	#endif
221	);
222	}
223
224	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
225
226	// ===================================================================
227	// =====[ decod ]=====================================================
228	// ===================================================================
229	{
230	src = _name+"_decod";
231	log_printf(INFO,Decod_unit,FUNCTION,_("Instance : %s"),src.c_str());
232
233	{
234	dest = _name;
235	#ifdef POSITION
236	_component->interface_map (src ,"",
237	dest,"");
238	#endif
239	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
240	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
241	}
242
243	for (uint32_t i=0; i<_param->_nb_context; i++)
244	{
245	dest = _name;
246
247	for (uint32_t j=0; j<_param->_nb_inst_fetch [i]; j++)
248	{
249	#ifdef POSITION
250	_component->interface_map (src ,"ifetch_"+toString(i)+"_"+toString(j),
251	dest,"ifetch_"+toString(i)+"_"+toString(j));
252	#endif
253
254	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_VAL" ,
255	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_VAL" );
256	PORT_MAP(_component,src ,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_ACK" ,
257	dest,"out_IFETCH_"+toString(i)+"_"+toString(j)+"_ACK" );
258	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION",
259	dest, "in_IFETCH_"+toString(i)+"_"+toString(j)+"_INSTRUCTION");
260	}
261
262	#ifdef POSITION
263	_component->interface_map (src ,"ifetch_"+toString(i),
264	dest,"ifetch_"+toString(i));
265	#endif
266
267	if (_param->_have_port_context_id)
268	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_CONTEXT_ID" ,
269	dest, "in_IFETCH_"+toString(i)+"_CONTEXT_ID" );
270	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS" ,
271	dest, "in_IFETCH_"+toString(i)+"_ADDRESS" );
272	// PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT" ,
273	// dest, "in_IFETCH_"+toString(i)+"_ADDRESS_NEXT" );
274	if (_param->_have_port_inst_ifetch_ptr)
275	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR" ,
276	dest, "in_IFETCH_"+toString(i)+"_INST_IFETCH_PTR" );
277	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_STATE" ,
278	dest, "in_IFETCH_"+toString(i)+"_BRANCH_STATE" );
279	if (_param->_have_port_depth)
280	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID",
281	dest, "in_IFETCH_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID");
282	PORT_MAP(_component,src , "in_IFETCH_"+toString(i)+"_EXCEPTION" ,
283	dest, "in_IFETCH_"+toString(i)+"_EXCEPTION" );
284	}
285
286	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
287	{
288	dest = _name+"_decod_queue";
289
290	#ifdef POSITION
291	_component->interface_map (src ,"decod_" +toString(i),
292	dest,"decod_in_"+toString(i));
293	#endif
294
295	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_VAL" ,
296	dest, "in_DECOD_IN_"+toString(i)+"_VAL" );
297	COMPONENT_MAP(_component,src , "in_DECOD_" +toString(i)+"_ACK" ,
298	dest,"out_DECOD_IN_"+toString(i)+"_ACK" );
299	if (_param->_have_port_context_id)
300	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_CONTEXT_ID" ,
301	dest, "in_DECOD_IN_"+toString(i)+"_CONTEXT_ID" );
302	if (_param->_have_port_depth)
303	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_DEPTH" ,
304	dest, "in_DECOD_IN_"+toString(i)+"_DEPTH" );
305	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_TYPE" ,
306	dest, "in_DECOD_IN_"+toString(i)+"_TYPE" );
307	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_OPERATION" ,
308	dest, "in_DECOD_IN_"+toString(i)+"_OPERATION" );
309	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NO_EXECUTE" ,
310	dest, "in_DECOD_IN_"+toString(i)+"_NO_EXECUTE" );
311	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_IS_DELAY_SLOT",
312	dest, "in_DECOD_IN_"+toString(i)+"_IS_DELAY_SLOT");
313	#ifdef DEBUG
314	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_ADDRESS" ,
315	dest, "in_DECOD_IN_"+toString(i)+"_ADDRESS" );
316	#endif
317	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_ADDRESS_NEXT" ,
318	dest, "in_DECOD_IN_"+toString(i)+"_ADDRESS_NEXT" );
319	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_HAS_IMMEDIAT" ,
320	dest, "in_DECOD_IN_"+toString(i)+"_HAS_IMMEDIAT" );
321	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_IMMEDIAT" ,
322	dest, "in_DECOD_IN_"+toString(i)+"_IMMEDIAT" );
323	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_READ_RA" ,
324	dest, "in_DECOD_IN_"+toString(i)+"_READ_RA" );
325	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RA" ,
326	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RA" );
327	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_READ_RB" ,
328	dest, "in_DECOD_IN_"+toString(i)+"_READ_RB" );
329	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RB" ,
330	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RB" );
331	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_READ_RC" ,
332	dest, "in_DECOD_IN_"+toString(i)+"_READ_RC" );
333	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RC" ,
334	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RC" );
335	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_WRITE_RD" ,
336	dest, "in_DECOD_IN_"+toString(i)+"_WRITE_RD" );
337	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RD" ,
338	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RD" );
339	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_WRITE_RE" ,
340	dest, "in_DECOD_IN_"+toString(i)+"_WRITE_RE" );
341	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_NUM_REG_RE" ,
342	dest, "in_DECOD_IN_"+toString(i)+"_NUM_REG_RE" );
343	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_EXCEPTION_USE",
344	dest, "in_DECOD_IN_"+toString(i)+"_EXCEPTION_USE");
345	COMPONENT_MAP(_component,src ,"out_DECOD_" +toString(i)+"_EXCEPTION" ,
346	dest, "in_DECOD_IN_"+toString(i)+"_EXCEPTION" );
347	}
348
349	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
350	{
351	dest = _name;
352
353	#ifdef POSITION
354	_component->interface_map (src ,"predict"+toString(i),
355	dest,"predict"+toString(i));
356	#endif
357
358	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_VAL" ,
359	dest,"out_PREDICT_"+toString(i)+"_VAL" );
360	PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_ACK" ,
361	dest, "in_PREDICT_"+toString(i)+"_ACK" );
362	if (_param->_have_port_context_id)
363	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_CONTEXT_ID" ,
364	dest,"out_PREDICT_"+toString(i)+"_CONTEXT_ID" );
365	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR" ,
366	dest,"out_PREDICT_"+toString(i)+"_MATCH_INST_IFETCH_PTR" );
367	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_STATE" ,
368	dest,"out_PREDICT_"+toString(i)+"_BRANCH_STATE" );
369	if (_param->_have_port_depth)
370	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID",
371	dest,"out_PREDICT_"+toString(i)+"_BRANCH_UPDATE_PREDICTION_ID");
372	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION" ,
373	dest,"out_PREDICT_"+toString(i)+"_BRANCH_CONDITION" );
374	// PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_STACK_WRITE" ,
375	// dest,"out_PREDICT_"+toString(i)+"_BRANCH_STACK_WRITE" );
376	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION" ,
377	dest,"out_PREDICT_"+toString(i)+"_BRANCH_DIRECTION" );
378	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC" ,
379	dest,"out_PREDICT_"+toString(i)+"_ADDRESS_SRC" );
380	PORT_MAP(_component,src ,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST" ,
381	dest,"out_PREDICT_"+toString(i)+"_ADDRESS_DEST" );
382	PORT_MAP(_component,src , "in_PREDICT_"+toString(i)+"_CAN_CONTINUE" ,
383	dest, "in_PREDICT_"+toString(i)+"_CAN_CONTINUE" );
384	}
385
386	for (uint32_t i=0; i<_param->_nb_context; i++)
387	{
388	dest = _name;
389
390	#ifdef POSITION
391	_component->interface_map (src ,"context_"+toString(i),
392	dest,"context_"+toString(i));
393	#endif
394
395	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DECOD_ENABLE",
396	dest, "in_CONTEXT_"+toString(i)+"_DECOD_ENABLE");
397	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DEPTH_VAL" ,
398	dest, "in_CONTEXT_"+toString(i)+"_DEPTH_VAL" );
399	if (_param->_have_port_depth)
400	PORT_MAP(_component,src , "in_CONTEXT_"+toString(i)+"_DEPTH" ,
401	dest, "in_CONTEXT_"+toString(i)+"_DEPTH" );
402	}
403
404	{
405	dest = _name;
406
407	#ifdef POSITION
408	_component->interface_map (src ,"context_event",
409	dest,"context_event");
410	#endif
411
412	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_VAL" ,
413	dest,"out_CONTEXT_EVENT_VAL" );
414	PORT_MAP(_component,src , "in_CONTEXT_EVENT_ACK" ,
415	dest, "in_CONTEXT_EVENT_ACK" );
416	if (_param->_have_port_context_id)
417	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_CONTEXT_ID" ,
418	dest,"out_CONTEXT_EVENT_CONTEXT_ID" );
419	if (_param->_have_port_depth)
420	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_DEPTH" ,
421	dest,"out_CONTEXT_EVENT_DEPTH" );
422	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_TYPE" ,
423	dest,"out_CONTEXT_EVENT_TYPE" );
424	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_IS_DELAY_SLOT",
425	dest,"out_CONTEXT_EVENT_IS_DELAY_SLOT");
426	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_ADDRESS" ,
427	dest,"out_CONTEXT_EVENT_ADDRESS" );
428	PORT_MAP(_component,src ,"out_CONTEXT_EVENT_ADDRESS_EPCR" ,
429	dest,"out_CONTEXT_EVENT_ADDRESS_EPCR" );
430
431	}
432	}
433
434	// ===================================================================
435	// =====[ decod_queue ]===============================================
436	// ===================================================================
437	{
438	src = _name+"_decod_queue";
439	log_printf(INFO,Decod_unit,FUNCTION,_("Instance : %s"),src.c_str());
440
441	{
442	dest = _name;
443	#ifdef POSITION
444	_component->interface_map (src ,"",
445	dest,"");
446	#endif
447	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
448	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
449	}
450
451	// in_DECOD_IN_VAL - component decod
452	//out_DECOD_IN_ACK - component decod
453	// in_DECOD_IN_CONTEXT_ID - component decod
454	// in_DECOD_IN_DEPTH - component decod
455	// in_DECOD_IN_TYPE - component decod
456	// in_DECOD_IN_OPERATION - component decod
457	// in_DECOD_IN_NO_EXECUTE - component decod
458	// in_DECOD_IN_IS_DELAY_SLOT - component decod
459	// in_DECOD_IN_ADDRESS - component decod
460	// in_DECOD_IN_ADDRESS_NEXT - component decod
461	// in_DECOD_IN_HAS_IMMEDIAT - component decod
462	// in_DECOD_IN_IMMEDIAT - component decod
463	// in_DECOD_IN_READ_RA - component decod
464	// in_DECOD_IN_NUM_REG_RA - component decod
465	// in_DECOD_IN_READ_RB - component decod
466	// in_DECOD_IN_NUM_REG_RB - component decod
467	// in_DECOD_IN_READ_RC - component decod
468	// in_DECOD_IN_NUM_REG_RC - component decod
469	// in_DECOD_IN_WRITE_RD - component decod
470	// in_DECOD_IN_NUM_REG_RD - component decod
471	// in_DECOD_IN_WRITE_RE - component decod
472	// in_DECOD_IN_NUM_REG_RE - component decod
473	// in_DECOD_IN_EXCEPTION_USE - component decod
474	// in_DECOD_IN_EXCEPTION - component decod
475
476	for (uint32_t i=0; i<_param->_nb_inst_decod; i++)
477	{
478	dest = _name;
479
480	#ifdef POSITION
481	_component->interface_map (src ,"decod_out_"+toString(i),
482	dest,"decod" +toString(i));
483	#endif
484
485	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_VAL" ,
486	dest,"out_DECOD_" +toString(i)+"_VAL" );
487	PORT_MAP(_component,src , "in_DECOD_OUT_"+toString(i)+"_ACK" ,
488	dest, "in_DECOD_" +toString(i)+"_ACK" );
489	if (_param->_have_port_context_id)
490	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_CONTEXT_ID" ,
491	dest,"out_DECOD_" +toString(i)+"_CONTEXT_ID" );
492	if (_param->_have_port_depth)
493	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_DEPTH" ,
494	dest,"out_DECOD_" +toString(i)+"_DEPTH" );
495	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_TYPE" ,
496	dest,"out_DECOD_" +toString(i)+"_TYPE" );
497	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_OPERATION" ,
498	dest,"out_DECOD_" +toString(i)+"_OPERATION" );
499	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NO_EXECUTE" ,
500	dest,"out_DECOD_" +toString(i)+"_NO_EXECUTE" );
501	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IS_DELAY_SLOT",
502	dest,"out_DECOD_" +toString(i)+"_IS_DELAY_SLOT");
503	#ifdef DEBUG
504	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_ADDRESS" ,
505	dest,"out_DECOD_" +toString(i)+"_ADDRESS" );
506	#endif
507	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_ADDRESS_NEXT" ,
508	dest,"out_DECOD_" +toString(i)+"_ADDRESS_NEXT" );
509	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_HAS_IMMEDIAT" ,
510	dest,"out_DECOD_" +toString(i)+"_HAS_IMMEDIAT" );
511	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_IMMEDIAT" ,
512	dest,"out_DECOD_" +toString(i)+"_IMMEDIAT" );
513	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RA" ,
514	dest,"out_DECOD_" +toString(i)+"_READ_RA" );
515	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RA" ,
516	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RA" );
517	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RB" ,
518	dest,"out_DECOD_" +toString(i)+"_READ_RB" );
519	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RB" ,
520	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RB" );
521	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_READ_RC" ,
522	dest,"out_DECOD_" +toString(i)+"_READ_RC" );
523	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RC" ,
524	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RC" );
525	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_WRITE_RD" ,
526	dest,"out_DECOD_" +toString(i)+"_WRITE_RD" );
527	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RD" ,
528	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RD" );
529	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_WRITE_RE" ,
530	dest,"out_DECOD_" +toString(i)+"_WRITE_RE" );
531	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_NUM_REG_RE" ,
532	dest,"out_DECOD_" +toString(i)+"_NUM_REG_RE" );
533	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION_USE",
534	dest,"out_DECOD_" +toString(i)+"_EXCEPTION_USE");
535	PORT_MAP(_component,src ,"out_DECOD_OUT_"+toString(i)+"_EXCEPTION" ,
536	dest,"out_DECOD_" +toString(i)+"_EXCEPTION" );
537	}
538
539	for (uint32_t i=0; i<_param->_nb_context; i++)
540	{
541	dest = _name;
542
543	#ifdef POSITION
544	_component->interface_map (src ,"depth"+toString(i),
545	dest,"depth"+toString(i));
546	#endif
547
548	if (_param->_have_port_depth)
549	{
550	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_MIN",
551	dest, "in_DEPTH_"+toString(i)+"_MIN");
552	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_MAX",
553	dest, "in_DEPTH_"+toString(i)+"_MAX");
554	}
555	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_FULL",
556	dest, "in_DEPTH_"+toString(i)+"_FULL");
557	}
558
559	for (uint32_t i=0; i<_param->_nb_context; i++)
560	{
561	dest = _name;
562
563	#ifdef POSITION
564	_component->interface_map (src ,"nb_inst"+toString(i),
565	dest,"nb_inst"+toString(i));
566	#endif
567
568	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+ "_ALL",
569	dest,"out_NB_INST_"+toString(i)+"_DECOD_ALL");
570	}
571	}
572	// ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
573	#if DEBUG_Decod_unit == true
574	_component->test_map();
575	#endif
576
577	#ifdef POSITION
578	if (usage_is_set(_usage,USE_POSITION))
579	_component->generate_file();
580	#endif
581
582	log_end(Decod_unit,FUNCTION);
583	};
584
585	}; // end namespace decod_unit
586	}; // end namespace front_end
587	}; // end namespace multi_front_end
588	}; // end namespace core
589
590	}; // end namespace behavioural
591	}; // end namespace morpheo

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