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test.cpp @ 88

Last change on this file since 88 was 88, checked in by rosiere, 15 years ago
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1	/*
2	* $Id: test.cpp 88 2008-12-10 18:31:39Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (128*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15
16	void test (string name,
17	morpheo::behavioural::core::multi_front_end::front_end::prediction_unit::branch_target_buffer::branch_target_buffer_glue::Parameters * _param)
18	{
19	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
20
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
23	#endif
24
25	Tusage_t _usage = USE_ALL;
26
27	// _usage = usage_unset(_usage,USE_SYSTEMC );
28	// _usage = usage_unset(_usage,USE_VHDL );
29	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
30	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
31	// _usage = usage_unset(_usage,USE_POSITION );
32	// _usage = usage_unset(_usage,USE_STATISTICS );
33	// _usage = usage_unset(_usage,USE_INFORMATION );
34
35	Branch_Target_Buffer_Glue * _Branch_Target_Buffer_Glue = new Branch_Target_Buffer_Glue
36	(name.c_str(),
37	#ifdef STATISTICS
38	_parameters_statistics,
39	#endif
40	_param,
41	_usage);
42
43	#ifdef SYSTEMC
44	/*********************************************************************
45	* Déclarations des signaux
46	*********************************************************************/
47	string rename;
48
49	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
50	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
51
52	ALLOC1_SC_SIGNAL( in_PREDICT_VAL ," in_PREDICT_VAL ",Tcontrol_t ,_param->_nb_inst_predict);
53	ALLOC1_SC_SIGNAL(out_PREDICT_ACK ,"out_PREDICT_ACK ",Tcontrol_t ,_param->_nb_inst_predict);
54	ALLOC1_SC_SIGNAL(out_PREDICT_HIT ,"out_PREDICT_HIT ",Tcontrol_t ,_param->_nb_inst_predict);
55	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_SRC ,"out_PREDICT_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict);
56	ALLOC1_SC_SIGNAL(out_PREDICT_ADDRESS_DEST ,"out_PREDICT_ADDRESS_DEST ",Tgeneral_data_t ,_param->_nb_inst_predict);
57	ALLOC1_SC_SIGNAL(out_PREDICT_CONDITION ,"out_PREDICT_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict);
58	ALLOC1_SC_SIGNAL(out_PREDICT_LAST_TAKE ,"out_PREDICT_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict);
59	ALLOC1_SC_SIGNAL(out_PREDICT_IS_ACCURATE ,"out_PREDICT_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict);
60	ALLOC1_SC_SIGNAL(out_PREDICT_REGISTER_VAL ,"out_PREDICT_REGISTER_VAL ",Tcontrol_t ,_param->_nb_inst_predict);
61	ALLOC1_SC_SIGNAL( in_PREDICT_REGISTER_ACK ," in_PREDICT_REGISTER_ACK ",Tcontrol_t ,_param->_nb_inst_predict);
62	ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_HIT ," in_PREDICT_REGISTER_HIT ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity);
63	ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_ADDRESS_SRC ," in_PREDICT_REGISTER_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity);
64	ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_ADDRESS_DEST," in_PREDICT_REGISTER_ADDRESS_DEST",Tgeneral_data_t ,_param->_nb_inst_predict,_param->_associativity);
65	ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_CONDITION ," in_PREDICT_REGISTER_CONDITION ",Tbranch_condition_t,_param->_nb_inst_predict,_param->_associativity);
66	ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_LAST_TAKE ," in_PREDICT_REGISTER_LAST_TAKE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity);
67	ALLOC2_SC_SIGNAL( in_PREDICT_REGISTER_IS_ACCURATE ," in_PREDICT_REGISTER_IS_ACCURATE ",Tcontrol_t ,_param->_nb_inst_predict,_param->_associativity);
68	ALLOC1_SC_SIGNAL( in_PREDICT_SORT_VAL ," in_PREDICT_SORT_VAL ",Tptr_t ,_param->_nb_inst_predict);
69	ALLOC1_SC_SIGNAL( in_PREDICT_SORT_INDEX ," in_PREDICT_SORT_INDEX ",Tptr_t ,_param->_nb_inst_predict);
70	ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_VAL ,"out_PREDICT_VICTIM_VAL ",Tcontrol_t ,_param->_nb_inst_predict);
71	ALLOC1_SC_SIGNAL( in_PREDICT_VICTIM_ACK ," in_PREDICT_VICTIM_ACK ",Tcontrol_t ,_param->_nb_inst_predict);
72	ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_HIT ,"out_PREDICT_VICTIM_HIT ",Tcontrol_t ,_param->_nb_inst_predict);
73	ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_ADDRESS ,"out_PREDICT_VICTIM_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_predict);
74	ALLOC1_SC_SIGNAL(out_PREDICT_VICTIM_INDEX ,"out_PREDICT_VICTIM_INDEX ",Tptr_t ,_param->_nb_inst_predict);
75	ALLOC1_SC_SIGNAL( in_PREDICT_VICTIM_VICTIM ,"out_PREDICT_VICTIM_VICTIM ",Tptr_t ,_param->_nb_inst_predict);
76	ALLOC1_SC_SIGNAL( in_DECOD_VAL ," in_DECOD_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
77	ALLOC1_SC_SIGNAL(out_DECOD_ACK ,"out_DECOD_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
78	ALLOC1_SC_SIGNAL( in_DECOD_ADDRESS_SRC ," in_DECOD_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_decod);
79	ALLOC1_SC_SIGNAL(out_DECOD_REGISTER_VAL ,"out_DECOD_REGISTER_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
80	ALLOC1_SC_SIGNAL( in_DECOD_REGISTER_ACK ," in_DECOD_REGISTER_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
81	ALLOC1_SC_SIGNAL(out_DECOD_VICTIM_VAL ,"out_DECOD_VICTIM_VAL ",Tcontrol_t ,_param->_nb_inst_decod);
82	ALLOC1_SC_SIGNAL( in_DECOD_VICTIM_ACK ," in_DECOD_VICTIM_ACK ",Tcontrol_t ,_param->_nb_inst_decod);
83	ALLOC1_SC_SIGNAL(out_DECOD_VICTIM_ADDRESS ,"out_DECOD_VICTIM_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_decod);
84	ALLOC1_SC_SIGNAL( in_UPDATE_VAL ," in_UPDATE_VAL ",Tcontrol_t ,_param->_nb_inst_update);
85	ALLOC1_SC_SIGNAL(out_UPDATE_ACK ,"out_UPDATE_ACK ",Tcontrol_t ,_param->_nb_inst_update);
86	ALLOC1_SC_SIGNAL( in_UPDATE_ADDRESS_SRC ," in_UPDATE_ADDRESS_SRC ",Tgeneral_data_t ,_param->_nb_inst_update);
87	ALLOC1_SC_SIGNAL(out_UPDATE_REGISTER_VAL ,"out_UPDATE_REGISTER_VAL ",Tcontrol_t ,_param->_nb_inst_update);
88	ALLOC1_SC_SIGNAL( in_UPDATE_REGISTER_ACK ," in_UPDATE_REGISTER_ACK ",Tcontrol_t ,_param->_nb_inst_update);
89	ALLOC1_SC_SIGNAL(out_UPDATE_VICTIM_VAL ,"out_UPDATE_VICTIM_VAL ",Tcontrol_t ,_param->_nb_inst_update);
90	ALLOC1_SC_SIGNAL( in_UPDATE_VICTIM_ACK ," in_UPDATE_VICTIM_ACK ",Tcontrol_t ,_param->_nb_inst_update);
91	ALLOC1_SC_SIGNAL(out_UPDATE_VICTIM_ADDRESS ,"out_UPDATE_VICTIM_ADDRESS ",Tgeneral_data_t ,_param->_nb_inst_update);
92
93	/********************************************************
94	* Instanciation
95	********************************************************/
96
97	msg(_("<%s> : Instanciation of _Branch_Target_Buffer_Glue.\n"),name.c_str());
98
99	((_Branch_Target_Buffer_Glue->in_CLOCK)) ((in_CLOCK));
100	((_Branch_Target_Buffer_Glue->in_NRESET)) ((in_NRESET));
101
102	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_VAL ,_param->_nb_inst_predict);
103	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_ACK ,_param->_nb_inst_predict);
104	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_HIT ,_param->_nb_inst_predict);
105	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_ADDRESS_SRC ,_param->_nb_inst_predict);
106	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_ADDRESS_DEST ,_param->_nb_inst_predict);
107	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_CONDITION ,_param->_nb_inst_predict);
108	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_LAST_TAKE ,_param->_nb_inst_predict);
109	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_IS_ACCURATE ,_param->_nb_inst_predict);
110	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_REGISTER_VAL ,_param->_nb_inst_predict);
111	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_ACK ,_param->_nb_inst_predict);
112	INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_HIT ,_param->_nb_inst_predict,_param->_associativity);
113	INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_ADDRESS_SRC ,_param->_nb_inst_predict,_param->_associativity);
114	INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_ADDRESS_DEST,_param->_nb_inst_predict,_param->_associativity);
115	INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_CONDITION ,_param->_nb_inst_predict,_param->_associativity);
116	INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_LAST_TAKE ,_param->_nb_inst_predict,_param->_associativity);
117	INSTANCE2_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_REGISTER_IS_ACCURATE ,_param->_nb_inst_predict,_param->_associativity);
118	if (_param->_have_port_victim)
119	{
120	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_SORT_VAL ,_param->_nb_inst_predict);
121	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_SORT_INDEX ,_param->_nb_inst_predict);
122	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_VAL ,_param->_nb_inst_predict);
123	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_VICTIM_ACK ,_param->_nb_inst_predict);
124	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_HIT ,_param->_nb_inst_predict);
125	if (not _param->_is_full_associative)
126	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_ADDRESS ,_param->_nb_inst_predict);
127	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_PREDICT_VICTIM_INDEX ,_param->_nb_inst_predict);
128	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_PREDICT_VICTIM_VICTIM ,_param->_nb_inst_predict);
129	}
130	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_VAL ,_param->_nb_inst_decod);
131	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_ACK ,_param->_nb_inst_decod);
132	if (not _param->_is_full_associative)
133	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_ADDRESS_SRC ,_param->_nb_inst_decod);
134	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_REGISTER_VAL ,_param->_nb_inst_decod);
135	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_REGISTER_ACK ,_param->_nb_inst_decod);
136	if (_param->_have_port_victim)
137	{
138	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_VICTIM_VAL ,_param->_nb_inst_decod);
139	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_DECOD_VICTIM_ACK ,_param->_nb_inst_decod);
140	if (not _param->_is_full_associative)
141	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_DECOD_VICTIM_ADDRESS ,_param->_nb_inst_decod);
142	}
143	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_VAL ,_param->_nb_inst_update);
144	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_ACK ,_param->_nb_inst_update);
145	if (not _param->_is_full_associative)
146	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_ADDRESS_SRC ,_param->_nb_inst_update);
147	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_REGISTER_VAL ,_param->_nb_inst_update);
148	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_REGISTER_ACK ,_param->_nb_inst_update);
149	if (_param->_have_port_victim)
150	{
151	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_VICTIM_VAL ,_param->_nb_inst_update);
152	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue, in_UPDATE_VICTIM_ACK ,_param->_nb_inst_update);
153	if (not _param->_is_full_associative)
154	INSTANCE1_SC_SIGNAL(_Branch_Target_Buffer_Glue,out_UPDATE_VICTIM_ADDRESS ,_param->_nb_inst_update);
155	}
156	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
157
158	Time * _time = new Time();
159
160	/********************************************************
161	* Simulation - Begin
162	********************************************************/
163
164	// Initialisation
165
166	const uint32_t seed = 0;
167	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
168
169	srand(seed);
170
171	SC_START(0);
172	LABEL("Initialisation");
173
174	LABEL("Reset");
175	in_NRESET->write(0);
176	SC_START(5);
177	in_NRESET->write(1);
178
179	LABEL("Loop of Test");
180
181	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
182	{
183	LABEL("Iteration %d",iteration);
184
185	SC_START(1);
186	}
187
188	/********************************************************
189	* Simulation - End
190	********************************************************/
191
192	TEST_OK ("End of Simulation");
193	delete _time;
194
195	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
196
197	delete in_CLOCK;
198	delete in_NRESET;
199
200	delete [] in_PREDICT_VAL ;
201	delete [] out_PREDICT_ACK ;
202	delete [] out_PREDICT_HIT ;
203	delete [] out_PREDICT_ADDRESS_SRC ;
204	delete [] out_PREDICT_ADDRESS_DEST ;
205	delete [] out_PREDICT_CONDITION ;
206	delete [] out_PREDICT_LAST_TAKE ;
207	delete [] out_PREDICT_IS_ACCURATE ;
208	delete [] out_PREDICT_REGISTER_VAL ;
209	delete [] in_PREDICT_REGISTER_ACK ;
210	delete [] in_PREDICT_REGISTER_HIT ;
211	delete [] in_PREDICT_REGISTER_ADDRESS_SRC ;
212	delete [] in_PREDICT_REGISTER_ADDRESS_DEST;
213	delete [] in_PREDICT_REGISTER_CONDITION ;
214	delete [] in_PREDICT_REGISTER_LAST_TAKE ;
215	delete [] in_PREDICT_REGISTER_IS_ACCURATE ;
216	delete [] in_PREDICT_SORT_VAL ;
217	delete [] in_PREDICT_SORT_INDEX ;
218	delete [] out_PREDICT_VICTIM_VAL ;
219	delete [] in_PREDICT_VICTIM_ACK ;
220	delete [] out_PREDICT_VICTIM_HIT ;
221	delete [] out_PREDICT_VICTIM_ADDRESS ;
222	delete [] out_PREDICT_VICTIM_INDEX ;
223	delete [] in_PREDICT_VICTIM_VICTIM ;
224	delete [] in_DECOD_VAL ;
225	delete [] out_DECOD_ACK ;
226	delete [] in_DECOD_ADDRESS_SRC ;
227	delete [] out_DECOD_REGISTER_VAL ;
228	delete [] in_DECOD_REGISTER_ACK ;
229	delete [] out_DECOD_VICTIM_VAL ;
230	delete [] in_DECOD_VICTIM_ACK ;
231	delete [] out_DECOD_VICTIM_ADDRESS ;
232	delete [] in_UPDATE_VAL ;
233	delete [] out_UPDATE_ACK ;
234	delete [] in_UPDATE_ADDRESS_SRC ;
235	delete [] out_UPDATE_REGISTER_VAL ;
236	delete [] in_UPDATE_REGISTER_ACK ;
237	delete [] out_UPDATE_VICTIM_VAL ;
238	delete [] in_UPDATE_VICTIM_ACK ;
239	delete [] out_UPDATE_VICTIM_ADDRESS ;
240
241	#endif
242
243	delete _Branch_Target_Buffer_Glue;
244	#ifdef STATISTICS
245	delete _parameters_statistics;
246	#endif
247	}

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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_Front_end/Front_end/Prediction_unit/Branch_Target_Buffer/Branch_Target_Buffer_Glue/SelfTest/src/test.cpp @ 88

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