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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/src/Commit_unit_allocation.cpp @ 101

Last change on this file since 101 was 101, checked in by rosiere, 15 years ago
1) Add soc test 2) fix bug (Pc management, Decod and execute, Update prediction ...)
Property svn:keywords set to `Id`
File size: 24.7 KB

Line
1	/*
2	* $Id: Commit_unit_allocation.cpp 101 2009-01-15 17:19:08Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Commit_unit/include/Commit_unit.h"
9	#include "Behavioural/include/Allocation.h"
10	#include "Common/include/Max.h"
11
12	namespace morpheo {
13	namespace behavioural {
14	namespace core {
15	namespace multi_ooo_engine {
16	namespace ooo_engine {
17	namespace commit_unit {
18
19
20
21	#undef FUNCTION
22	#define FUNCTION "Commit_unit::allocation"
23	void Commit_unit::allocation (
24	#ifdef STATISTICS
25	morpheo::behavioural::Parameters_Statistics * param_statistics
26	#else
27	void
28	#endif
29	)
30	{
31	log_begin(Commit_unit,FUNCTION);
32
33	_component = new Component (_usage);
34
35	Entity * entity = _component->set_entity (_name
36	,"Commit_unit"
37	#ifdef POSITION
38	,COMBINATORY
39	#endif
40	);
41
42	_interfaces = entity->set_interfaces();
43
44	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
45	{
46	Interface * interface = _interfaces->set_interface(""
47	#ifdef POSITION
48	,IN
49	,SOUTH,
50	_("Generalist interface")
51	#endif
52	);
53
54	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
55	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
56	}
57
58	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
59	{
60	ALLOC2_INTERFACE("insert", IN, SOUTH, _("Interface with rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
61
62	_ALLOC2_VALACK_IN ( in_INSERT_VAL ,VAL,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
63	_ALLOC2_VALACK_OUT(out_INSERT_ACK ,ACK,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
64	_ALLOC2_SIGNAL_IN ( in_INSERT_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
65	_ALLOC2_SIGNAL_IN ( in_INSERT_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
66	_ALLOC2_SIGNAL_OUT(out_INSERT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
67	// _ALLOC2_SIGNAL_IN ( in_INSERT_RENAME_UNIT_ID ,"rename_unit_id" ,Tcontext_t ,_param->_size_rename_unit_id ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
68	_ALLOC2_SIGNAL_IN ( in_INSERT_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
69	_ALLOC2_SIGNAL_IN ( in_INSERT_TYPE ,"type" ,Ttype_t ,_param->_size_type ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
70	_ALLOC2_SIGNAL_IN ( in_INSERT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
71	_ALLOC2_SIGNAL_IN ( in_INSERT_NO_EXECUTE ,"no_execute" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
72	_ALLOC2_SIGNAL_IN ( in_INSERT_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
73	_ALLOC2_SIGNAL_IN ( in_INSERT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
74	_ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
75	_ALLOC2_SIGNAL_IN ( in_INSERT_EXCEPTION_USE ,"exception_use" ,Texception_t ,_param->_size_exception ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
76	_ALLOC2_SIGNAL_IN ( in_INSERT_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
77	_ALLOC2_SIGNAL_IN ( in_INSERT_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
78	_ALLOC2_SIGNAL_IN ( in_INSERT_READ_RA ,"read_ra" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
79	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_LOG ,"num_reg_ra_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
80	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
81	_ALLOC2_SIGNAL_IN ( in_INSERT_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
82	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_LOG ,"num_reg_rb_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
83	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
84	_ALLOC2_SIGNAL_IN ( in_INSERT_READ_RC ,"read_rc" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
85	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RC_LOG ,"num_reg_rc_log" ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
86	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
87	_ALLOC2_SIGNAL_IN ( in_INSERT_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
88	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
89	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_OLD ,"num_reg_rd_phy_old" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
90	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RD_PHY_NEW ,"num_reg_rd_phy_new" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
91	_ALLOC2_SIGNAL_IN ( in_INSERT_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
92	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
93	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_OLD ,"num_reg_re_phy_old" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
94	_ALLOC2_SIGNAL_IN ( in_INSERT_NUM_REG_RE_PHY_NEW ,"num_reg_re_phy_new" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_insert[it1]);
95	}
96
97	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
98	{
99	ALLOC2_INTERFACE("retire",OUT,SOUTH, _("Interface to update rename_unit."),_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
100
101	_ALLOC2_VALACK_OUT(out_RETIRE_VAL ,VAL,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
102	_ALLOC2_VALACK_IN ( in_RETIRE_ACK ,ACK,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
103	_ALLOC2_SIGNAL_OUT(out_RETIRE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
104	_ALLOC2_SIGNAL_OUT(out_RETIRE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
105	// _ALLOC2_SIGNAL_OUT(out_RETIRE_RENAME_UNIT_ID ,"rename_unit_id" ,Tcontext_t ,_param->_size_rename_unit_id ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
106	_ALLOC2_SIGNAL_OUT(out_RETIRE_EVENT_STATE ,"event_state" ,Tevent_state_t ,_param->_size_event_state ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
107	_ALLOC2_SIGNAL_OUT(out_RETIRE_USE_STORE_QUEUE ,"use_store_queue" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
108	_ALLOC2_SIGNAL_OUT(out_RETIRE_USE_LOAD_QUEUE ,"use_load_queue" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
109	_ALLOC2_SIGNAL_OUT(out_RETIRE_STORE_QUEUE_PTR_WRITE ,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
110	_ALLOC2_SIGNAL_OUT(out_RETIRE_LOAD_QUEUE_PTR_WRITE ,"load_queue_ptr_write" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
111	_ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RA ,"read_ra" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
112	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RA_PHY ,"num_reg_ra_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
113	_ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RB ,"read_rb" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
114	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RB_PHY ,"num_reg_rb_phy" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
115	_ALLOC2_SIGNAL_OUT(out_RETIRE_READ_RC ,"read_rc" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
116	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RC_PHY ,"num_reg_rc_phy" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
117	_ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RD ,"write_rd" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
118	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_LOG ,"num_reg_rd_log" ,Tgeneral_address_t,_param->_size_general_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
119	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_PHY_OLD ,"num_reg_rd_phy_old" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
120	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RD_PHY_NEW ,"num_reg_rd_phy_new" ,Tgeneral_address_t,_param->_size_general_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
121	_ALLOC2_SIGNAL_OUT(out_RETIRE_WRITE_RE ,"write_re" ,Tcontrol_t ,1 ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
122	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_LOG ,"num_reg_re_log" ,Tspecial_address_t,_param->_size_special_register_logic,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
123	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_OLD ,"num_reg_re_phy_old" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
124	_ALLOC2_SIGNAL_OUT(out_RETIRE_NUM_REG_RE_PHY_NEW ,"num_reg_re_phy_new" ,Tspecial_address_t,_param->_size_special_register ,_param->_nb_rename_unit,_param->_nb_inst_retire[it1]);
125	}
126
127	// ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
128	{
129	ALLOC1_INTERFACE("commit",IN,EAST,_("End of execute."),_param->_nb_inst_commit);
130
131	ALLOC1_VALACK_IN ( in_COMMIT_VAL ,VAL);
132	ALLOC1_VALACK_OUT(out_COMMIT_ACK ,ACK);
133	ALLOC1_SIGNAL_IN ( in_COMMIT_WEN ,"wen" ,Tcontrol_t ,1 );
134	ALLOC1_SIGNAL_IN ( in_COMMIT_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr );
135	// ALLOC1_SIGNAL_IN ( in_COMMIT_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation );
136	// ALLOC1_SIGNAL_IN ( in_COMMIT_TYPE ,"type" ,Ttype_t ,_param->_size_type );
137	ALLOC1_SIGNAL_IN ( in_COMMIT_FLAGS ,"flags" ,Tspecial_data_t ,_param->_size_general_data );
138	ALLOC1_SIGNAL_IN ( in_COMMIT_EXCEPTION ,"exception" ,Texception_t ,_param->_size_exception );
139	ALLOC1_SIGNAL_IN ( in_COMMIT_NO_SEQUENCE ,"no_sequence",Tcontrol_t ,1 );
140	ALLOC1_SIGNAL_IN ( in_COMMIT_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address);
141	// ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register+_param->_size_rename_unit_id);
142	ALLOC1_SIGNAL_OUT(out_COMMIT_NUM_REG_RD ,"num_reg_rd" ,Tgeneral_address_t,_param->_size_general_register);
143	}
144
145	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
146	{
147	ALLOC1_INTERFACE("reexecute",OUT,EAST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_reexecute);
148
149	ALLOC1_VALACK_OUT(out_REEXECUTE_VAL ,VAL);
150	ALLOC1_VALACK_IN ( in_REEXECUTE_ACK ,ACK);
151	ALLOC1_SIGNAL_OUT(out_REEXECUTE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id);
152	ALLOC1_SIGNAL_OUT(out_REEXECUTE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id);
153	ALLOC1_SIGNAL_OUT(out_REEXECUTE_PACKET_ID ,"packet_id" ,Tpacket_t ,_param->_size_rob_ptr );
154	ALLOC1_SIGNAL_OUT(out_REEXECUTE_OPERATION ,"operation" ,Toperation_t ,_param->_size_operation);
155	ALLOC1_SIGNAL_OUT(out_REEXECUTE_TYPE ,"type" ,Ttype_t ,_param->_size_type);
156	ALLOC1_SIGNAL_OUT(out_REEXECUTE_STORE_QUEUE_PTR_WRITE,"store_queue_ptr_write",Tlsq_ptr_t ,_param->_size_store_queue_ptr);
157	}
158
159	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
160	{
161	ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Interface to reexecute an instruction (store)"),_param->_nb_inst_branch_complete);
162
163	ALLOC1_VALACK_OUT(out_BRANCH_COMPLETE_VAL ,VAL);
164	ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_ACK ,ACK);
165	ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id);
166	ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id);
167	ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth );
168	ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address);
169	// ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_FLAG ,"flag" ,Tcontrol_t ,1);
170	ALLOC1_SIGNAL_OUT(out_BRANCH_COMPLETE_NO_SEQUENCE ,"no_sequence" ,Tcontrol_t ,1);
171	ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION,"miss_prediction",Tcontrol_t ,1);
172	}
173
174	// ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
175	{
176	ALLOC_INTERFACE("update", OUT, WEST,_("Interface with to Context State."));
177
178	ALLOC_VALACK_OUT(out_UPDATE_VAL ,VAL);
179	ALLOC_VALACK_IN ( in_UPDATE_ACK ,ACK);
180	ALLOC_SIGNAL_OUT(out_UPDATE_CONTEXT_ID ,"context_id" ,Tcontext_t ,_param->_size_context_id);
181	ALLOC_SIGNAL_OUT(out_UPDATE_FRONT_END_ID ,"front_end_id" ,Tcontext_t ,_param->_size_front_end_id);
182	ALLOC_SIGNAL_OUT(out_UPDATE_DEPTH ,"depth" ,Tdepth_t ,_param->_size_depth );
183	ALLOC_SIGNAL_OUT(out_UPDATE_TYPE ,"type" ,Tevent_type_t ,_param->_size_event_type);
184	ALLOC_SIGNAL_OUT(out_UPDATE_IS_DELAY_SLOT ,"is_delay_slot" ,Tcontrol_t ,1);
185	ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS ,"address" ,Taddress_t ,_param->_size_instruction_address);
186	ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EPCR ,"address_epcr" ,Taddress_t ,_param->_size_instruction_address);
187	ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR_VAL ,"address_eear_val",Tcontrol_t ,1);
188	ALLOC_SIGNAL_OUT(out_UPDATE_ADDRESS_EEAR ,"address_eear" ,Tgeneral_data_t ,_param->_size_general_data);
189	}
190
191	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
192	{
193	ALLOC2_INTERFACE("event",IN,WEST,_("Interface with Context State (event)."),_param->_nb_front_end, _param->_nb_context[it1]);
194
195	_ALLOC2_VALACK_IN ( in_EVENT_VAL , VAL ,_param->_nb_front_end, _param->_nb_context[it1]);
196	_ALLOC2_VALACK_OUT(out_EVENT_ACK , ACK ,_param->_nb_front_end, _param->_nb_context[it1]);
197	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t,_param->_size_instruction_address,_param->_nb_front_end, _param->_nb_context[it1]);
198	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t,_param->_size_instruction_address,_param->_nb_front_end, _param->_nb_context[it1]);
199	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL,"ADDRESS_NEXT_VAL",Tcontrol_t,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
200	_ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE ,"IS_DS_TAKE" ,Tcontrol_t,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
201	}
202
203	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
204	{
205	ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Interface with Context State (synchronization)."),_param->_nb_front_end, _param->_nb_context[it1]);
206
207	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL ,"commit_all",Tcounter_t ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
208	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM ,"commit_mem",Tcounter_t ,_param->_size_nb_inst_commit,_param->_nb_front_end, _param->_nb_context[it1]);
209	}
210
211	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
212	{
213	ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
214
215	_ALLOC2_SIGNAL_IN ( in_DEPTH_MIN ,"min" ,Tdepth_t ,_param->_size_depth,_param->_nb_front_end, _param->_nb_context[it1]);
216	_ALLOC2_SIGNAL_IN ( in_DEPTH_MAX ,"max" ,Tdepth_t ,_param->_size_depth,_param->_nb_front_end, _param->_nb_context[it1]);
217	_ALLOC2_SIGNAL_IN ( in_DEPTH_FULL ,"full" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
218	}
219
220
221	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
222	{
223	ALLOC2_INTERFACE("spr_read",IN ,EAST,_("Interface with special register file (read)."),_param->_nb_front_end, _param->_nb_context[it1]);
224
225	_ALLOC2_SIGNAL_IN ( in_SPR_READ_SR_OVE ,"sr_ove" ,Tcontrol_t ,1,_param->_nb_front_end, _param->_nb_context[it1]);
226	}
227
228	// ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
229	{
230	ALLOC2_INTERFACE("spr_write",OUT,EAST,_("Interface with special register file (write)."),_param->_nb_front_end, _param->_nb_context[it1]);
231
232	_ALLOC2_VALACK_OUT(out_SPR_WRITE_VAL ,VAL,_param->_nb_front_end, _param->_nb_context[it1]);
233	_ALLOC2_VALACK_IN ( in_SPR_WRITE_ACK ,ACK,_param->_nb_front_end, _param->_nb_context[it1]);
234	_ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_F_VAL ,"sr_f_val" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
235	_ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_F ,"sr_f" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
236	_ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_CY_VAL ,"sr_cy_val" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
237	_ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_CY ,"sr_cy" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
238	_ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV_VAL ,"sr_ov_val" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
239	_ALLOC2_SIGNAL_OUT(out_SPR_WRITE_SR_OV ,"sr_ov" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
240	}
241
242	if (usage_is_set(_usage,USE_SYSTEMC))
243	{
244	// ~~~~~[ Internal ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
245	internal_BANK_INSERT_VAL = new Tcontrol_t [_param->_nb_bank];
246	internal_BANK_INSERT_NUM_RENAME_UNIT = new uint32_t [_param->_nb_bank];
247	internal_BANK_INSERT_NUM_INST = new uint32_t [_param->_nb_bank];
248
249	internal_BANK_COMMIT_VAL = new Tcontrol_t * [_param->_nb_bank];
250	internal_BANK_COMMIT_NUM_INST = new uint32_t * [_param->_nb_bank];
251	internal_BANK_COMMIT_ENTRY = new entry_t ** [_param->_nb_bank];
252
253	for (uint32_t i=0; i<_param->_nb_bank; i++)
254	{
255	internal_BANK_COMMIT_VAL [i] = new Tcontrol_t [_param->_nb_bank_access_commit];
256	internal_BANK_COMMIT_NUM_INST [i] = new uint32_t [_param->_nb_bank_access_commit];
257	internal_BANK_COMMIT_ENTRY [i] = new entry_t * [_param->_nb_bank_access_commit];
258	}
259
260	internal_BANK_RETIRE_VAL = new Tcontrol_t [_param->_nb_bank];
261	internal_BANK_RETIRE_NUM_RENAME_UNIT = new uint32_t [_param->_nb_bank];
262	internal_BANK_RETIRE_NUM_INST = new uint32_t [_param->_nb_bank];
263
264	internal_REEXECUTE_VAL = new Tcontrol_t [_param->_nb_inst_reexecute];
265	internal_REEXECUTE_NUM_BANK = new uint32_t [_param->_nb_inst_reexecute];
266
267	internal_BRANCH_COMPLETE_VAL = new Tcontrol_t [_param->_nb_inst_branch_complete];
268	internal_BRANCH_COMPLETE_NUM_BANK = new uint32_t [_param->_nb_inst_branch_complete];
269
270	internal_EVENT_ACK = new Tcontrol_t * [_param->_nb_front_end];
271	for (uint32_t i=0; i<_param->_nb_front_end; i++)
272	internal_EVENT_ACK [i] = new Tcontrol_t [_param->_nb_context [i]];
273
274	// ~~~~~[ Register ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
275	ALLOC1(_rob ,std::list<entry_t*>,_param->_nb_bank);
276
277	ALLOC1(reg_BANK_PTR ,uint32_t ,_param->_nb_bank);
278
279	ALLOC2(reg_NB_INST_COMMIT_ALL ,Tcounter_t ,_param->_nb_front_end,_param->_nb_context [it1]);
280	ALLOC2(reg_NB_INST_COMMIT_MEM ,Tcounter_t ,_param->_nb_front_end,_param->_nb_context [it1]);
281
282	ALLOC2(reg_EVENT_STATE ,Tevent_state_t,_param->_nb_front_end,_param->_nb_context [it1]);
283	}
284
285	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
286	_priority_insert = new generic::priority::Priority (_name+"_priority_insert",
287	_param->_priority ,
288	_param->_load_balancing,
289	_param->_nb_rename_unit,
290	_param->_nb_inst_insert,
291	_param->_nb_rename_unit_select);
292
293	#ifdef POSITION
294	if (usage_is_set(_usage,USE_POSITION))
295	_component->generate_file();
296	#endif
297
298	log_end(Commit_unit,FUNCTION);
299	};
300
301	}; // end namespace commit_unit
302	}; // end namespace ooo_engine
303	}; // end namespace multi_ooo_engine
304	}; // end namespace core
305
306	}; // end namespace behavioural
307	}; // end namespace morpheo

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