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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/src/test.cpp @ 88

Last change on this file since 88 was 88, checked in by rosiere, 15 years ago
Almost complete design with Test and test platform
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1	/*
2	* $Id: test.cpp 88 2008-12-10 18:31:39Z rosiere $
3	*
4	* [ Description ]
5	*
6	* Test
7	*/
8
9	#define NB_ITERATION 1
10	#define CYCLE_MAX (128*NB_ITERATION)
11
12	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Rename_unit/Register_translation_unit/Stat_List_unit/SelfTest/include/test.h"
13	#include "Common/include/Test.h"
14	#include "Behavioural/include/Allocation.h"
15	#include <list>
16
17
18	class entry_t
19	{
20	public : bool _is_free ;
21	public : bool _is_link ;
22	public : bool _is_valid;
23	public : uint32_t _counter ;
24	};
25
26
27	void test (string name,
28	morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::register_translation_unit::stat_list_unit::Parameters * _param)
29	{
30	msg(_("<%s> : Simulation SystemC.\n"),name.c_str());
31
32	#ifdef STATISTICS
33	morpheo::behavioural::Parameters_Statistics * _parameters_statistics = new morpheo::behavioural::Parameters_Statistics (5,50);
34	#endif
35
36	Tusage_t _usage = USE_ALL;
37
38	// _usage = usage_unset(_usage,USE_SYSTEMC );
39	// _usage = usage_unset(_usage,USE_VHDL );
40	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH );
41	// _usage = usage_unset(_usage,USE_VHDL_TESTBENCH_ASSERT);
42	// _usage = usage_unset(_usage,USE_POSITION );
43	// _usage = usage_unset(_usage,USE_STATISTICS );
44	// _usage = usage_unset(_usage,USE_INFORMATION );
45
46	Stat_List_unit * _Stat_List_unit = new Stat_List_unit
47	(name.c_str(),
48	#ifdef STATISTICS
49	_parameters_statistics,
50	#endif
51	_param,
52	_usage);
53
54	#ifdef SYSTEMC
55	/*********************************************************************
56	* Déclarations des signaux
57	*********************************************************************/
58	string rename;
59
60	sc_clock * in_CLOCK = new sc_clock ("clock", 1.0, 0.5);
61	sc_signal<Tcontrol_t> * in_NRESET = new sc_signal<Tcontrol_t> ("NRESET");
62
63	ALLOC1_SC_SIGNAL( in_INSERT_VAL ," in_INSERT_VAL ",Tcontrol_t ,_param->_nb_inst_insert);
64	ALLOC1_SC_SIGNAL(out_INSERT_ACK ,"out_INSERT_ACK ",Tcontrol_t ,_param->_nb_inst_insert);
65	ALLOC1_SC_SIGNAL( in_INSERT_READ_RA ," in_INSERT_READ_RA ",Tcontrol_t ,_param->_nb_inst_insert);
66	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RA_PHY ," in_INSERT_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
67	ALLOC1_SC_SIGNAL( in_INSERT_READ_RB ," in_INSERT_READ_RB ",Tcontrol_t ,_param->_nb_inst_insert);
68	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RB_PHY ," in_INSERT_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_insert);
69	ALLOC1_SC_SIGNAL( in_INSERT_READ_RC ," in_INSERT_READ_RC ",Tcontrol_t ,_param->_nb_inst_insert);
70	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RC_PHY ," in_INSERT_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_insert);
71	ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RD ," in_INSERT_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_insert);
72	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RD_PHY_NEW," in_INSERT_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_insert);
73	ALLOC1_SC_SIGNAL( in_INSERT_WRITE_RE ," in_INSERT_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_insert);
74	ALLOC1_SC_SIGNAL( in_INSERT_NUM_REG_RE_PHY_NEW," in_INSERT_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_insert);
75	ALLOC1_SC_SIGNAL( in_RETIRE_VAL ," in_RETIRE_VAL ",Tcontrol_t ,_param->_nb_inst_retire);
76	ALLOC1_SC_SIGNAL(out_RETIRE_ACK ,"out_RETIRE_ACK ",Tcontrol_t ,_param->_nb_inst_retire);
77	ALLOC1_SC_SIGNAL( in_RETIRE_READ_RA ," in_RETIRE_READ_RA ",Tcontrol_t ,_param->_nb_inst_retire);
78	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RA_PHY ," in_RETIRE_NUM_REG_RA_PHY ",Tgeneral_address_t,_param->_nb_inst_retire);
79	ALLOC1_SC_SIGNAL( in_RETIRE_READ_RB ," in_RETIRE_READ_RB ",Tcontrol_t ,_param->_nb_inst_retire);
80	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RB_PHY ," in_RETIRE_NUM_REG_RB_PHY ",Tgeneral_address_t,_param->_nb_inst_retire);
81	ALLOC1_SC_SIGNAL( in_RETIRE_READ_RC ," in_RETIRE_READ_RC ",Tcontrol_t ,_param->_nb_inst_retire);
82	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RC_PHY ," in_RETIRE_NUM_REG_RC_PHY ",Tspecial_address_t,_param->_nb_inst_retire);
83	ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RD ," in_RETIRE_WRITE_RD ",Tcontrol_t ,_param->_nb_inst_retire);
84	ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RD_PHY_OLD," in_RETIRE_RESTORE_RD_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire);
85	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_OLD," in_RETIRE_NUM_REG_RD_PHY_OLD",Tgeneral_address_t,_param->_nb_inst_retire);
86	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RD_PHY_NEW," in_RETIRE_NUM_REG_RD_PHY_NEW",Tgeneral_address_t,_param->_nb_inst_retire);
87	ALLOC1_SC_SIGNAL( in_RETIRE_WRITE_RE ," in_RETIRE_WRITE_RE ",Tcontrol_t ,_param->_nb_inst_retire);
88	ALLOC1_SC_SIGNAL( in_RETIRE_RESTORE_RE_PHY_OLD," in_RETIRE_RESTORE_RE_PHY_OLD",Tcontrol_t ,_param->_nb_inst_retire);
89	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_OLD," in_RETIRE_NUM_REG_RE_PHY_OLD",Tspecial_address_t,_param->_nb_inst_retire);
90	ALLOC1_SC_SIGNAL( in_RETIRE_NUM_REG_RE_PHY_NEW," in_RETIRE_NUM_REG_RE_PHY_NEW",Tspecial_address_t,_param->_nb_inst_retire);
91	ALLOC1_SC_SIGNAL(out_PUSH_GPR_VAL ,"out_PUSH_GPR_VAL ",Tcontrol_t ,_param->_nb_reg_free);
92	ALLOC1_SC_SIGNAL( in_PUSH_GPR_ACK ," in_PUSH_GPR_ACK ",Tcontrol_t ,_param->_nb_reg_free);
93	ALLOC1_SC_SIGNAL(out_PUSH_GPR_NUM_REG ,"out_PUSH_GPR_NUM_REG ",Tgeneral_address_t,_param->_nb_reg_free);
94	ALLOC1_SC_SIGNAL(out_PUSH_SPR_VAL ,"out_PUSH_SPR_VAL ",Tcontrol_t ,_param->_nb_reg_free);
95	ALLOC1_SC_SIGNAL( in_PUSH_SPR_ACK ," in_PUSH_SPR_ACK ",Tcontrol_t ,_param->_nb_reg_free);
96	ALLOC1_SC_SIGNAL(out_PUSH_SPR_NUM_REG ,"out_PUSH_SPR_NUM_REG ",Tspecial_address_t,_param->_nb_reg_free);
97
98
99	/********************************************************
100	* Instanciation
101	********************************************************/
102
103	msg(_("<%s> : Instanciation of _Stat_List_unit.\n"),name.c_str());
104
105	((_Stat_List_unit->in_CLOCK)) ((in_CLOCK));
106	((_Stat_List_unit->in_NRESET)) ((in_NRESET));
107
108	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_VAL ,_param->_nb_inst_insert);
109	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_INSERT_ACK ,_param->_nb_inst_insert);
110	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RA ,_param->_nb_inst_insert);
111	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RA_PHY ,_param->_nb_inst_insert);
112	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RB ,_param->_nb_inst_insert);
113	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RB_PHY ,_param->_nb_inst_insert);
114	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_READ_RC ,_param->_nb_inst_insert);
115	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RC_PHY ,_param->_nb_inst_insert);
116	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RD ,_param->_nb_inst_insert);
117	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RD_PHY_NEW,_param->_nb_inst_insert);
118	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_WRITE_RE ,_param->_nb_inst_insert);
119	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_INSERT_NUM_REG_RE_PHY_NEW,_param->_nb_inst_insert);
120
121	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_VAL ,_param->_nb_inst_retire);
122	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_RETIRE_ACK ,_param->_nb_inst_retire);
123	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RA ,_param->_nb_inst_retire);
124	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RA_PHY ,_param->_nb_inst_retire);
125	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RB ,_param->_nb_inst_retire);
126	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RB_PHY ,_param->_nb_inst_retire);
127	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_READ_RC ,_param->_nb_inst_retire);
128	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RC_PHY ,_param->_nb_inst_retire);
129	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RD ,_param->_nb_inst_retire);
130	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RD_PHY_OLD,_param->_nb_inst_retire);
131	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_OLD,_param->_nb_inst_retire);
132	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RD_PHY_NEW,_param->_nb_inst_retire);
133	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_WRITE_RE ,_param->_nb_inst_retire);
134	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_RESTORE_RE_PHY_OLD,_param->_nb_inst_retire);
135	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_OLD,_param->_nb_inst_retire);
136	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_RETIRE_NUM_REG_RE_PHY_NEW,_param->_nb_inst_retire);
137
138	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_VAL ,_param->_nb_reg_free);
139	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_GPR_ACK ,_param->_nb_reg_free);
140	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_GPR_NUM_REG ,_param->_nb_reg_free);
141
142	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_VAL ,_param->_nb_reg_free);
143	INSTANCE1_SC_SIGNAL(_Stat_List_unit, in_PUSH_SPR_ACK ,_param->_nb_reg_free);
144	INSTANCE1_SC_SIGNAL(_Stat_List_unit,out_PUSH_SPR_NUM_REG ,_param->_nb_reg_free);
145
146	msg(_("<%s> : Start Simulation ............\n"),name.c_str());
147
148	Time * _time = new Time();
149
150	/********************************************************
151	* Simulation - Begin
152	********************************************************/
153
154	// Initialisation
155
156	const uint32_t seed = 0;
157	//const uint32_t seed = static_cast<uint32_t>(time(NULL));
158
159	srand(seed);
160
161	int32_t percent_transaction_insert = 95;
162	int32_t percent_transaction_retire = 95;
163	int32_t percent_transaction_push = 95;
164
165	uint32_t nb_thread = 0;
166	for (uint32_t i=0; i<_param->_nb_front_end; i++)
167	nb_thread += _param->_nb_context [i];
168
169	SC_START(0);
170	LABEL("Initialisation");
171
172	LABEL("Reset");
173	in_NRESET->write(0);
174	SC_START(5);
175	in_NRESET->write(1);
176
177	LABEL("Loop of Test");
178
179	for (uint32_t iteration=0; iteration<NB_ITERATION; iteration ++)
180	{
181	LABEL("Iteration %d",iteration);
182
183	entry_t gpr_status [_param->_nb_general_register];
184	entry_t spr_status [_param->_nb_special_register];
185
186	for (uint32_t i=0; i<_param->_nb_general_register; i++)
187	{
188	gpr_status[i]._is_free = false;
189	gpr_status[i]._is_link = (i<(nb_thread*31+1));
190	gpr_status[i]._is_valid = true;
191	gpr_status[i]._counter = 0;
192	}
193	for (uint32_t i=0; i<_param->_nb_special_register; i++)
194	{
195	spr_status[i]._is_free = false;
196	spr_status[i]._is_link = (i<(nb_thread*2));
197	spr_status[i]._is_valid = true;
198	spr_status[i]._counter = 0;
199	}
200
201	std::list<Tgeneral_address_t> free_list_gpr;
202	std::list<Tgeneral_address_t> free_list_spr;
203
204	// Test free register
205	while ((free_list_gpr.size() < (_param->_nb_general_register - (nb_thread*31+1))) and
206	(free_list_spr.size() < (_param->_nb_special_register - (nb_thread*2 ))))
207	{
208	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
209	in_INSERT_VAL [i]->write(0);
210	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
211	in_RETIRE_VAL [i]->write(0);
212
213	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
214	{
215	in_PUSH_GPR_ACK [i]->write((rand()%100)<percent_transaction_push);
216	in_PUSH_SPR_ACK [i]->write((rand()%100)<percent_transaction_push);
217	}
218
219	SC_START(0);
220
221	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
222	{
223	if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read())
224	{
225	Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read();
226
227	LABEL("PUSH_GPR [%d] - Accepted",i);
228	LABEL(" * reg : %d",reg);
229	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
230	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
231	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
232	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
233
234	TEST(bool, true,((gpr_status[reg]._is_free == 0) and
235	(gpr_status[reg]._is_link == 0) and
236	(gpr_status[reg]._is_valid == 1) and
237	(gpr_status[reg]._counter == 0)));
238
239	gpr_status[reg]._is_free = 1;
240	free_list_gpr.push_back(reg);
241	}
242
243	if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read())
244	{
245	Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read();
246
247	LABEL("PUSH_SPR [%d] - Accepted",i);
248	LABEL(" * reg : %d",reg);
249	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
250	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
251	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
252	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
253
254	TEST(bool, true,((spr_status[reg]._is_free == 0) and
255	(spr_status[reg]._is_link == 0) and
256	(spr_status[reg]._is_valid == 1) and
257	(spr_status[reg]._counter == 0)));
258
259	spr_status[reg]._is_free = 1;
260	free_list_spr.push_back(reg);
261	}
262	}
263
264	SC_START(1);
265	}
266
267	LABEL("=======================");
268	LABEL("===== END OF INIT =====");
269	LABEL("=======================");
270
271	int32_t nb_cycle = 64;
272
273	while (nb_cycle > 0)
274	{
275	std::list<Tgeneral_address_t>::iterator it_gpr = free_list_gpr.begin();
276	std::list<Tspecial_address_t>::iterator it_spr = free_list_spr.begin();
277
278
279	entry_t gpr_status_insert [_param->_nb_general_register];
280	entry_t spr_status_insert [_param->_nb_special_register];
281	entry_t gpr_status_retire [_param->_nb_general_register];
282	entry_t spr_status_retire [_param->_nb_special_register];
283
284	for (uint32_t i=0; i<_param->_nb_general_register; i++)
285	{
286	gpr_status_insert [i] = gpr_status[i];
287	gpr_status_retire [i] = gpr_status[i];
288	}
289	for (uint32_t i=0; i<_param->_nb_special_register; i++)
290	{
291	spr_status_insert [i] = spr_status[i];
292	spr_status_retire [i] = spr_status[i];
293	}
294
295	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
296	{
297	Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1;
298	Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1;
299	Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ;
300	Tgeneral_address_t rd = (it_gpr != free_list_gpr.end())?*it_gpr:0;
301	Tspecial_address_t re = (it_spr != free_list_spr.end())?*it_spr:0;
302
303	Tcontrol_t read_ra = (gpr_status_insert[ra]._is_link) and (gpr_status_insert[ra]._counter < _param->_max_reader);
304	Tcontrol_t read_rb = (gpr_status_insert[rb]._is_link) and (gpr_status_insert[rb]._counter < _param->_max_reader);
305	Tcontrol_t read_rc = (spr_status_insert[rc]._is_link) and (spr_status_insert[rc]._counter < _param->_max_reader);
306	Tcontrol_t write_rd = (it_gpr != free_list_gpr.end());
307	Tcontrol_t write_re = (it_spr != free_list_spr.end());
308
309	in_INSERT_VAL [i]->write((rand()%100) < percent_transaction_insert);
310	in_INSERT_READ_RA [i]->write(read_ra );
311	in_INSERT_NUM_REG_RA_PHY [i]->write(ra);
312	in_INSERT_READ_RB [i]->write(read_rb );
313	in_INSERT_NUM_REG_RB_PHY [i]->write(rb);
314	in_INSERT_READ_RC [i]->write(read_rc );
315	in_INSERT_NUM_REG_RC_PHY [i]->write(rc);
316	in_INSERT_WRITE_RD [i]->write(write_rd);
317	in_INSERT_NUM_REG_RD_PHY_NEW [i]->write(rd);
318	in_INSERT_WRITE_RE [i]->write(write_re);
319	in_INSERT_NUM_REG_RE_PHY_NEW [i]->write(re);
320
321	if (read_ra)
322	gpr_status_insert[ra]._counter++;
323	if (read_rb)
324	gpr_status_insert[rb]._counter++;
325	if (read_rc)
326	spr_status_insert[rc]._counter++;
327	if (write_rd)
328	it_gpr ++;
329	if (write_re)
330	it_spr ++;
331	}
332
333	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
334	{
335	Tgeneral_address_t ra = (rand()%(_param->_nb_general_register-1))+1;
336	Tgeneral_address_t rb = (rand()%(_param->_nb_general_register-1))+1;
337	Tspecial_address_t rc = (rand()%(_param->_nb_special_register )) ;
338	Tgeneral_address_t rd_old = (rand()%(_param->_nb_general_register-1))+1;
339	Tgeneral_address_t rd_new = (rand()%(_param->_nb_general_register-1))+1;
340	Tspecial_address_t re_old = (rand()%(_param->_nb_special_register )) ;
341	Tspecial_address_t re_new = (rand()%(_param->_nb_special_register )) ;
342
343	Tcontrol_t read_ra = (gpr_status_retire[ra]._is_link) and (gpr_status_retire[ra]._counter > 0);
344	Tcontrol_t read_rb = (gpr_status_retire[rb]._is_link) and (gpr_status_retire[rb]._counter > 0);
345	Tcontrol_t read_rc = (spr_status_retire[rc]._is_link) and (spr_status_retire[rc]._counter > 0);
346	Tcontrol_t write_rd = ( (gpr_status_retire[rd_old]._is_link ) and
347	(gpr_status_retire[rd_old]._is_valid) and
348	(gpr_status_retire[rd_new]._is_link ) and
349	not (gpr_status_retire[rd_new]._is_valid));
350	Tcontrol_t write_re = ( (spr_status_retire[re_old]._is_link ) and
351	(spr_status_retire[re_old]._is_valid) and
352	(spr_status_retire[re_new]._is_link ) and
353	not (spr_status_retire[re_new]._is_valid));
354
355	in_RETIRE_VAL [i]->write((rand()%100) < percent_transaction_retire);
356	in_RETIRE_READ_RA [i]->write(read_ra );
357	in_RETIRE_NUM_REG_RA_PHY [i]->write(ra);
358	in_RETIRE_READ_RB [i]->write(read_rb );
359	in_RETIRE_NUM_REG_RB_PHY [i]->write(rb);
360	in_RETIRE_READ_RC [i]->write(read_rc );
361	in_RETIRE_NUM_REG_RC_PHY [i]->write(rc);
362	in_RETIRE_WRITE_RD [i]->write(write_rd);
363	in_RETIRE_RESTORE_RD_PHY_OLD [i]->write(0);
364	in_RETIRE_NUM_REG_RD_PHY_OLD [i]->write(rd_old);
365	in_RETIRE_NUM_REG_RD_PHY_NEW [i]->write(rd_new);
366	in_RETIRE_WRITE_RE [i]->write(write_re);
367	in_RETIRE_RESTORE_RE_PHY_OLD [i]->write(0);
368	in_RETIRE_NUM_REG_RE_PHY_OLD [i]->write(re_old);
369	in_RETIRE_NUM_REG_RE_PHY_NEW [i]->write(re_new);
370
371	if (read_ra)
372	{
373	gpr_status_retire[ra]._counter --;
374	}
375	if (read_rb)
376	{
377	gpr_status_retire[rb]._counter --;
378	}
379	if (read_rc)
380	{
381	spr_status_retire[rc]._counter --;
382	}
383	if (write_rd)
384	{
385	gpr_status_retire[rd_old]._is_link = 0;
386	gpr_status_retire[rd_new]._is_valid = 1;
387	}
388	if (write_re)
389	{
390	spr_status_retire[re_old]._is_link = 0;
391	spr_status_retire[re_new]._is_valid = 1;
392	}
393
394	}
395
396
397	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
398	{
399	in_PUSH_GPR_ACK [i]->write((rand()%100)<percent_transaction_push);
400	in_PUSH_SPR_ACK [i]->write((rand()%100)<percent_transaction_push);
401	}
402
403	SC_START(0);
404
405	it_gpr = free_list_gpr.begin();
406	it_spr = free_list_spr.begin();
407
408	for (uint32_t i=0; i<_param->_nb_inst_insert; i++)
409	{
410	Tcontrol_t write_rd = in_INSERT_WRITE_RD [i]->read();
411	Tcontrol_t write_re = in_INSERT_WRITE_RE [i]->read();
412
413	if (in_INSERT_VAL [i]->read() and out_INSERT_ACK [i]->read())
414	{
415	Tcontrol_t read_ra = in_INSERT_READ_RA [i]->read();
416	Tgeneral_address_t ra = in_INSERT_NUM_REG_RA_PHY [i]->read();
417	Tcontrol_t read_rb = in_INSERT_READ_RB [i]->read();
418	Tgeneral_address_t rb = in_INSERT_NUM_REG_RB_PHY [i]->read();
419	Tcontrol_t read_rc = in_INSERT_READ_RC [i]->read();
420	Tspecial_address_t rc = in_INSERT_NUM_REG_RC_PHY [i]->read();
421	Tgeneral_address_t rd_new = in_INSERT_NUM_REG_RD_PHY_NEW [i]->read();
422	Tspecial_address_t re_new = in_INSERT_NUM_REG_RE_PHY_NEW [i]->read();
423
424	LABEL("INSERT [%d] - Accepted",i);
425	LABEL(" * read_ra : %d",read_ra );
426	LABEL(" * reg_ra : %d",ra );
427	LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free );
428	LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link );
429	LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
430	LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter );
431	LABEL(" * read_rb : %d",read_rb );
432	LABEL(" * reg_rb : %d",rb );
433	LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free );
434	LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link );
435	LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
436	LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter );
437	LABEL(" * read_rc : %d",read_rc );
438	LABEL(" * reg_rc : %d",rc );
439	LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free );
440	LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link );
441	LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
442	LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter );
443	LABEL(" * read_rd : %d",write_rd);
444	LABEL(" * reg_rd_new : %d",rd_new );
445	LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free );
446	LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link );
447	LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid);
448	LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter );
449	LABEL(" * read_re : %d",write_re);
450	LABEL(" * reg_re_new : %d",re_new );
451	LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free );
452	LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link );
453	LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid);
454	LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter );
455
456	if (read_ra)
457	{
458	gpr_status[ra]._counter ++;
459	}
460	if (read_rb)
461	{
462	gpr_status[rb]._counter ++;
463	}
464	if (read_rc)
465	{
466	spr_status[rc]._counter ++;
467	}
468	if (write_rd)
469	{
470	Tgeneral_address_t reg = *it_gpr;
471	TEST(Tgeneral_address_t,reg,rd_new);
472
473	it_gpr = free_list_gpr.erase(it_gpr);
474
475	gpr_status[reg]._is_free = 0;
476	gpr_status[reg]._is_link = 1;
477	gpr_status[reg]._is_valid = 0;
478	}
479
480	if (write_re)
481	{
482	Tspecial_address_t reg = *it_spr;
483	TEST(Tspecial_address_t,reg,re_new);
484
485	it_spr = free_list_spr.erase(it_spr);
486
487	spr_status[reg]._is_free = 0;
488	spr_status[reg]._is_link = 1;
489	spr_status[reg]._is_valid = 0;
490	}
491	}
492	else
493	{
494	if (write_rd)
495	it_gpr ++;
496	if (write_re)
497	it_spr ++;
498	}
499	}
500
501	for (uint32_t i=0; i<_param->_nb_inst_retire; i++)
502	if (in_RETIRE_VAL [i]->read() and out_RETIRE_ACK [i]->read())
503	{
504	Tcontrol_t read_ra = in_RETIRE_READ_RA [i]->read();
505	Tgeneral_address_t ra = in_RETIRE_NUM_REG_RA_PHY [i]->read();
506	Tcontrol_t read_rb = in_RETIRE_READ_RB [i]->read();
507	Tgeneral_address_t rb = in_RETIRE_NUM_REG_RB_PHY [i]->read();
508	Tcontrol_t read_rc = in_RETIRE_READ_RC [i]->read();
509	Tspecial_address_t rc = in_RETIRE_NUM_REG_RC_PHY [i]->read();
510	Tcontrol_t write_rd = in_RETIRE_WRITE_RD [i]->read();
511	Tcontrol_t restore_rd_old = in_RETIRE_RESTORE_RD_PHY_OLD [i]->read();
512	Tgeneral_address_t rd_old = in_RETIRE_NUM_REG_RD_PHY_OLD [i]->read();
513	Tgeneral_address_t rd_new = in_RETIRE_NUM_REG_RD_PHY_NEW [i]->read();
514	Tcontrol_t write_re = in_RETIRE_WRITE_RE [i]->read();
515	Tcontrol_t restore_re_old = in_RETIRE_RESTORE_RE_PHY_OLD [i]->read();
516	Tgeneral_address_t re_old = in_RETIRE_NUM_REG_RE_PHY_OLD [i]->read();
517	Tgeneral_address_t re_new = in_RETIRE_NUM_REG_RE_PHY_NEW [i]->read();
518
519	LABEL("RETIRE [%d] - Accepted",i);
520	LABEL(" * read_ra : %d",read_ra );
521	LABEL(" * reg_ra : %d",ra );
522	LABEL(" * status[%d]._is_free : %d",ra,spr_status[ra]._is_free );
523	LABEL(" * status[%d]._is_link : %d",ra,spr_status[ra]._is_link );
524	LABEL(" * status[%d]._is_valid : %d",ra,spr_status[ra]._is_valid);
525	LABEL(" * status[%d]._counter : %d",ra,spr_status[ra]._counter );
526	LABEL(" * read_rb : %d",read_rb );
527	LABEL(" * reg_rb : %d",rb );
528	LABEL(" * status[%d]._is_free : %d",rb,spr_status[rb]._is_free );
529	LABEL(" * status[%d]._is_link : %d",rb,spr_status[rb]._is_link );
530	LABEL(" * status[%d]._is_valid : %d",rb,spr_status[rb]._is_valid);
531	LABEL(" * status[%d]._counter : %d",rb,spr_status[rb]._counter );
532	LABEL(" * read_rc : %d",read_rc );
533	LABEL(" * reg_rc : %d",rc );
534	LABEL(" * status[%d]._is_free : %d",rc,spr_status[rc]._is_free );
535	LABEL(" * status[%d]._is_link : %d",rc,spr_status[rc]._is_link );
536	LABEL(" * status[%d]._is_valid : %d",rc,spr_status[rc]._is_valid);
537	LABEL(" * status[%d]._counter : %d",rc,spr_status[rc]._counter );
538	LABEL(" * read_rd : %d",write_rd);
539	LABEL(" * restore_rd_old : %d",restore_rd_old);
540	LABEL(" * reg_rd_old : %d",rd_old );
541	LABEL(" * status[%d]._is_free : %d",rd_old,spr_status[rd_old]._is_free );
542	LABEL(" * status[%d]._is_link : %d",rd_old,spr_status[rd_old]._is_link );
543	LABEL(" * status[%d]._is_valid : %d",rd_old,spr_status[rd_old]._is_valid);
544	LABEL(" * status[%d]._counter : %d",rd_old,spr_status[rd_old]._counter );
545	LABEL(" * reg_rd_new : %d",rd_new );
546	LABEL(" * status[%d]._is_free : %d",rd_new,spr_status[rd_new]._is_free );
547	LABEL(" * status[%d]._is_link : %d",rd_new,spr_status[rd_new]._is_link );
548	LABEL(" * status[%d]._is_valid : %d",rd_new,spr_status[rd_new]._is_valid);
549	LABEL(" * status[%d]._counter : %d",rd_new,spr_status[rd_new]._counter );
550	LABEL(" * read_re : %d",write_re);
551	LABEL(" * restore_re_old : %d",restore_re_old);
552	LABEL(" * reg_re_old : %d",re_old );
553	LABEL(" * status[%d]._is_free : %d",re_old,spr_status[re_old]._is_free );
554	LABEL(" * status[%d]._is_link : %d",re_old,spr_status[re_old]._is_link );
555	LABEL(" * status[%d]._is_valid : %d",re_old,spr_status[re_old]._is_valid);
556	LABEL(" * status[%d]._counter : %d",re_old,spr_status[re_old]._counter );
557	LABEL(" * reg_re_new : %d",re_new );
558	LABEL(" * status[%d]._is_free : %d",re_new,spr_status[re_new]._is_free );
559	LABEL(" * status[%d]._is_link : %d",re_new,spr_status[re_new]._is_link );
560	LABEL(" * status[%d]._is_valid : %d",re_new,spr_status[re_new]._is_valid);
561	LABEL(" * status[%d]._counter : %d",re_new,spr_status[re_new]._counter );
562
563	if (read_ra)
564	{
565	gpr_status[ra]._counter --;
566	}
567	if (read_rb)
568	{
569	gpr_status[rb]._counter --;
570	}
571	if (read_rc)
572	{
573	spr_status[rc]._counter --;
574	}
575	if (write_rd)
576	{
577	if (restore_rd_old)
578	{
579	gpr_status[rd_old]._is_link = 1;
580	gpr_status[rd_new]._is_link = 0;
581	gpr_status[rd_new]._is_valid = 1;
582	}
583	else
584	{
585	gpr_status[rd_old]._is_link = 0;
586	gpr_status[rd_new]._is_valid = 1;
587	}
588	}
589	if (write_re)
590	{
591	if (restore_re_old)
592	{
593	spr_status[re_old]._is_link = 1;
594	spr_status[re_new]._is_link = 0;
595	spr_status[re_new]._is_valid = 1;
596	}
597	else
598	{
599	spr_status[re_old]._is_link = 0;
600	spr_status[re_new]._is_valid = 1;
601	}
602	}
603	}
604
605
606	for (uint32_t i=0; i<_param->_nb_reg_free; i++)
607	{
608	if (out_PUSH_GPR_VAL [i]->read() and in_PUSH_GPR_ACK [i]->read())
609	{
610	Tgeneral_address_t reg = out_PUSH_GPR_NUM_REG [i]->read();
611
612	LABEL("PUSH_GPR [%d] - Accepted",i);
613	LABEL(" * reg : %d",reg);
614	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
615	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
616	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
617	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
618
619	TEST(bool, true,((gpr_status[reg]._is_free == 0) and
620	(gpr_status[reg]._is_link == 0) and
621	(gpr_status[reg]._is_valid == 1) and
622	(gpr_status[reg]._counter == 0)));
623
624	gpr_status[reg]._is_free = 1;
625	free_list_gpr.push_back(reg);
626	}
627
628	if (out_PUSH_SPR_VAL [i]->read() and in_PUSH_SPR_ACK [i]->read())
629	{
630	Tspecial_address_t reg = out_PUSH_SPR_NUM_REG [i]->read();
631
632	LABEL("PUSH_SPR [%d] - Accepted",i);
633	LABEL(" * reg : %d",reg);
634	LABEL(" * status[%d]._is_free : %d",reg,spr_status[reg]._is_free );
635	LABEL(" * status[%d]._is_link : %d",reg,spr_status[reg]._is_link );
636	LABEL(" * status[%d]._is_valid : %d",reg,spr_status[reg]._is_valid);
637	LABEL(" * status[%d]._counter : %d",reg,spr_status[reg]._counter );
638
639	TEST(bool, true,((spr_status[reg]._is_free == 0) and
640	(spr_status[reg]._is_link == 0) and
641	(spr_status[reg]._is_valid == 1) and
642	(spr_status[reg]._counter == 0)));
643
644	spr_status[reg]._is_free = 1;
645	free_list_spr.push_back(reg);
646	}
647	}
648
649	SC_START(1);
650	nb_cycle --;
651	}
652	}
653
654	/********************************************************
655	* Simulation - End
656	********************************************************/
657
658	TEST_OK ("End of Simulation");
659	delete _time;
660
661	msg(_("<%s> : ............ Stop Simulation\n"),name.c_str());
662
663	delete in_CLOCK;
664	delete in_NRESET;
665
666	delete [] in_INSERT_VAL ;
667	delete [] out_INSERT_ACK ;
668	delete [] in_INSERT_READ_RA ;
669	delete [] in_INSERT_NUM_REG_RA_PHY ;
670	delete [] in_INSERT_READ_RB ;
671	delete [] in_INSERT_NUM_REG_RB_PHY ;
672	delete [] in_INSERT_READ_RC ;
673	delete [] in_INSERT_NUM_REG_RC_PHY ;
674	delete [] in_INSERT_WRITE_RD ;
675	delete [] in_INSERT_NUM_REG_RD_PHY_NEW;
676	delete [] in_INSERT_WRITE_RE ;
677	delete [] in_INSERT_NUM_REG_RE_PHY_NEW;
678	delete [] in_RETIRE_VAL ;
679	delete [] out_RETIRE_ACK ;
680	delete [] in_RETIRE_READ_RA ;
681	delete [] in_RETIRE_NUM_REG_RA_PHY ;
682	delete [] in_RETIRE_READ_RB ;
683	delete [] in_RETIRE_NUM_REG_RB_PHY ;
684	delete [] in_RETIRE_READ_RC ;
685	delete [] in_RETIRE_NUM_REG_RC_PHY ;
686	delete [] in_RETIRE_WRITE_RD ;
687	delete [] in_RETIRE_RESTORE_RD_PHY_OLD;
688	delete [] in_RETIRE_NUM_REG_RD_PHY_OLD;
689	delete [] in_RETIRE_NUM_REG_RD_PHY_NEW;
690	delete [] in_RETIRE_WRITE_RE ;
691	delete [] in_RETIRE_RESTORE_RE_PHY_OLD;
692	delete [] in_RETIRE_NUM_REG_RE_PHY_OLD;
693	delete [] in_RETIRE_NUM_REG_RE_PHY_NEW;
694	delete [] out_PUSH_GPR_VAL ;
695	delete [] in_PUSH_GPR_ACK ;
696	delete [] out_PUSH_GPR_NUM_REG ;
697	delete [] out_PUSH_SPR_VAL ;
698	delete [] in_PUSH_SPR_ACK ;
699	delete [] out_PUSH_SPR_NUM_REG ;
700
701	#endif
702
703	delete _Stat_List_unit;
704	#ifdef STATISTICS
705	delete _parameters_statistics;
706	#endif
707	}

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