| 1 | #ifdef SYSTEMC |
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| 2 | /* |
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| 3 | * $Id: Special_Register_unit_transition.cpp 97 2008-12-19 15:34:00Z rosiere $ |
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| 4 | * |
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| 5 | * [ Description ] |
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| 6 | * |
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| 7 | */ |
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| 8 | |
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| 9 | #include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/Special_Register_unit/include/Special_Register_unit.h" |
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| 10 | |
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| 11 | namespace morpheo { |
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| 12 | namespace behavioural { |
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| 13 | namespace core { |
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| 14 | namespace multi_ooo_engine { |
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| 15 | namespace ooo_engine { |
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| 16 | namespace special_register_unit { |
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| 17 | |
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| 18 | |
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| 19 | #undef FUNCTION |
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| 20 | #define FUNCTION "Special_Register_unit::transition" |
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| 21 | void Special_Register_unit::transition (void) |
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| 22 | { |
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| 23 | log_begin(Special_Register_unit,FUNCTION); |
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| 24 | |
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| 25 | if (PORT_READ(in_NRESET) == 0) |
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| 26 | { |
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| 27 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 28 | for (uint32_t j=0; j<_param->_nb_context[i]; j++) |
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| 29 | for (uint32_t k=0; k<NB_GROUP; k++) |
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| 30 | if (_param->_implement_group [i][j][k]) |
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| 31 | for (uint32_t l=0; l<NB_REG_GROUP[k]; l++) |
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| 32 | if (_spr_access_mode [i][j]->exist(k,l)) |
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| 33 | { |
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| 34 | #ifdef DEBUG_TEST |
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| 35 | if (_spr [i][j][k] == NULL) |
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| 36 | throw ERRORMORPHEO(FUNCTION,toString(_("Group [%d] is not implemented.\n"),k)); |
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| 37 | if (_spr [i][j][k][l] == NULL) |
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| 38 | throw ERRORMORPHEO(FUNCTION,toString(_("Register [%d][%d] is not implemented.\n"),k,l)); |
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| 39 | #endif |
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| 40 | log_printf(TRACE,Special_Register_unit,FUNCTION,"Reset SPR [%d][%d][%d][%d]",i,j,k,l); |
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| 41 | _spr [i][j][k][l]->reset(); |
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| 42 | } |
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| 43 | |
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| 44 | } |
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| 45 | else |
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| 46 | { |
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| 47 | // =================================================================== |
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| 48 | // =====[ SPR_ACCESS ]================================================ |
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| 49 | // =================================================================== |
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| 50 | for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++) |
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| 51 | if (PORT_READ(in_SPR_ACCESS_VAL [i]) and internal_SPR_ACCESS_ACK [i]) |
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| 52 | if (PORT_READ(in_SPR_ACCESS_WEN [i])) |
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| 53 | { |
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| 54 | Tcontext_t front_end_id = (_param->_have_port_front_end_id)?PORT_READ(in_SPR_ACCESS_FRONT_END_ID [i]):0; |
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| 55 | Tcontext_t context_id = (_param->_have_port_context_id )?PORT_READ(in_SPR_ACCESS_CONTEXT_ID [i]):0; |
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| 56 | Tspr_address_t num_group = PORT_READ(in_SPR_ACCESS_NUM_GROUP [i]); |
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| 57 | Tspr_address_t num_reg = PORT_READ(in_SPR_ACCESS_NUM_REG [i]); |
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| 58 | |
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| 59 | SR * sr = static_cast<SR*>(_spr [front_end_id][context_id][GROUP_SYSTEM_AND_CONTROL][SPR_SR]); |
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| 60 | |
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| 61 | Tcontrol_t sm = sr->sm ; |
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| 62 | Tcontrol_t sumra = sr->sumra; |
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| 63 | |
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| 64 | if (_spr_access_mode [front_end_id][context_id]->write(spr_address_t(num_group,num_reg), |
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| 65 | sm, |
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| 66 | sumra)) |
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| 67 | _spr[front_end_id][context_id][num_group][num_reg]->write(PORT_READ(in_SPR_ACCESS_WDATA [i])); |
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| 68 | |
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| 69 | } |
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| 70 | |
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| 71 | // =================================================================== |
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| 72 | // =====[ SPR_COMMIT ]-=============================================== |
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| 73 | // =================================================================== |
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| 74 | for (uint32_t i=0; i<_param->_nb_front_end; i++) |
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| 75 | for (uint32_t j=0; j<_param->_nb_context[i]; j++) |
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| 76 | { |
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| 77 | if (PORT_READ(in_SPR_COMMIT_VAL [i][j])) // out_SPR_COMMIT_ACK [i][j] |
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| 78 | { |
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| 79 | SR * sr = static_cast<SR*>(_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR]); |
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| 80 | |
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| 81 | if (PORT_READ(in_SPR_COMMIT_SR_F_VAL [i][j])) |
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| 82 | sr->f = PORT_READ(in_SPR_COMMIT_SR_F [i][j]); |
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| 83 | |
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| 84 | if (PORT_READ(in_SPR_COMMIT_SR_CY_VAL [i][j])) |
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| 85 | sr->cy = PORT_READ(in_SPR_COMMIT_SR_CY [i][j]); |
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| 86 | |
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| 87 | if (PORT_READ(in_SPR_COMMIT_SR_OV_VAL [i][j])) |
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| 88 | sr->ov = PORT_READ(in_SPR_COMMIT_SR_OV [i][j]); |
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| 89 | } |
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| 90 | |
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| 91 | if (PORT_READ(in_SPR_EVENT_VAL [i][j])) // out_SPR_EVENT_ACK [i][j] |
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| 92 | { |
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| 93 | SR * sr = static_cast<SR*>(_spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_SR]); |
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| 94 | sr->dsx = PORT_READ(in_SPR_EVENT_SR_DSX [i][j]); |
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| 95 | |
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| 96 | _spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_EPCR]->write(PORT_READ(in_SPR_EVENT_EPCR [i][j])); |
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| 97 | if (PORT_READ(in_SPR_EVENT_EEAR_WEN [i][j])) |
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| 98 | _spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_EEAR]->write(PORT_READ(in_SPR_EVENT_EEAR [i][j])); |
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| 99 | if (PORT_READ(in_SPR_EVENT_SR_TO_ESR [i][j])) |
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| 100 | _spr [i][j][GROUP_SYSTEM_AND_CONTROL][SPR_ESR ]->write(sr->read()); |
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| 101 | } |
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| 102 | } |
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| 103 | } |
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| 104 | |
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| 105 | #if defined(STATISTICS) or defined(VHDL_TESTBENCH) |
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| 106 | end_cycle (); |
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| 107 | #endif |
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| 108 | |
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| 109 | log_end(Special_Register_unit,FUNCTION); |
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| 110 | }; |
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| 111 | |
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| 112 | }; // end namespace special_register_unit |
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| 113 | }; // end namespace ooo_engine |
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| 114 | }; // end namespace multi_ooo_engine |
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| 115 | }; // end namespace core |
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| 116 | |
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| 117 | }; // end namespace behavioural |
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| 118 | }; // end namespace morpheo |
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| 119 | #endif |
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