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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp @ 105

Last change on this file since 105 was 105, checked in by rosiere, 15 years ago
1) Bug fix : Load Miss Speculation (in Commit_unit, Update Prediction Table and Context State) 2) Change address, in rob write address_next. 3) Move Meta_Predictor in save directory
Property svn:keywords set to `Id`
File size: 117.0 KB

Line
1	/*
2	* $Id: OOO_Engine_allocation.cpp 105 2009-02-05 11:18:31Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_ooo_engine {
15	namespace ooo_engine {
16
17	#undef FUNCTION
18	#define FUNCTION "OOO_Engine::allocation"
19	void OOO_Engine::allocation
20	(
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * param_statistics
23	#else
24	void
25	#endif
26	)
27	{
28	log_begin(OOO_Engine,FUNCTION);
29
30	_component = new Component (_usage);
31
32	Entity * entity = _component->set_entity (_name
33	,"OOO_Engine"
34	#ifdef POSITION
35	,COMBINATORY
36	#endif
37	);
38
39	_interfaces = entity->set_interfaces();
40
41	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
42	{
43	Interface * interface = _interfaces->set_interface(""
44	#ifdef POSITION
45	,IN
46	,SOUTH,
47	"Generalist interface"
48	#endif
49	);
50
51	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
52	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
53	}
54
55	// ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
56	{
57	ALLOC2_INTERFACE("rename",IN,WEST,_("Instruction from front_end."),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
58
59	_ALLOC2_VALACK_IN ( in_RENAME_VAL , VAL ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
60	_ALLOC2_VALACK_OUT(out_RENAME_ACK , ACK ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
61	_ALLOC2_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
62	_ALLOC2_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
63	_ALLOC2_SIGNAL_IN ( in_RENAME_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
64	_ALLOC2_SIGNAL_IN ( in_RENAME_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
65	_ALLOC2_SIGNAL_IN ( in_RENAME_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
66	_ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
67	_ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
68	_ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
69	_ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
70	_ALLOC2_SIGNAL_IN ( in_RENAME_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
71	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RA ,"READ_RA" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
72	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RA ,"NUM_REG_RA" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
73	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RB ,"READ_RB" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
74	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RB ,"NUM_REG_RB" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
75	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RC ,"READ_RC" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
76	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RC ,"NUM_REG_RC" ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
77	_ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
78	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
79	_ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
80	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
81	_ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION_USE ,"EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
82	_ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
83	}
84
85	// ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
86	{
87	ALLOC1_INTERFACE("issue",OUT,EAST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
88
89	ALLOC1_VALACK_OUT (out_ISSUE_VAL , VAL );
90	ALLOC1_VALACK_IN ( in_ISSUE_ACK , ACK );
91	ALLOC1_SIGNAL_OUT (out_ISSUE_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
92	ALLOC1_SIGNAL_OUT (out_ISSUE_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
93	ALLOC1_SIGNAL_OUT (out_ISSUE_PACKET_ID ,"PACKET_ID" ,Tpacket_t ,_param->_size_rob_ptr );
94	ALLOC1_SIGNAL_OUT (out_ISSUE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type );
95	ALLOC1_SIGNAL_OUT (out_ISSUE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation );
96	ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr );
97	ALLOC1_SIGNAL_OUT (out_ISSUE_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr );
98	ALLOC1_SIGNAL_OUT (out_ISSUE_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 );
99	ALLOC1_SIGNAL_OUT (out_ISSUE_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data );
100	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RA ,"READ_RA" ,Tcontrol_t ,1 );
101	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RA ,"NUM_REG_RA" ,Tgeneral_address_t,_param->_size_general_register );
102	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RB ,"READ_RB" ,Tcontrol_t ,1 );
103	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RB ,"NUM_REG_RB" ,Tgeneral_address_t,_param->_size_general_register );
104	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RC ,"READ_RC" ,Tcontrol_t ,1 );
105	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RC ,"NUM_REG_RC" ,Tspecial_address_t,_param->_size_special_register );
106	ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1 );
107	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register );
108	ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1 );
109	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register );
110	}
111
112	// ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
113	{
114	ALLOC2_INTERFACE("execute_loop",IN,EAST,_("Instruction executed, from execute_loop."),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
115
116	_ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL , VAL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
117	_ALLOC2_VALACK_OUT(out_EXECUTE_LOOP_ACK , ACK ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
118	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
119	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
120	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_PACKET_ID ,"PACKET_ID" ,Tpacket_t ,_param->_size_rob_ptr ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
121	// _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
122	// _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
123	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
124	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
125	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
126	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
127	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA ,"DATA" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
128	}
129
130	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
131	{
132	ALLOC1_INTERFACE("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);
133
134	ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL);
135	ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK);
136	ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 );
137	ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
138	ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 );
139	ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
140	}
141
142	// // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
143	// {
144	// ALLOC1_INTERFACE("retire",OUT,EAST,_("Interface with RegisterFile's stat-list (retire Re-Order-Buffer)."),_param->_sum_inst_retire);
145
146	// ALLOC1_VALACK_OUT (out_RETIRE_VAL , VAL);
147	// ALLOC1_VALACK_IN ( in_RETIRE_ACK , ACK);
148	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_USE ,"RD_OLD_USE" ,Tcontrol_t ,1 );
149	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_NUM_REG ,"RD_OLD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
150	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_USE ,"RD_NEW_USE" ,Tcontrol_t ,1 );
151	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_NUM_REG ,"RD_NEW_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
152	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_USE ,"RE_OLD_USE" ,Tcontrol_t ,1 );
153	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_NUM_REG ,"RE_OLD_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
154	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE ,"RE_NEW_USE" ,Tcontrol_t ,1 );
155	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG ,"RE_NEW_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
156	// }
157
158	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
159	{
160	ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
161
162	ALLOC1_VALACK_OUT (out_BRANCH_COMPLETE_VAL , VAL);
163	ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_ACK , ACK);
164	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
165	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
166	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth );
167	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address );
168	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 );
169	ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION ,"MISS_PREDICTION" ,Tcontrol_t ,1 );
170	}
171
172	// ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
173	{
174	ALLOC_INTERFACE("commit_event",OUT,WEST,_("Commit an event (exception)."));
175
176	ALLOC_VALACK_OUT (out_COMMIT_EVENT_VAL , VAL);
177	ALLOC_VALACK_IN ( in_COMMIT_EVENT_ACK , ACK);
178	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
179	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
180	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth );
181	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_TYPE ,"TYPE" ,Tevent_type_t ,_param->_size_event_type );
182	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 );
183	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address );
184	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EPCR_VAL ,"ADDRESS_EPCR_VAL" ,Tcontrol_t ,1 );
185	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EPCR ,"ADDRESS_EPCR" ,Taddress_t ,_param->_size_instruction_address );
186	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR_VAL ,"ADDRESS_EEAR_VAL" ,Tcontrol_t ,1 );
187	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR ,"ADDRESS_EEAR" ,Tgeneral_data_t ,_param->_size_general_data );
188	}
189
190	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
191	{
192	ALLOC2_INTERFACE("event",IN,WEST,_("Event from context_state."),_param->_nb_front_end,_param->_nb_context[it1]);
193
194	_ALLOC2_VALACK_IN ( in_EVENT_VAL , VAL ,_param->_nb_front_end,_param->_nb_context[it1]);
195	_ALLOC2_VALACK_OUT(out_EVENT_ACK , ACK ,_param->_nb_front_end,_param->_nb_context[it1]);
196	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_context[it1]);
197	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_context[it1]);
198	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"ADDRESS_NEXT_VAL" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
199	_ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE ,"IS_DS_TAKE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
200	}
201
202	// ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
203	{
204	ALLOC2_INTERFACE("spr_event",IN,WEST,_("Exception : save spr and set a lot of special register."),_param->_nb_front_end,_param->_nb_context[it1]);
205
206	_ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL , VAL ,_param->_nb_front_end,_param->_nb_context[it1]);
207	_ALLOC2_VALACK_OUT(out_SPR_EVENT_ACK , ACK ,_param->_nb_front_end,_param->_nb_context[it1]);
208	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EPCR ,"EPCR" ,Tspr_t ,_param->_size_spr ,_param->_nb_front_end,_param->_nb_context[it1]);
209	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR_WEN ,"EEAR_WEN" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
210	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR ,"EEAR" ,Tspr_t ,_param->_size_spr ,_param->_nb_front_end,_param->_nb_context[it1]);
211	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX ,"SR_DSX" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
212	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR ,"SR_TO_ESR" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
213	}
214
215	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
216	{
217	ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Internal number instruction."),_param->_nb_front_end,_param->_nb_context[it1]);
218
219	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL ,"COMMIT_ALL" ,Tcounter_t ,_param->_size_nb_inst_commit ,_param->_nb_front_end,_param->_nb_context[it1]);
220	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM ,"COMMIT_MEM" ,Tcounter_t ,_param->_size_nb_inst_commit ,_param->_nb_front_end,_param->_nb_context[it1]);
221	}
222
223	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
224	{
225	ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
226
227	_ALLOC2_SIGNAL_IN ( in_DEPTH_MIN ,"MIN" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end, _param->_nb_context[it1]);
228	_ALLOC2_SIGNAL_IN ( in_DEPTH_MAX ,"MAX" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end, _param->_nb_context[it1]);
229	_ALLOC2_SIGNAL_IN ( in_DEPTH_FULL ,"FULL" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
230	}
231
232	// ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
233	{
234	ALLOC2_INTERFACE("spr",OUT,WEST,_("SPR"),_param->_nb_front_end,_param->_nb_context[it1]);
235
236	_ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE ,"SR_IEE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
237	_ALLOC2_SIGNAL_OUT(out_SPR_SR_EPH ,"SR_EPH" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
238	}
239
240	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
241	std::string name;
242
243	_component_rename_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit * [_param->_nb_rename_unit];
244	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
245	{
246	name = _name+"_rename_unit_"+toString(i);
247	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
248
249	_component_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit
250	(name.c_str()
251	#ifdef STATISTICS
252	,param_statistics
253	#endif
254	,_param->_param_rename_unit [i]
255	,_usage);
256
257	_component->set_component (_component_rename_unit [i]->_component
258	#ifdef POSITION
259	, 50, 50, 10, 10
260	#endif
261	);
262	}
263
264	{
265	name = _name+"_commit_unit";
266	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
267
268	_component_commit_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Commit_unit
269	(name.c_str()
270	#ifdef STATISTICS
271	,param_statistics
272	#endif
273	,_param->_param_commit_unit
274	,_usage);
275
276	_component->set_component (_component_commit_unit->_component
277	#ifdef POSITION
278	, 50, 50, 10, 10
279	#endif
280	);
281	}
282
283	{
284	name = _name+"_issue_queue";
285	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
286
287	_component_issue_queue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue
288	(name.c_str()
289	#ifdef STATISTICS
290	,param_statistics
291	#endif
292	,_param->_param_issue_queue
293	,_usage);
294
295	_component->set_component (_component_issue_queue->_component
296	#ifdef POSITION
297	, 50, 50, 10, 10
298	#endif
299	);
300	}
301
302	{
303	name = _name+"_reexecute_unit";
304	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
305
306	_component_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Reexecute_unit
307	(name.c_str()
308	#ifdef STATISTICS
309	,param_statistics
310	#endif
311	,_param->_param_reexecute_unit
312	,_usage);
313
314	_component->set_component (_component_reexecute_unit->_component
315	#ifdef POSITION
316	, 50, 50, 10, 10
317	#endif
318	);
319	}
320
321	{
322	name = _name+"_special_register_unit";
323	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
324
325	_component_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit
326	(name.c_str()
327	#ifdef STATISTICS
328	,param_statistics
329	#endif
330	,_param->_param_special_register_unit
331	,_usage);
332
333	_component->set_component (_component_special_register_unit->_component
334	#ifdef POSITION
335	, 50, 50, 10, 10
336	#endif
337	);
338	}
339
340	{
341	name = _name+"_glue";
342	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
343
344	_component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::OOO_Engine_Glue
345	(name.c_str()
346	#ifdef STATISTICS
347	,param_statistics
348	#endif
349	,_param->_param_glue
350	,_usage);
351
352	_component->set_component (_component_glue->_component
353	#ifdef POSITION
354	, 50, 50, 10, 10
355	#endif
356	);
357	}
358
359	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
360	std::string src,dest;
361
362	// ===================================================================
363	// =====[ rename_unit ]===============================================
364	// ===================================================================
365	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
366	{
367	src = _name+"_rename_unit_"+toString(i);
368	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
369
370	{
371	dest = _name;
372	#ifdef POSITION
373	_component->interface_map (src ,"",
374	dest,"");
375	#endif
376	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
377	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
378	}
379
380	// ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
381	{
382	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
383	uint32_t x = 0;
384	for (uint32_t j=0; j<_param->_nb_front_end; j++)
385	if (i == *it)
386	{
387	// this front end is link with this rename_unit
388	for (uint32_t k=0; k<_param->_nb_inst_decod [j]; k++)
389	{
390	dest = _name;
391
392	#ifdef POSITION
393	_component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
394	dest,"rename_" +toString(j)+"_"+toString(k));
395	#endif
396
397	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_VAL" ,
398	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_VAL" );
399	PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ACK" ,
400	dest,"out_RENAME_" +toString(j)+"_"+toString(k)+"_ACK" );
401	if (_param->_have_port_context_id)
402	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_CONTEXT_ID" ,
403	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_CONTEXT_ID" );
404	if (_param->_have_port_depth)
405	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_DEPTH" ,
406	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_DEPTH" );
407	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_TYPE" ,
408	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_TYPE" );
409	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_OPERATION" ,
410	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_OPERATION" );
411	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NO_EXECUTE" ,
412	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NO_EXECUTE" );
413	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT",
414	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT");
415	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS_NEXT" ,
416	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_ADDRESS_NEXT" );
417	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_HAS_IMMEDIAT" ,
418	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_HAS_IMMEDIAT" );
419	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IMMEDIAT" ,
420	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IMMEDIAT" );
421	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RA" ,
422	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RA" );
423	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RA" ,
424	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RA" );
425	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RB" ,
426	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RB" );
427	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RB" ,
428	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RB" );
429	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RC" ,
430	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RC" );
431	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RC" ,
432	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RC" );
433	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RD" ,
434	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_WRITE_RD" );
435	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RD" ,
436	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RD" );
437	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RE" ,
438	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_WRITE_RE" );
439	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RE" ,
440	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RE" );
441	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION_USE",
442	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_EXCEPTION_USE");
443	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION" ,
444	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_EXCEPTION" );
445
446	// glue
447	dest = _name+"_glue";
448
449	#ifdef POSITION
450	_component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
451	dest,"rename_" +toString(j)+"_"+toString(k));
452	#endif
453
454	if (_param->_have_port_front_end_id)
455	COMPONENT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+ "_FRONT_END_ID" ,
456	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_RENAME_UNIT_FRONT_END_ID" );
457	}
458
459	x ++;
460	it++;
461	}
462	}
463
464	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
465	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
466	{
467	dest = _name+"_commit_unit";
468
469	#ifdef POSITION
470	_component->interface_map (src ,"insert_"+toString(j),
471	dest,"insert_"+toString(i)+"_"+toString(j));
472	#endif
473
474	if (_param->_have_port_depth)
475	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_DEPTH" ,
476	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_DEPTH" );
477	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_IS_DELAY_SLOT" ,
478	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" );
479	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_ADDRESS_NEXT" ,
480	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
481	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_EXCEPTION_USE" ,
482	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE" );
483	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_EXCEPTION" ,
484	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
485	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RA_LOG",
486	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_LOG");
487	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RB_LOG",
488	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_LOG");
489	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RC_LOG",
490	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_LOG");
491	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RD_LOG",
492	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG");
493	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RE_LOG",
494	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG");
495
496	dest = _name+"_glue";
497
498	#ifdef POSITION
499	_component->interface_map (src ,"insert_"+toString(j),
500	dest,"insert_"+toString(i)+"_"+toString(j));
501	#endif
502
503	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_VAL" ,
504	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_VAL" );
505	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(j)+ "_ACK" ,
506	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_ACK" );
507	if (_param->_have_port_front_end_id)
508	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_FRONT_END_ID" ,
509	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_FRONT_END_ID" );
510	if (_param->_have_port_context_id)
511	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_CONTEXT_ID" ,
512	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_CONTEXT_ID" );
513	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_TYPE" ,
514	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_TYPE" );
515	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_OPERATION" ,
516	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_OPERATION" );
517	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NO_EXECUTE" ,
518	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NO_EXECUTE" );
519	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_HAS_IMMEDIAT" ,
520	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_HAS_IMMEDIAT" );
521	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_IMMEDIAT" ,
522	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_IMMEDIAT" );
523	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
524	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_STORE_QUEUE_PTR_WRITE");
525	if (_param->_have_port_load_queue_ptr)
526	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
527	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE" );
528	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RA" ,
529	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RA" );
530	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RA_PHY" ,
531	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RA_PHY" );
532	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RB" ,
533	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RB" );
534	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RB_PHY" ,
535	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RB_PHY" );
536	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RC" ,
537	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RC" );
538	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RC_PHY" ,
539	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RC_PHY" );
540	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_WRITE_RD" ,
541	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RD" );
542	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RD_PHY_OLD" ,
543	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_OLD" );
544	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RD_PHY_NEW" ,
545	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_NEW" );
546	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_WRITE_RE" ,
547	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RE" );
548	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RE_PHY_OLD" ,
549	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_OLD" );
550	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RE_PHY_NEW" ,
551	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_NEW" );
552	}
553
554	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
555	for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
556	{
557	dest = _name+"_commit_unit";
558
559	#ifdef POSITION
560	_component->interface_map (src ,"retire_"+toString(j),
561	dest,"retire_"+toString(i)+"_"+toString(j));
562	#endif
563
564
565
566	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_VAL" ,
567	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_VAL" );
568	COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(j)+ "_ACK" ,
569	dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_ACK" );
570	if (_param->_have_port_front_end_id)
571	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_FRONT_END_ID" ,
572	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID" );
573	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RD" ,
574	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RD" );
575	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
576	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_OLD");
577	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
578	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_NEW");
579	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RE" ,
580	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RE" );
581	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
582	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_OLD");
583	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
584	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_NEW");
585	if (_param->_have_port_context_id)
586	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_CONTEXT_ID" ,
587	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
588	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_TYPE" ,
589	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_TYPE" );
590	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_OPERATION" ,
591	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_OPERATION" );
592	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_USE_STORE_QUEUE" ,
593	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_STORE_QUEUE" );
594	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_USE_LOAD_QUEUE" ,
595	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_LOAD_QUEUE" );
596	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
597	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE");
598	if (_param->_have_port_load_queue_ptr)
599	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
600	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_LOAD_QUEUE_PTR_WRITE" );
601	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RA" ,
602	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RA" );
603	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RA_PHY" ,
604	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_PHY" );
605	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RB" ,
606	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RB" );
607	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RB_PHY" ,
608	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_PHY" );
609	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RC" ,
610	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RC" );
611	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RC_PHY" ,
612	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_PHY" );
613	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_LOG" ,
614	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG" );
615	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_LOG" ,
616	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG" );
617	}
618
619	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
620	{
621	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
622	uint32_t x = 0;
623	for (uint32_t j=0; j<_param->_nb_front_end; j++)
624	if (i == (*it))
625	{
626	for (uint32_t k=0; k<_param->_nb_context[i]; k++)
627	{
628	dest = _name+"_commit_unit";
629
630	#ifdef POSITION
631	_component->interface_map (src ,"retire_event_"+toString(x)+"_"+toString(k),
632	dest,"retire_event_"+toString(j)+"_"+toString(k));
633	#endif
634	COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_VAL",
635	dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_VAL");
636	COMPONENT_MAP(_component,src ,"out_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_ACK",
637	dest, "in_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_ACK");
638	COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE",
639	dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE");
640	x++;
641	++it;
642	}
643	}
644	}
645
646	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
647	{
648	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
649	uint32_t x = 0;
650	for (uint32_t j=0; j<_param->_nb_front_end; j++)
651	if (i == *it)
652	{
653	for (uint32_t k=0; k<_param->_nb_context[j]; k++)
654	{
655	dest = _name+"_glue";
656
657	#ifdef POSITION
658	_component->interface_map (src ,"spr_read_"+toString(x)+"_"+toString(k),
659	dest,"spr_" +toString(j)+"_"+toString(k));
660	#endif
661
662	COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(x)+"_"+toString(k)+ "_SR",
663	dest,"out_SPR_" +toString(j)+"_"+toString(k)+"_RENAME_UNIT_SR");
664	}
665	x++;
666	++it;
667	}
668	}
669	}
670
671	// ===================================================================
672	// =====[ commit_unit ]===============================================
673	// ===================================================================
674	{
675	src = _name+"_commit_unit";
676	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
677
678	{
679	dest = _name;
680	#ifdef POSITION
681	_component->interface_map (src ,"",
682	dest,"");
683	#endif
684	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
685	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
686	}
687
688	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
689	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
690	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
691	{
692	dest = _name+"_glue";
693	#ifdef POSITION
694	_component->interface_map (src ,"insert_"+toString(i)+"_"+toString(j),
695	dest,"insert_"+toString(i)+"_"+toString(j));
696	#endif
697
698	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_VAL" ,
699	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL" );
700	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_"+toString(j)+ "_ACK" ,
701	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK" );
702	if (_param->_have_port_front_end_id)
703	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
704	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID" );
705	if (_param->_have_port_context_id)
706	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_CONTEXT_ID" ,
707	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_CONTEXT_ID" );
708	// COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_RENAME_UNIT_ID" ,
709	// dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_RENAME_UNIT_ID" );
710	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_TYPE" ,
711	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_TYPE" );
712	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_OPERATION" ,
713	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_OPERATION" );
714	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NO_EXECUTE" ,
715	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NO_EXECUTE" );
716	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
717	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE");
718	if (_param->_have_port_load_queue_ptr)
719	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
720	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE" );
721	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RA" ,
722	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RA" );
723	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA_PHY" ,
724	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RA_PHY" );
725	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RB" ,
726	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RB" );
727	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB_PHY" ,
728	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RB_PHY" );
729	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RC" ,
730	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RC" );
731	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RC_PHY" ,
732	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RC_PHY" );
733	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
734	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD" );
735	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_OLD" ,
736	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD" );
737	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_NEW" ,
738	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW" );
739	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
740	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE" );
741	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_OLD" ,
742	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD" );
743	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_NEW" ,
744	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW" );
745
746	dest = _name+"_issue_queue";
747	#ifdef POSITION
748	_component->interface_map (src ,"insert_" +toString(i)+"_"+toString(j),
749	dest,"issue_in_"+toString(i)+"_"+toString(j));
750	#endif
751
752	if (_param->_have_port_rob_ptr)
753	COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(i)+"_"+toString(j)+"_PACKET_ID",
754	dest, "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+"_PACKET_ID");
755
756	// in_INSERT_DEPTH - component_rename_unit
757	// in_INSERT_ADDRESS_NEXT - component_rename_unit
758	// in_INSERT_EXCEPTION_USE - component_rename_unit
759	// in_INSERT_EXCEPTION - component_rename_unit
760	// in_INSERT_NUM_REG_RA_LOG - component_rename_unit
761	// in_INSERT_NUM_REG_RB_LOG - component_rename_unit
762	// in_INSERT_NUM_REG_RC_LOG - component_rename_unit
763	// in_INSERT_NUM_REG_RD_LOG - component_rename_unit
764	// in_INSERT_NUM_REG_RE_LOG - component_rename_unit
765	// in_INSERT_IS_DELAY_SLOT - component_rename_unit
766	}
767
768	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
769	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
770	for (uint32_t j=0; j<_param->_nb_inst_retire [i]; j++)
771	{
772	// dest = _name+"_glue";
773
774	// #ifdef POSITION
775	// _component->interface_map (src ,"retire_"+toString(i)+"_"+toString(j),
776	// dest,"retire_"+toString(i)+"_"+toString(j));
777	// #endif
778
779	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_VAL" ,
780	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL" );
781	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_"+toString(j)+ "_ACK" ,
782	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK" );
783	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
784	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD" );
785	// if (_param->_have_port_front_end_id)
786	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
787	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID" );
788	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
789	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD");
790	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
791	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW");
792	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
793	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE" );
794	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
795	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD");
796	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
797	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW");
798	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_EVENT_STATE" ,
799	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_EVENT_STATE" );
800
801
802	// out_RETIRE_VAL - component_rename_unit
803	// in_RETIRE_ACK - component_rename_unit
804	// out_RETIRE_WRITE_RD - component_rename_unit
805	// out_RETIRE_FRONT_END_ID - component_rename_unit
806	// out_RETIRE_NUM_REG_RD_PHY_OLD - component_rename_unit
807	// out_RETIRE_NUM_REG_RD_PHY_NEW - component_rename_unit
808	// out_RETIRE_WRITE_RE - component_rename_unit
809	// out_RETIRE_NUM_REG_RE_PHY_OLD - component_rename_unit
810	// out_RETIRE_NUM_REG_RE_PHY_NEW - component_rename_unit
811	// out_RETIRE_EVENT_STATE - component_rename_unit
812
813	// out_RETIRE_CONTEXT_ID - component_rename_unit
814	////out_RETIRE_RENAME_UNIT_ID - component_rename_unit
815	// out_RETIRE_USE_STORE_QUEUE - component_rename_unit
816	// out_RETIRE_USE_LOAD_QUEUE - component_rename_unit
817	// out_RETIRE_STORE_QUEUE_PTR_WRITE - component_rename_unit
818	// out_RETIRE_LOAD_QUEUE_PTR_WRITE - component_rename_unit
819	// out_RETIRE_READ_RA - component_rename_unit
820	// out_RETIRE_NUM_REG_RA_PHY - component_rename_unit
821	// out_RETIRE_READ_RB - component_rename_unit
822	// out_RETIRE_NUM_REG_RB_PHY - component_rename_unit
823	// out_RETIRE_READ_RC - component_rename_unit
824	// out_RETIRE_NUM_REG_RC_PHY - component_rename_unit
825	// out_RETIRE_NUM_REG_RD_LOG - component_rename_unit
826	// out_RETIRE_NUM_REG_RE_LOG - component_rename_unit
827	}
828
829	// ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
830	// out_RETIRE_VAL - rename_unit.out_RETIRE_VAL
831	// in_RETIRE_ACK - rename_unit. in_RETIRE_ACK
832	// out_RETIRE_EVENT_STATE - rename_unit.out_RETIRE_EVENT_STATE
833
834
835	// ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
836	for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
837	{
838	dest = _name+"_reexecute_unit";
839	#ifdef POSITION
840	_component->interface_map (src ,"commit_"+toString(i),
841	dest,"commit_"+toString(i));
842	#endif
843
844	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_VAL" ,
845	dest,"out_COMMIT_"+toString(i)+"_VAL" );
846	COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_ACK" ,
847	dest, "in_COMMIT_"+toString(i)+"_ACK" );
848	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN" ,
849	dest,"out_COMMIT_"+toString(i)+"_WEN" );
850	if (_param->_have_port_rob_ptr)
851	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID" ,
852	dest,"out_COMMIT_"+toString(i)+"_PACKET_ID" );
853	// COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_OPERATION" ,
854	// dest,"out_COMMIT_"+toString(i)+"_OPERATION" );
855	// COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_TYPE" ,
856	// dest,"out_COMMIT_"+toString(i)+"_TYPE" );
857	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FLAGS" ,
858	dest,"out_COMMIT_"+toString(i)+"_FLAGS" );
859	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_EXCEPTION" ,
860	dest,"out_COMMIT_"+toString(i)+"_EXCEPTION" );
861	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_NO_SEQUENCE",
862	dest,"out_COMMIT_"+toString(i)+"_NO_SEQUENCE");
863	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_ADDRESS" ,
864	dest,"out_COMMIT_"+toString(i)+"_ADDRESS" );
865	COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_NUM_REG_RD" ,
866	dest, "in_COMMIT_"+toString(i)+"_NUM_REG_RD" );
867	//@@@@@@@@@@
868	}
869
870	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
871	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
872	{
873	dest = _name+"_reexecute_unit";
874	#ifdef POSITION
875	_component->interface_map (src ,"reexecute_" +toString(i),
876	dest,"reexecute_rob_"+toString(i));
877	#endif
878
879	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_VAL" ,
880	dest, "in_REEXECUTE_ROB_"+toString(i)+"_VAL" );
881	COMPONENT_MAP(_component,src , "in_REEXECUTE_" +toString(i)+"_ACK" ,
882	dest,"out_REEXECUTE_ROB_"+toString(i)+"_ACK" );
883	if (_param->_have_port_front_end_id)
884	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_FRONT_END_ID" ,
885	dest, "in_REEXECUTE_ROB_"+toString(i)+"_FRONT_END_ID" );
886	if (_param->_have_port_context_id)
887	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_CONTEXT_ID" ,
888	dest, "in_REEXECUTE_ROB_"+toString(i)+"_CONTEXT_ID" );
889	if (_param->_have_port_rob_ptr)
890	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_PACKET_ID" ,
891	dest, "in_REEXECUTE_ROB_"+toString(i)+"_PACKET_ID" );
892	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_OPERATION" ,
893	dest, "in_REEXECUTE_ROB_"+toString(i)+"_OPERATION" );
894	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_TYPE" ,
895	dest, "in_REEXECUTE_ROB_"+toString(i)+"_TYPE" );
896	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE",
897	dest, "in_REEXECUTE_ROB_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
898	}
899
900	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
901	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
902	{
903	dest = _name;
904	#ifdef POSITION
905	_component->interface_map (src ,"branch_complete_"+toString(i),
906	dest,"branch_complete_"+toString(i));
907	#endif
908
909	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL" ,
910	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL" );
911	PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_ACK" ,
912	dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ACK" );
913	if (_param->_have_port_front_end_id)
914	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID" ,
915	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID" );
916	if (_param->_have_port_context_id)
917	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID" ,
918	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID" );
919	if (_param->_have_port_depth)
920	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH" ,
921	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH" );
922	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" ,
923	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" );
924	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE" ,
925	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE" );
926	PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION",
927	dest, "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION");
928	}
929
930	// ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
931	{
932	dest = _name;
933	#ifdef POSITION
934	_component->interface_map (src ,"update",
935	dest,"commit_event");
936	#endif
937
938	PORT_MAP(_component,src ,"out_UPDATE_VAL" ,dest,"out_COMMIT_EVENT_VAL" );
939	PORT_MAP(_component,src , "in_UPDATE_ACK" ,dest, "in_COMMIT_EVENT_ACK" );
940	if (_param->_have_port_front_end_id)
941	PORT_MAP(_component,src ,"out_UPDATE_FRONT_END_ID" ,dest,"out_COMMIT_EVENT_FRONT_END_ID" );
942	if (_param->_have_port_context_id)
943	PORT_MAP(_component,src ,"out_UPDATE_CONTEXT_ID" ,dest,"out_COMMIT_EVENT_CONTEXT_ID" );
944	if (_param->_have_port_depth)
945	PORT_MAP(_component,src ,"out_UPDATE_DEPTH" ,dest,"out_COMMIT_EVENT_DEPTH" );
946	PORT_MAP(_component,src ,"out_UPDATE_TYPE" ,dest,"out_COMMIT_EVENT_TYPE" );
947	PORT_MAP(_component,src ,"out_UPDATE_IS_DELAY_SLOT" ,dest,"out_COMMIT_EVENT_IS_DELAY_SLOT" );
948	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS" ,dest,"out_COMMIT_EVENT_ADDRESS" );
949	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EPCR_VAL");
950	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR" ,dest,"out_COMMIT_EVENT_ADDRESS_EPCR" );
951	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL");
952	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR" ,dest,"out_COMMIT_EVENT_ADDRESS_EEAR" );
953	}
954
955	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
956	for (uint32_t i=0; i<_param->_nb_front_end; i++)
957	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
958	{
959	dest = _name;
960	#ifdef POSITION
961	_component->interface_map (src ,"event_"+toString(i)+"_"+toString(j),
962	dest,"event_"+toString(i)+"_"+toString(j));
963	#endif
964
965	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" ,
966	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" );
967	PORT_MAP(_component,src ,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" ,
968	dest,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" );
969	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
970	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
971	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ,
972	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
973	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL",
974	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL");
975	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE" ,
976	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE" );
977	}
978
979	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
980	for (uint32_t i=0; i<_param->_nb_front_end; i++)
981	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
982	{
983	dest = _name;
984	#ifdef POSITION
985	_component->interface_map (src ,"nb_inst_"+toString(i)+"_"+toString(j),
986	dest,"nb_inst_"+toString(i)+"_"+toString(j));
987	#endif
988
989	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL",
990	dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL");
991	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM",
992	dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM");
993	}
994
995	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
996	for (uint32_t i=0; i<_param->_nb_front_end; i++)
997	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
998	{
999	dest = _name;
1000	#ifdef POSITION
1001	_component->interface_map (src ,"depth_"+toString(i)+"_"+toString(j),
1002	dest,"depth_"+toString(i)+"_"+toString(j));
1003	#endif
1004
1005	if (_param->_have_port_depth)
1006	{
1007	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN",
1008	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN");
1009	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX",
1010	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX");
1011	}
1012	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_FULL",
1013	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_FULL");
1014	}
1015
1016	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1017	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1018	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1019	{
1020	dest = _name+"_glue";
1021
1022	#ifdef POSITION
1023	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
1024	dest,"spr_" +toString(i)+"_"+toString(j));
1025	#endif
1026
1027	COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR_OVE",
1028	dest,"out_SPR_" +toString(i)+"_"+toString(j)+"_COMMIT_UNIT_SR_OVE");
1029	}
1030
1031	// ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1032	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1033	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1034	{
1035	dest = _name+"_special_register_unit";
1036	#ifdef POSITION
1037	_component->interface_map (src ,"spr_write_" +toString(i)+"_"+toString(j),
1038	dest,"spr_commit_"+toString(i)+"_"+toString(j));
1039	#endif
1040
1041	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_VAL" ,
1042	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_VAL" );
1043	COMPONENT_MAP(_component,src , "in_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_ACK" ,
1044	dest,"out_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_ACK" );
1045	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F_VAL" ,
1046	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F_VAL" );
1047	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F" ,
1048	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F" );
1049	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY_VAL",
1050	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY_VAL");
1051	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY" ,
1052	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY" );
1053	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV_VAL",
1054	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV_VAL");
1055	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV" ,
1056	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV" );
1057	}
1058	}
1059
1060	// ===================================================================
1061	// =====[ issue_queue ]===============================================
1062	// ===================================================================
1063	{
1064	src = _name+"_issue_queue";
1065	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1066
1067	{
1068	dest = _name;
1069	#ifdef POSITION
1070	_component->interface_map (src ,"",
1071	dest,"");
1072	#endif
1073	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1074	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1075	}
1076
1077	// ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1078	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
1079	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
1080	{
1081	dest = _name+"_glue";
1082	#ifdef POSITION
1083	_component->interface_map (src ,"issue_in_"+toString(i)+"_"+toString(j),
1084	dest,"insert_" +toString(i)+"_"+toString(j));
1085	#endif
1086
1087	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_VAL" ,
1088	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_VAL" );
1089	COMPONENT_MAP(_component,src ,"out_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_ACK" ,
1090	dest, "in_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_ACK" );
1091	if (_param->_have_port_context_id)
1092	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_CONTEXT_ID" ,
1093	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_CONTEXT_ID" );
1094	if (_param->_have_port_front_end_id)
1095	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
1096	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_FRONT_END_ID" );
1097	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_OPERATION" ,
1098	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_OPERATION" );
1099	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_TYPE" ,
1100	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_TYPE" );
1101	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
1102	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE");
1103	if (_param->_have_port_load_queue_ptr)
1104	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
1105	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE" );
1106	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_HAS_IMMEDIAT" ,
1107	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_HAS_IMMEDIAT" );
1108	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_IMMEDIAT" ,
1109	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_IMMEDIAT" );
1110	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RA" ,
1111	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RA" );
1112	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA" ,
1113	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RA" );
1114	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RB" ,
1115	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RB" );
1116	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB" ,
1117	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RB" );
1118	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RC" ,
1119	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RC" );
1120	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RC" ,
1121	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RC" );
1122	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
1123	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RD" );
1124	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD" ,
1125	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RD" );
1126	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
1127	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RE" );
1128	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE" ,
1129	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RE" );
1130
1131
1132
1133	// in_ISSUE_IN_PACKET_ID - component_commit_unit
1134	}
1135
1136	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1137	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
1138	{
1139	dest = _name+"_reexecute_unit";
1140	#ifdef POSITION
1141	_component->interface_map (src ,"reexecute_"+toString(i),
1142	dest,"reexecute_"+toString(i));
1143	#endif
1144
1145
1146	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_VAL" ,
1147	dest,"out_REEXECUTE_"+toString(i)+"_VAL" );
1148	COMPONENT_MAP(_component,src ,"out_REEXECUTE_"+toString(i)+"_ACK" ,
1149	dest, "in_REEXECUTE_"+toString(i)+"_ACK" );
1150	if (_param->_have_port_front_end_id)
1151	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_FRONT_END_ID" ,
1152	dest,"out_REEXECUTE_"+toString(i)+"_FRONT_END_ID" );
1153	if (_param->_have_port_context_id)
1154	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_CONTEXT_ID" ,
1155	dest,"out_REEXECUTE_"+toString(i)+"_CONTEXT_ID" );
1156	if (_param->_have_port_rob_ptr)
1157	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_PACKET_ID" ,
1158	dest,"out_REEXECUTE_"+toString(i)+"_PACKET_ID" );
1159	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_TYPE" ,
1160	dest,"out_REEXECUTE_"+toString(i)+"_TYPE" );
1161	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_OPERATION" ,
1162	dest,"out_REEXECUTE_"+toString(i)+"_OPERATION" );
1163	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1164	dest,"out_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
1165	if (_param->_have_port_load_queue_ptr)
1166	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1167	dest,"out_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
1168	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT" ,
1169	dest,"out_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT" );
1170	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_IMMEDIAT" ,
1171	dest,"out_REEXECUTE_"+toString(i)+"_IMMEDIAT" );
1172	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RA" ,
1173	dest,"out_REEXECUTE_"+toString(i)+"_READ_RA" );
1174	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RA" ,
1175	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RA" );
1176	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RB" ,
1177	dest,"out_REEXECUTE_"+toString(i)+"_READ_RB" );
1178	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RB" ,
1179	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RB" );
1180	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RC" ,
1181	dest,"out_REEXECUTE_"+toString(i)+"_READ_RC" );
1182	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RC" ,
1183	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RC" );
1184	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RD" ,
1185	dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RD" );
1186	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RD" ,
1187	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RD" );
1188	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RE" ,
1189	dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RE" );
1190	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RE" ,
1191	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RE" );
1192	}
1193
1194	// ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1195	for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
1196	{
1197	dest = _name;
1198
1199	#ifdef POSITION
1200	_component->interface_map (src ,"issue_out_"+toString(i),
1201	dest,"issue_" +toString(i));
1202	#endif
1203
1204	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_VAL" ,
1205	dest,"out_ISSUE_" +toString(i)+"_VAL" );
1206	PORT_MAP(_component,src , "in_ISSUE_OUT_"+toString(i)+"_ACK" ,
1207	dest, "in_ISSUE_" +toString(i)+"_ACK" );
1208	if (_param->_have_port_front_end_id)
1209	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_FRONT_END_ID" ,
1210	dest,"out_ISSUE_" +toString(i)+"_FRONT_END_ID" );
1211	if (_param->_have_port_context_id)
1212	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_CONTEXT_ID" ,
1213	dest,"out_ISSUE_" +toString(i)+"_CONTEXT_ID" );
1214	if (_param->_have_port_rob_ptr)
1215	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_PACKET_ID" ,
1216	dest,"out_ISSUE_" +toString(i)+"_PACKET_ID" );
1217	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_TYPE" ,
1218	dest,"out_ISSUE_" +toString(i)+"_TYPE" );
1219	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_OPERATION" ,
1220	dest,"out_ISSUE_" +toString(i)+"_OPERATION" );
1221	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1222	dest,"out_ISSUE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE");
1223	if (_param->_have_port_load_queue_ptr)
1224	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1225	dest,"out_ISSUE_" +toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
1226	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_HAS_IMMEDIAT" ,
1227	dest,"out_ISSUE_" +toString(i)+"_HAS_IMMEDIAT" );
1228	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_IMMEDIAT" ,
1229	dest,"out_ISSUE_" +toString(i)+"_IMMEDIAT" );
1230	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RA" ,
1231	dest,"out_ISSUE_" +toString(i)+"_READ_RA" );
1232	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RA" ,
1233	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RA" );
1234	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RB" ,
1235	dest,"out_ISSUE_" +toString(i)+"_READ_RB" );
1236	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RB" ,
1237	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RB" );
1238	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RC" ,
1239	dest,"out_ISSUE_" +toString(i)+"_READ_RC" );
1240	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RC" ,
1241	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RC" );
1242	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RD" ,
1243	dest,"out_ISSUE_" +toString(i)+"_WRITE_RD" );
1244	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RD" ,
1245	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RD" );
1246	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RE" ,
1247	dest,"out_ISSUE_" +toString(i)+"_WRITE_RE" );
1248	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RE" ,
1249	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RE" );
1250	}
1251	}
1252
1253	// ===================================================================
1254	// =====[ reexecute_unit ]============================================
1255	// ===================================================================
1256	{
1257	src = _name+"_reexecute_unit";
1258	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1259
1260	{
1261	dest = _name;
1262	#ifdef POSITION
1263	_component->interface_map (src ,"",
1264	dest,"");
1265	#endif
1266	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1267	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1268	}
1269
1270	// ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1271	for (uint32_t i=0; i<_param->_nb_execute_loop; i++)
1272	for (uint32_t j=0; j<_param->_nb_inst_execute[i]; j++)
1273	{
1274	dest = _name;
1275	#ifdef POSITION
1276	_component->interface_map (src ,"execute_loop_"+toString(i)+"_"+toString(j),
1277	dest,"execute_loop_"+toString(i)+"_"+toString(j));
1278	#endif
1279
1280	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL" ,
1281	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL" );
1282	PORT_MAP(_component,src ,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK" ,
1283	dest,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK" );
1284	if (_param->_have_port_front_end_id)
1285	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
1286	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
1287	if (_param->_have_port_context_id)
1288	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ,
1289	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
1290	if (_param->_have_port_rob_ptr)
1291	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID" ,
1292	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID" );
1293	// PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ,
1294	// dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" );
1295	// PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" ,
1296	// dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" );
1297	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ,
1298	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" );
1299	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION" ,
1300	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
1301	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" ,
1302	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" );
1303	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
1304	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
1305	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA" ,
1306	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA" );
1307	}
1308
1309	// ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1310	// out_COMMIT_VAL - component_commit_unit
1311	// in_COMMIT_ACK - component_commit_unit
1312	// out_COMMIT_WEN - component_commit_unit
1313	// out_COMMIT_FRONT_END_ID - component_commit_unit
1314	// out_COMMIT_CONTEXT_ID - component_commit_unit
1315	// out_COMMIT_PACKET_ID - component_commit_unit
1316	////out_COMMIT_OPERATION - component_commit_unit
1317	////out_COMMIT_TYPE - component_commit_unit
1318	// out_COMMIT_FLAGS - component_commit_unit
1319	// out_COMMIT_EXCEPTION - component_commit_unit
1320	// out_COMMIT_NO_SEQUENCE - component_commit_unit
1321	// out_COMMIT_ADDRESS - component_commit_unit
1322	// in_COMMIT_NUM_REG_RD - component_commit_unit
1323
1324	// ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1325	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
1326	{
1327	dest = _name+"_special_register_unit";
1328	#ifdef POSITION
1329	_component->interface_map (src ,"spr_"+toString(i),
1330	dest,"spr_"+toString(i));
1331	#endif
1332
1333	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_VAL" ,
1334	dest, "in_SPR_ACCESS_"+toString(i)+"_VAL" );
1335	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_ACK" ,
1336	dest,"out_SPR_ACCESS_"+toString(i)+"_ACK" );
1337	if (_param->_have_port_front_end_id)
1338	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_FRONT_END_ID",
1339	dest, "in_SPR_ACCESS_"+toString(i)+"_FRONT_END_ID");
1340	if (_param->_have_port_context_id)
1341	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_CONTEXT_ID" ,
1342	dest, "in_SPR_ACCESS_"+toString(i)+"_CONTEXT_ID" );
1343	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_WEN" ,
1344	dest, "in_SPR_ACCESS_"+toString(i)+"_WEN" );
1345	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_NUM_GROUP" ,
1346	dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_GROUP" );
1347	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_NUM_REG" ,
1348	dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_REG" );
1349	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_WDATA" ,
1350	dest, "in_SPR_ACCESS_"+toString(i)+"_WDATA" );
1351	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_RDATA" ,
1352	dest,"out_SPR_ACCESS_"+toString(i)+"_RDATA" );
1353	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_INVALID" ,
1354	dest,"out_SPR_ACCESS_"+toString(i)+"_INVALID" );
1355	}
1356
1357	// ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1358	// in_REEXECUTE_ROB_VAL - component_commit_unit
1359	// out_REEXECUTE_ROB_ACK - component_commit_unit
1360	// in_REEXECUTE_ROB_FRONT_END_ID - component_commit_unit
1361	// in_REEXECUTE_ROB_CONTEXT_ID - component_commit_unit
1362	// in_REEXECUTE_ROB_PACKET_ID - component_commit_unit
1363	// in_REEXECUTE_ROB_OPERATION - component_commit_unit
1364	// in_REEXECUTE_ROB_TYPE - component_commit_unit
1365	// in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE - component_commit_unit
1366
1367	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1368	// out_REEXECUTE_VAL - component_issue_queue
1369	// in_REEXECUTE_ACK - component_issue_queue
1370	// out_REEXECUTE_CONTEXT_ID - component_issue_queue
1371	// out_REEXECUTE_FRONT_END_ID - component_issue_queue
1372	// out_REEXECUTE_PACKET_ID - component_issue_queue
1373	// out_REEXECUTE_OPERATION - component_issue_queue
1374	// out_REEXECUTE_TYPE - component_issue_queue
1375	// out_REEXECUTE_STORE_QUEUE_PTR_WRITE - component_issue_queue
1376	// out_REEXECUTE_LOAD_QUEUE_PTR_WRITE - component_issue_queue
1377	// out_REEXECUTE_HAS_IMMEDIAT - component_issue_queue
1378	// out_REEXECUTE_IMMEDIAT - component_issue_queue
1379	// out_REEXECUTE_READ_RA - component_issue_queue
1380	// out_REEXECUTE_NUM_REG_RA - component_issue_queue
1381	// out_REEXECUTE_READ_RB - component_issue_queue
1382	// out_REEXECUTE_NUM_REG_RB - component_issue_queue
1383	// out_REEXECUTE_READ_RC - component_issue_queue
1384	// out_REEXECUTE_NUM_REG_RC - component_issue_queue
1385	// out_REEXECUTE_WRITE_RD - component_issue_queue
1386	// out_REEXECUTE_NUM_REG_RD - component_issue_queue
1387	// out_REEXECUTE_WRITE_RE - component_issue_queue
1388	// out_REEXECUTE_NUM_REG_RE - component_issue_queue
1389	}
1390
1391	// ===================================================================
1392	// =====[ special_register_unit ]=====================================
1393	// ===================================================================
1394	{
1395	src = _name+"_special_register_unit";
1396	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1397
1398	{
1399	dest = _name;
1400	#ifdef POSITION
1401	_component->interface_map (src ,"",
1402	dest,"");
1403	#endif
1404	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1405	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1406	}
1407
1408	// ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1409	// in_SPR_ACCESS_VAL - component_reexecute_unit
1410	// out_SPR_ACCESS_ACK - component_reexecute_unit
1411	// in_SPR_ACCESS_FRONT_END_ID - component_reexecute_unit
1412	// in_SPR_ACCESS_CONTEXT_ID - component_reexecute_unit
1413	// in_SPR_ACCESS_WEN - component_reexecute_unit
1414	// in_SPR_ACCESS_NUM_GROUP - component_reexecute_unit
1415	// in_SPR_ACCESS_NUM_REG - component_reexecute_unit
1416	// in_SPR_ACCESS_WDATA - component_reexecute_unit
1417	// out_SPR_ACCESS_RDATA - component_reexecute_unit
1418	// out_SPR_ACCESS_INVALID - component_reexecute_unit
1419
1420	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1421	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1422	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1423	{
1424	dest = _name+"_glue";
1425
1426	#ifdef POSITION
1427	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
1428	dest,"spr_" +toString(i)+"_"+toString(j));
1429	#endif
1430
1431	COMPONENT_MAP(_component,src ,"out_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR",
1432	dest, "in_SPR_" +toString(i)+"_"+toString(j)+"_SPECIAL_REGISTER_UNIT_SR");
1433	}
1434
1435	// ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1436	// in_SPR_COMMIT_VAL - component_commit_unit
1437	// out_SPR_COMMIT_ACK - component_commit_unit
1438	// in_SPR_COMMIT_SR_F_VAL - component_commit_unit
1439	// in_SPR_COMMIT_SR_F - component_commit_unit
1440	// in_SPR_COMMIT_SR_CY_VAL - component_commit_unit
1441	// in_SPR_COMMIT_SR_CY - component_commit_unit
1442	// in_SPR_COMMIT_SR_OV_VAL - component_commit_unit
1443	// in_SPR_COMMIT_SR_OV - component_commit_unit
1444
1445	// ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1446	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1447	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1448	{
1449	dest = _name;
1450	#ifdef POSITION
1451	_component->interface_map (src ,"spr_event_"+toString(i)+"_"+toString(j),
1452	dest,"spr_event_"+toString(i)+"_"+toString(j));
1453	#endif
1454
1455	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" ,
1456	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" );
1457	PORT_MAP(_component,src ,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" ,
1458	dest,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" );
1459	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR" ,
1460	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR" );
1461	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" ,
1462	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" );
1463	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR" ,
1464	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR" );
1465	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX" ,
1466	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX" );
1467	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR",
1468	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR");
1469	}
1470	}
1471
1472	// ===================================================================
1473	// =====[ glue ]======================================================
1474	// ===================================================================
1475	{
1476	src = _name+"_glue";
1477	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1478
1479	{
1480	dest = _name;
1481	#ifdef POSITION
1482	_component->interface_map (src ,"",
1483	dest,"");
1484	#endif
1485	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1486	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1487	}
1488
1489	// ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1490	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1491	for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++)
1492	{
1493	dest = _name;
1494	#ifdef POSITION
1495	_component->interface_map (src ,"rename_"+toString(i)+"_"+toString(j),
1496	dest,"rename_"+toString(i)+"_"+toString(j));
1497	#endif
1498
1499	if (_param->_have_port_front_end_id)
1500	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
1501	dest, "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
1502
1503	// out_RENAME_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1504	}
1505
1506	// ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1507	for (uint32_t i=0; i<_param->_sum_inst_insert; i++)
1508	{
1509	dest = _name;
1510	#ifdef POSITION
1511	_component->interface_map (src ,"insert_"+toString(i),
1512	dest,"insert_"+toString(i));
1513	#endif
1514
1515	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" ,
1516	dest,"out_INSERT_"+toString(i)+"_VAL" );
1517	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" ,
1518	dest, "in_INSERT_"+toString(i)+"_ACK" );
1519	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" ,
1520	dest,"out_INSERT_"+toString(i)+"_RD_USE" );
1521	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG",
1522	dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG");
1523	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" ,
1524	dest,"out_INSERT_"+toString(i)+"_RE_USE" );
1525	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG",
1526	dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG");
1527	}
1528
1529	// in_INSERT_RENAME_UNIT_VAL - component_rename_unit
1530	// out_INSERT_RENAME_UNIT_ACK - component_rename_unit
1531	// in_INSERT_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1532	// in_INSERT_RENAME_UNIT_CONTEXT_ID - component_rename_unit
1533	// in_INSERT_RENAME_UNIT_TYPE - component_rename_unit
1534	// in_INSERT_RENAME_UNIT_OPERATION - component_rename_unit
1535	// in_INSERT_RENAME_UNIT_NO_EXECUTE - component_rename_unit
1536	// in_INSERT_RENAME_UNIT_HAS_IMMEDIAT - component_rename_unit
1537	// in_INSERT_RENAME_UNIT_IMMEDIAT - component_rename_unit
1538	// in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE - component_rename_unit
1539	// in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE - component_rename_unit
1540	// in_INSERT_RENAME_UNIT_READ_RA - component_rename_unit
1541	// in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY - component_rename_unit
1542	// in_INSERT_RENAME_UNIT_READ_RB - component_rename_unit
1543	// in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY - component_rename_unit
1544	// in_INSERT_RENAME_UNIT_READ_RC - component_rename_unit
1545	// in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY - component_rename_unit
1546	// in_INSERT_RENAME_UNIT_WRITE_RD - component_rename_unit
1547	// in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD - component_rename_unit
1548	// in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW - component_rename_unit
1549	// in_INSERT_RENAME_UNIT_WRITE_RE - component_rename_unit
1550	// in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD - component_rename_unit
1551	// in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW - component_rename_unit
1552	//
1553	// out_INSERT_COMMIT_UNIT_VAL - component_commit_unit
1554	// in_INSERT_COMMIT_UNIT_ACK - component_commit_unit
1555	// out_INSERT_COMMIT_UNIT_FRONT_END_ID - component_commit_unit
1556	// out_INSERT_COMMIT_UNIT_CONTEXT_ID - component_commit_unit
1557	////out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID - component_commit_unit
1558	// out_INSERT_COMMIT_UNIT_TYPE - component_commit_unit
1559	// out_INSERT_COMMIT_UNIT_OPERATION - component_commit_unit
1560	// out_INSERT_COMMIT_UNIT_NO_EXECUTE - component_commit_unit
1561	// out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE - component_commit_unit
1562	// out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE - component_commit_unit
1563	// out_INSERT_COMMIT_UNIT_READ_RA - component_commit_unit
1564	// out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY - component_commit_unit
1565	// out_INSERT_COMMIT_UNIT_READ_RB - component_commit_unit
1566	// out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY - component_commit_unit
1567	// out_INSERT_COMMIT_UNIT_READ_RC - component_commit_unit
1568	// out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY - component_commit_unit
1569	// out_INSERT_COMMIT_UNIT_WRITE_RD - component_commit_unit
1570	// out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD - component_commit_unit
1571	// out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW - component_commit_unit
1572	// out_INSERT_COMMIT_UNIT_WRITE_RE - component_commit_unit
1573	// out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD - component_commit_unit
1574	// out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW - component_commit_unit
1575	//
1576	// out_INSERT_ISSUE_QUEUE_VAL - component_issue_queue
1577	// in_INSERT_ISSUE_QUEUE_ACK - component_issue_queue
1578	// out_INSERT_ISSUE_QUEUE_CONTEXT_ID - component_issue_queue
1579	// out_INSERT_ISSUE_QUEUE_FRONT_END_ID - component_issue_queue
1580	// out_INSERT_ISSUE_QUEUE_OPERATION - component_issue_queue
1581	// out_INSERT_ISSUE_QUEUE_TYPE - component_issue_queue
1582	// out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE - component_issue_queue
1583	// out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE - component_issue_queue
1584	// out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT - component_issue_queue
1585	// out_INSERT_ISSUE_QUEUE_IMMEDIAT - component_issue_queue
1586	// out_INSERT_ISSUE_QUEUE_READ_RA - component_issue_queue
1587	// out_INSERT_ISSUE_QUEUE_NUM_REG_RA - component_issue_queue
1588	// out_INSERT_ISSUE_QUEUE_READ_RB - component_issue_queue
1589	// out_INSERT_ISSUE_QUEUE_NUM_REG_RB - component_issue_queue
1590	// out_INSERT_ISSUE_QUEUE_READ_RC - component_issue_queue
1591	// out_INSERT_ISSUE_QUEUE_NUM_REG_RC - component_issue_queue
1592	// out_INSERT_ISSUE_QUEUE_WRITE_RD - component_issue_queue
1593	// out_INSERT_ISSUE_QUEUE_NUM_REG_RD - component_issue_queue
1594	// out_INSERT_ISSUE_QUEUE_WRITE_RE - component_issue_queue
1595	// out_INSERT_ISSUE_QUEUE_NUM_REG_RE - component_issue_queue
1596
1597	// // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1598	// for (uint32_t i=0; i<_param->_sum_inst_retire; i++)
1599	// {
1600	// dest = _name;
1601	// #ifdef POSITION
1602	// _component->interface_map (src ,"retire_"+toString(i),
1603	// dest,"retire_"+toString(i));
1604	// #endif
1605
1606	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_VAL" ,
1607	// dest,"out_RETIRE_"+toString(i)+"_VAL" );
1608	// PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_ACK" ,
1609	// dest, "in_RETIRE_"+toString(i)+"_ACK" );
1610	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_USE" ,
1611	// dest,"out_RETIRE_"+toString(i)+"_RD_OLD_USE" );
1612	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG",
1613	// dest,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG");
1614	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_USE" ,
1615	// dest,"out_RETIRE_"+toString(i)+"_RD_NEW_USE" );
1616	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG",
1617	// dest,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG");
1618	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_USE" ,
1619	// dest,"out_RETIRE_"+toString(i)+"_RE_OLD_USE" );
1620	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG",
1621	// dest,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG");
1622	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_USE" ,
1623	// dest,"out_RETIRE_"+toString(i)+"_RE_NEW_USE" );
1624	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG",
1625	// dest,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG");
1626	// }
1627
1628	// out_RETIRE_RENAME_UNIT_VAL - component_rename_unit
1629	// in_RETIRE_RENAME_UNIT_ACK - component_rename_unit
1630	// out_RETIRE_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1631	// out_RETIRE_RENAME_UNIT_WRITE_RD - component_rename_unit
1632	// out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD - component_rename_unit
1633	// out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW - component_rename_unit
1634	// out_RETIRE_RENAME_UNIT_WRITE_RE - component_rename_unit
1635	// out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD - component_rename_unit
1636	// out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW - component_rename_unit
1637	// out_RETIRE_RENAME_UNIT_EVENT_STATE - component_rename_unit
1638
1639	// in_RETIRE_COMMIT_UNIT_VAL - component_commit_unit
1640	// out_RETIRE_COMMIT_UNIT_ACK - component_commit_unit
1641	// in_RETIRE_COMMIT_UNIT_FRONT_END_ID - component_commit_unit
1642	// in_RETIRE_COMMIT_UNIT_WRITE_RD - component_commit_unit
1643	// in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD - component_commit_unit
1644	// in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW - component_commit_unit
1645	// in_RETIRE_COMMIT_UNIT_WRITE_RE - component_commit_unit
1646	// in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD - component_commit_unit
1647	// in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW - component_commit_unit
1648	// in_RETIRE_COMMIT_UNIT_EVENT_STATE - component_commit_unit
1649
1650	// ~~~~~[ Interface : "spr_sr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1651	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1652	for (uint32_t j=0; j<_param->_nb_context [i]; j++)
1653	{
1654	dest = _name;
1655	#ifdef POSITION
1656	_component->interface_map (src ,"spr_"+toString(i)+"_"+toString(j),
1657	dest,"spr_"+toString(i)+"_"+toString(j));
1658	#endif
1659
1660	PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE",
1661	dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE");
1662	PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH",
1663	dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH");
1664
1665	// out_SPR_RENAME_UNIT_SR - component_rename_unit
1666	// out_SPR_COMMIT_UNIT_SR_OVE - component_commit_unit
1667	// in_SPR_SPECIAL_REGISTER_UNIT_SR - component_special_register_unit
1668	}
1669
1670
1671	}
1672
1673	// ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1674	#if DEBUG_OOO_Engine == true
1675	_component->test_map();
1676	#endif
1677
1678	#ifdef POSITION
1679	if (usage_is_set(_usage,USE_POSITION))
1680	_component->generate_file();
1681	#endif
1682
1683	log_end(OOO_Engine,FUNCTION);
1684	};
1685
1686	}; // end namespace ooo_engine
1687	}; // end namespace multi_ooo_engine
1688	}; // end namespace core
1689
1690	}; // end namespace behavioural
1691	}; // end namespace morpheo

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