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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp @ 109

Last change on this file since 109 was 109, checked in by rosiere, 15 years ago
1) Configuration : instance configuration file : regroup similar instance 2) Configuration : timing default = 0 3) Debug/Commit_unit : Add watch dog timer 4) Issue_queue : Test parameters : add test if type is optionnal 5) Cor_glue : Fix insert index 6) Free_list : remove bank_by_pop (else deadlock) 7) Update Free List : add register to source event
Property svn:keywords set to `Id`
File size: 118.1 KB

Line
1	/*
2	* $Id: OOO_Engine_allocation.cpp 109 2009-02-16 20:28:31Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_ooo_engine {
15	namespace ooo_engine {
16
17	#undef FUNCTION
18	#define FUNCTION "OOO_Engine::allocation"
19	void OOO_Engine::allocation
20	(
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * param_statistics
23	#else
24	void
25	#endif
26	)
27	{
28	log_begin(OOO_Engine,FUNCTION);
29
30	_component = new Component (_usage);
31
32	Entity * entity = _component->set_entity (_name
33	,"OOO_Engine"
34	#ifdef POSITION
35	,COMBINATORY
36	#endif
37	);
38
39	_interfaces = entity->set_interfaces();
40
41	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
42	{
43	Interface * interface = _interfaces->set_interface(""
44	#ifdef POSITION
45	,IN
46	,SOUTH,
47	"Generalist interface"
48	#endif
49	);
50
51	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
52	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
53	}
54
55	// ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
56	{
57	ALLOC2_INTERFACE("rename",IN,WEST,_("Instruction from front_end."),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
58
59	_ALLOC2_VALACK_IN ( in_RENAME_VAL , VAL ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
60	_ALLOC2_VALACK_OUT(out_RENAME_ACK , ACK ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
61	_ALLOC2_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
62	_ALLOC2_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
63	_ALLOC2_SIGNAL_IN ( in_RENAME_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
64	_ALLOC2_SIGNAL_IN ( in_RENAME_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
65	_ALLOC2_SIGNAL_IN ( in_RENAME_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
66	_ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
67	_ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
68	#ifdef DEBUG
69	_ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
70	#endif
71	_ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
72	_ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
73	_ALLOC2_SIGNAL_IN ( in_RENAME_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
74	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RA ,"READ_RA" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
75	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RA ,"NUM_REG_RA" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
76	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RB ,"READ_RB" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
77	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RB ,"NUM_REG_RB" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
78	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RC ,"READ_RC" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
79	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RC ,"NUM_REG_RC" ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
80	_ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
81	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
82	_ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
83	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
84	_ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION_USE ,"EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
85	_ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
86	}
87
88	// ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
89	{
90	ALLOC1_INTERFACE("issue",OUT,EAST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
91
92	ALLOC1_VALACK_OUT (out_ISSUE_VAL , VAL );
93	ALLOC1_VALACK_IN ( in_ISSUE_ACK , ACK );
94	ALLOC1_SIGNAL_OUT (out_ISSUE_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
95	ALLOC1_SIGNAL_OUT (out_ISSUE_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
96	ALLOC1_SIGNAL_OUT (out_ISSUE_PACKET_ID ,"PACKET_ID" ,Tpacket_t ,_param->_size_rob_ptr );
97	ALLOC1_SIGNAL_OUT (out_ISSUE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type );
98	ALLOC1_SIGNAL_OUT (out_ISSUE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation );
99	ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr );
100	ALLOC1_SIGNAL_OUT (out_ISSUE_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr );
101	ALLOC1_SIGNAL_OUT (out_ISSUE_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 );
102	ALLOC1_SIGNAL_OUT (out_ISSUE_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data );
103	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RA ,"READ_RA" ,Tcontrol_t ,1 );
104	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RA ,"NUM_REG_RA" ,Tgeneral_address_t,_param->_size_general_register );
105	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RB ,"READ_RB" ,Tcontrol_t ,1 );
106	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RB ,"NUM_REG_RB" ,Tgeneral_address_t,_param->_size_general_register );
107	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RC ,"READ_RC" ,Tcontrol_t ,1 );
108	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RC ,"NUM_REG_RC" ,Tspecial_address_t,_param->_size_special_register );
109	ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1 );
110	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register );
111	ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1 );
112	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register );
113	}
114
115	// ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
116	{
117	ALLOC2_INTERFACE("execute_loop",IN,EAST,_("Instruction executed, from execute_loop."),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
118
119	_ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL , VAL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
120	_ALLOC2_VALACK_OUT(out_EXECUTE_LOOP_ACK , ACK ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
121	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
122	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
123	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_PACKET_ID ,"PACKET_ID" ,Tpacket_t ,_param->_size_rob_ptr ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
124	// _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
125	// _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
126	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
127	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
128	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
129	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
130	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA ,"DATA" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
131	}
132
133	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
134	{
135	ALLOC1_INTERFACE("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);
136
137	ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL);
138	ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK);
139	ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 );
140	ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
141	ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 );
142	ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
143	}
144
145	// // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
146	// {
147	// ALLOC1_INTERFACE("retire",OUT,EAST,_("Interface with RegisterFile's stat-list (retire Re-Order-Buffer)."),_param->_sum_inst_retire);
148
149	// ALLOC1_VALACK_OUT (out_RETIRE_VAL , VAL);
150	// ALLOC1_VALACK_IN ( in_RETIRE_ACK , ACK);
151	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_USE ,"RD_OLD_USE" ,Tcontrol_t ,1 );
152	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_NUM_REG ,"RD_OLD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
153	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_USE ,"RD_NEW_USE" ,Tcontrol_t ,1 );
154	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_NUM_REG ,"RD_NEW_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
155	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_USE ,"RE_OLD_USE" ,Tcontrol_t ,1 );
156	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_NUM_REG ,"RE_OLD_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
157	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE ,"RE_NEW_USE" ,Tcontrol_t ,1 );
158	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG ,"RE_NEW_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
159	// }
160
161	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
162	{
163	ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_branch_complete);
164
165	ALLOC1_VALACK_OUT (out_BRANCH_COMPLETE_VAL , VAL);
166	ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_ACK , ACK);
167	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
168	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
169	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth );
170	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address );
171	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 );
172	ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION ,"MISS_PREDICTION" ,Tcontrol_t ,1 );
173	}
174
175	// ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
176	{
177	ALLOC_INTERFACE("commit_event",OUT,WEST,_("Commit an event (exception)."));
178
179	ALLOC_VALACK_OUT (out_COMMIT_EVENT_VAL , VAL);
180	ALLOC_VALACK_IN ( in_COMMIT_EVENT_ACK , ACK);
181	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
182	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
183	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth );
184	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_TYPE ,"TYPE" ,Tevent_type_t ,_param->_size_event_type );
185	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 );
186	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address );
187	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EPCR_VAL ,"ADDRESS_EPCR_VAL" ,Tcontrol_t ,1 );
188	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EPCR ,"ADDRESS_EPCR" ,Taddress_t ,_param->_size_instruction_address );
189	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR_VAL ,"ADDRESS_EEAR_VAL" ,Tcontrol_t ,1 );
190	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR ,"ADDRESS_EEAR" ,Tgeneral_data_t ,_param->_size_general_data );
191	}
192
193	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
194	{
195	ALLOC2_INTERFACE("event",IN,WEST,_("Event from context_state."),_param->_nb_front_end,_param->_nb_context[it1]);
196
197	_ALLOC2_VALACK_IN ( in_EVENT_VAL , VAL ,_param->_nb_front_end,_param->_nb_context[it1]);
198	_ALLOC2_VALACK_OUT(out_EVENT_ACK , ACK ,_param->_nb_front_end,_param->_nb_context[it1]);
199	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_context[it1]);
200	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_context[it1]);
201	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"ADDRESS_NEXT_VAL" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
202	_ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE ,"IS_DS_TAKE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
203	}
204
205	// ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
206	{
207	ALLOC2_INTERFACE("spr_event",IN,WEST,_("Exception : save spr and set a lot of special register."),_param->_nb_front_end,_param->_nb_context[it1]);
208
209	_ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL , VAL ,_param->_nb_front_end,_param->_nb_context[it1]);
210	_ALLOC2_VALACK_OUT(out_SPR_EVENT_ACK , ACK ,_param->_nb_front_end,_param->_nb_context[it1]);
211	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EPCR ,"EPCR" ,Tspr_t ,_param->_size_spr ,_param->_nb_front_end,_param->_nb_context[it1]);
212	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR_WEN ,"EEAR_WEN" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
213	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR ,"EEAR" ,Tspr_t ,_param->_size_spr ,_param->_nb_front_end,_param->_nb_context[it1]);
214	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX ,"SR_DSX" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
215	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR ,"SR_TO_ESR" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
216	}
217
218	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
219	{
220	ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Internal number instruction."),_param->_nb_front_end,_param->_nb_context[it1]);
221
222	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL ,"COMMIT_ALL" ,Tcounter_t ,_param->_size_nb_inst_commit ,_param->_nb_front_end,_param->_nb_context[it1]);
223	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM ,"COMMIT_MEM" ,Tcounter_t ,_param->_size_nb_inst_commit ,_param->_nb_front_end,_param->_nb_context[it1]);
224	_ALLOC2_SIGNAL_IN ( in_NB_INST_DECOD_ALL ,"DECOD_ALL" ,Tcounter_t ,_param->_size_nb_inst_decod ,_param->_nb_front_end,_param->_nb_context[it1]);
225	}
226
227	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
228	{
229	ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
230
231	_ALLOC2_SIGNAL_IN ( in_DEPTH_MIN ,"MIN" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end, _param->_nb_context[it1]);
232	_ALLOC2_SIGNAL_IN ( in_DEPTH_MAX ,"MAX" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end, _param->_nb_context[it1]);
233	_ALLOC2_SIGNAL_IN ( in_DEPTH_FULL ,"FULL" ,Tcontrol_t ,1 ,_param->_nb_front_end, _param->_nb_context[it1]);
234	}
235
236	// ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
237	{
238	ALLOC2_INTERFACE("spr",OUT,WEST,_("SPR"),_param->_nb_front_end,_param->_nb_context[it1]);
239
240	_ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE ,"SR_IEE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
241	_ALLOC2_SIGNAL_OUT(out_SPR_SR_EPH ,"SR_EPH" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
242	}
243
244	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
245	std::string name;
246
247	_component_rename_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit * [_param->_nb_rename_unit];
248	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
249	{
250	name = _name+"_rename_unit_"+toString(i);
251	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
252
253	_component_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit
254	(name.c_str()
255	#ifdef STATISTICS
256	,param_statistics
257	#endif
258	,_param->_param_rename_unit [i]
259	,_usage);
260
261	_component->set_component (_component_rename_unit [i]->_component
262	#ifdef POSITION
263	, 50, 50, 10, 10
264	#endif
265	);
266	}
267
268	{
269	name = _name+"_commit_unit";
270	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
271
272	_component_commit_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Commit_unit
273	(name.c_str()
274	#ifdef STATISTICS
275	,param_statistics
276	#endif
277	,_param->_param_commit_unit
278	,_usage);
279
280	_component->set_component (_component_commit_unit->_component
281	#ifdef POSITION
282	, 50, 50, 10, 10
283	#endif
284	);
285	}
286
287	{
288	name = _name+"_issue_queue";
289	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
290
291	_component_issue_queue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue
292	(name.c_str()
293	#ifdef STATISTICS
294	,param_statistics
295	#endif
296	,_param->_param_issue_queue
297	,_usage);
298
299	_component->set_component (_component_issue_queue->_component
300	#ifdef POSITION
301	, 50, 50, 10, 10
302	#endif
303	);
304	}
305
306	{
307	name = _name+"_reexecute_unit";
308	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
309
310	_component_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Reexecute_unit
311	(name.c_str()
312	#ifdef STATISTICS
313	,param_statistics
314	#endif
315	,_param->_param_reexecute_unit
316	,_usage);
317
318	_component->set_component (_component_reexecute_unit->_component
319	#ifdef POSITION
320	, 50, 50, 10, 10
321	#endif
322	);
323	}
324
325	{
326	name = _name+"_special_register_unit";
327	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
328
329	_component_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit
330	(name.c_str()
331	#ifdef STATISTICS
332	,param_statistics
333	#endif
334	,_param->_param_special_register_unit
335	,_usage);
336
337	_component->set_component (_component_special_register_unit->_component
338	#ifdef POSITION
339	, 50, 50, 10, 10
340	#endif
341	);
342	}
343
344	{
345	name = _name+"_glue";
346	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
347
348	_component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::OOO_Engine_Glue
349	(name.c_str()
350	#ifdef STATISTICS
351	,param_statistics
352	#endif
353	,_param->_param_glue
354	,_usage);
355
356	_component->set_component (_component_glue->_component
357	#ifdef POSITION
358	, 50, 50, 10, 10
359	#endif
360	);
361	}
362
363	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
364	std::string src,dest;
365
366	// ===================================================================
367	// =====[ rename_unit ]===============================================
368	// ===================================================================
369	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
370	{
371	src = _name+"_rename_unit_"+toString(i);
372	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
373
374	{
375	dest = _name;
376	#ifdef POSITION
377	_component->interface_map (src ,"",
378	dest,"");
379	#endif
380	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
381	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
382	}
383
384	// ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
385	{
386	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
387	uint32_t x = 0;
388	for (uint32_t j=0; j<_param->_nb_front_end; j++)
389	if (i == *it)
390	{
391	// this front end is link with this rename_unit
392	for (uint32_t k=0; k<_param->_nb_inst_decod [j]; k++)
393	{
394	dest = _name;
395
396	#ifdef POSITION
397	_component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
398	dest,"rename_" +toString(j)+"_"+toString(k));
399	#endif
400
401	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_VAL" ,
402	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_VAL" );
403	PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ACK" ,
404	dest,"out_RENAME_" +toString(j)+"_"+toString(k)+"_ACK" );
405	if (_param->_have_port_context_id)
406	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_CONTEXT_ID" ,
407	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_CONTEXT_ID" );
408	if (_param->_have_port_depth)
409	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_DEPTH" ,
410	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_DEPTH" );
411	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_TYPE" ,
412	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_TYPE" );
413	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_OPERATION" ,
414	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_OPERATION" );
415	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NO_EXECUTE" ,
416	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NO_EXECUTE" );
417	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT",
418	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT");
419	#ifdef DEBUG
420	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS" ,
421	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_ADDRESS" );
422	#endif
423	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS_NEXT" ,
424	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_ADDRESS_NEXT" );
425	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_HAS_IMMEDIAT" ,
426	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_HAS_IMMEDIAT" );
427	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IMMEDIAT" ,
428	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IMMEDIAT" );
429	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RA" ,
430	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RA" );
431	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RA" ,
432	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RA" );
433	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RB" ,
434	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RB" );
435	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RB" ,
436	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RB" );
437	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RC" ,
438	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RC" );
439	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RC" ,
440	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RC" );
441	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RD" ,
442	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_WRITE_RD" );
443	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RD" ,
444	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RD" );
445	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RE" ,
446	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_WRITE_RE" );
447	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RE" ,
448	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RE" );
449	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION_USE",
450	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_EXCEPTION_USE");
451	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION" ,
452	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_EXCEPTION" );
453
454	// glue
455	dest = _name+"_glue";
456
457	#ifdef POSITION
458	_component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
459	dest,"rename_" +toString(j)+"_"+toString(k));
460	#endif
461
462	if (_param->_have_port_front_end_id)
463	COMPONENT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+ "_FRONT_END_ID" ,
464	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_RENAME_UNIT_FRONT_END_ID" );
465	}
466
467	x ++;
468	it++;
469	}
470	}
471
472	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
473	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
474	{
475	dest = _name+"_commit_unit";
476
477	#ifdef POSITION
478	_component->interface_map (src ,"insert_"+toString(j),
479	dest,"insert_"+toString(i)+"_"+toString(j));
480	#endif
481
482	if (_param->_have_port_depth)
483	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_DEPTH" ,
484	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_DEPTH" );
485	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_IS_DELAY_SLOT" ,
486	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" );
487	#ifdef DEBUG
488	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_ADDRESS" ,
489	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
490	#endif
491	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_ADDRESS_NEXT" ,
492	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
493	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_EXCEPTION_USE" ,
494	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE" );
495	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_EXCEPTION" ,
496	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
497	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RA_LOG",
498	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_LOG");
499	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RB_LOG",
500	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_LOG");
501	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RC_LOG",
502	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_LOG");
503	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RD_LOG",
504	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG");
505	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RE_LOG",
506	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG");
507
508	dest = _name+"_glue";
509
510	#ifdef POSITION
511	_component->interface_map (src ,"insert_"+toString(j),
512	dest,"insert_"+toString(i)+"_"+toString(j));
513	#endif
514
515	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_VAL" ,
516	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_VAL" );
517	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(j)+ "_ACK" ,
518	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_ACK" );
519	if (_param->_have_port_front_end_id)
520	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_FRONT_END_ID" ,
521	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_FRONT_END_ID" );
522	if (_param->_have_port_context_id)
523	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_CONTEXT_ID" ,
524	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_CONTEXT_ID" );
525	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_TYPE" ,
526	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_TYPE" );
527	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_OPERATION" ,
528	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_OPERATION" );
529	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NO_EXECUTE" ,
530	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NO_EXECUTE" );
531	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_HAS_IMMEDIAT" ,
532	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_HAS_IMMEDIAT" );
533	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_IMMEDIAT" ,
534	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_IMMEDIAT" );
535	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
536	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_STORE_QUEUE_PTR_WRITE");
537	if (_param->_have_port_load_queue_ptr)
538	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
539	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE" );
540	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RA" ,
541	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RA" );
542	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RA_PHY" ,
543	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RA_PHY" );
544	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RB" ,
545	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RB" );
546	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RB_PHY" ,
547	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RB_PHY" );
548	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RC" ,
549	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RC" );
550	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RC_PHY" ,
551	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RC_PHY" );
552	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_WRITE_RD" ,
553	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RD" );
554	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RD_PHY_OLD" ,
555	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_OLD" );
556	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RD_PHY_NEW" ,
557	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_NEW" );
558	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_WRITE_RE" ,
559	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RE" );
560	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RE_PHY_OLD" ,
561	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_OLD" );
562	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RE_PHY_NEW" ,
563	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_NEW" );
564	}
565
566	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
567	for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
568	{
569	dest = _name+"_commit_unit";
570
571	#ifdef POSITION
572	_component->interface_map (src ,"retire_"+toString(j),
573	dest,"retire_"+toString(i)+"_"+toString(j));
574	#endif
575
576
577
578	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_VAL" ,
579	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_VAL" );
580	COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(j)+ "_ACK" ,
581	dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_ACK" );
582	if (_param->_have_port_front_end_id)
583	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_FRONT_END_ID" ,
584	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID" );
585	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RD" ,
586	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RD" );
587	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
588	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_OLD");
589	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
590	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_NEW");
591	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RE" ,
592	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RE" );
593	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
594	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_OLD");
595	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
596	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_NEW");
597	if (_param->_have_port_context_id)
598	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_CONTEXT_ID" ,
599	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
600	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_TYPE" ,
601	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_TYPE" );
602	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_OPERATION" ,
603	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_OPERATION" );
604	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_USE_STORE_QUEUE" ,
605	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_STORE_QUEUE" );
606	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_USE_LOAD_QUEUE" ,
607	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_LOAD_QUEUE" );
608	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
609	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE");
610	if (_param->_have_port_load_queue_ptr)
611	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
612	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_LOAD_QUEUE_PTR_WRITE" );
613	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RA" ,
614	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RA" );
615	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RA_PHY" ,
616	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_PHY" );
617	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RB" ,
618	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RB" );
619	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RB_PHY" ,
620	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_PHY" );
621	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RC" ,
622	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RC" );
623	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RC_PHY" ,
624	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_PHY" );
625	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_LOG" ,
626	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG" );
627	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_LOG" ,
628	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG" );
629	}
630
631	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
632	{
633	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
634	uint32_t x = 0;
635	for (uint32_t j=0; j<_param->_nb_front_end; j++)
636	if (i == (*it))
637	{
638	for (uint32_t k=0; k<_param->_nb_context[i]; k++)
639	{
640	dest = _name+"_commit_unit";
641
642	#ifdef POSITION
643	_component->interface_map (src ,"retire_event_"+toString(x)+"_"+toString(k),
644	dest,"retire_event_"+toString(j)+"_"+toString(k));
645	#endif
646	COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_VAL",
647	dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_VAL");
648	COMPONENT_MAP(_component,src ,"out_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_ACK",
649	dest, "in_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_ACK");
650	COMPONENT_MAP(_component,src , "in_RETIRE_EVENT_"+toString(x)+"_"+toString(k)+"_STATE",
651	dest,"out_RETIRE_EVENT_"+toString(j)+"_"+toString(k)+"_STATE");
652	x++;
653	++it;
654	}
655	}
656	}
657
658	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
659	{
660	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
661	uint32_t x = 0;
662	for (uint32_t j=0; j<_param->_nb_front_end; j++)
663	if (i == *it)
664	{
665	for (uint32_t k=0; k<_param->_nb_context[j]; k++)
666	{
667	dest = _name+"_glue";
668
669	#ifdef POSITION
670	_component->interface_map (src ,"spr_read_"+toString(x)+"_"+toString(k),
671	dest,"spr_" +toString(j)+"_"+toString(k));
672	#endif
673
674	COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(x)+"_"+toString(k)+ "_SR",
675	dest,"out_SPR_" +toString(j)+"_"+toString(k)+"_RENAME_UNIT_SR");
676	}
677	x++;
678	++it;
679	}
680	}
681	}
682
683	// ===================================================================
684	// =====[ commit_unit ]===============================================
685	// ===================================================================
686	{
687	src = _name+"_commit_unit";
688	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
689
690	{
691	dest = _name;
692	#ifdef POSITION
693	_component->interface_map (src ,"",
694	dest,"");
695	#endif
696	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
697	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
698	}
699
700	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
701	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
702	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
703	{
704	dest = _name+"_glue";
705	#ifdef POSITION
706	_component->interface_map (src ,"insert_"+toString(i)+"_"+toString(j),
707	dest,"insert_"+toString(i)+"_"+toString(j));
708	#endif
709
710	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_VAL" ,
711	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL" );
712	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_"+toString(j)+ "_ACK" ,
713	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK" );
714	if (_param->_have_port_front_end_id)
715	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
716	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID" );
717	if (_param->_have_port_context_id)
718	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_CONTEXT_ID" ,
719	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_CONTEXT_ID" );
720	// COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_RENAME_UNIT_ID" ,
721	// dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_RENAME_UNIT_ID" );
722	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_TYPE" ,
723	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_TYPE" );
724	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_OPERATION" ,
725	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_OPERATION" );
726	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NO_EXECUTE" ,
727	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NO_EXECUTE" );
728	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
729	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE");
730	if (_param->_have_port_load_queue_ptr)
731	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
732	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE" );
733	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RA" ,
734	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RA" );
735	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA_PHY" ,
736	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RA_PHY" );
737	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RB" ,
738	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RB" );
739	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB_PHY" ,
740	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RB_PHY" );
741	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RC" ,
742	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RC" );
743	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RC_PHY" ,
744	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RC_PHY" );
745	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
746	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD" );
747	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_OLD" ,
748	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD" );
749	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_NEW" ,
750	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW" );
751	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
752	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE" );
753	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_OLD" ,
754	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD" );
755	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_NEW" ,
756	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW" );
757
758	dest = _name+"_issue_queue";
759	#ifdef POSITION
760	_component->interface_map (src ,"insert_" +toString(i)+"_"+toString(j),
761	dest,"issue_in_"+toString(i)+"_"+toString(j));
762	#endif
763
764	if (_param->_have_port_rob_ptr)
765	COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(i)+"_"+toString(j)+"_PACKET_ID",
766	dest, "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+"_PACKET_ID");
767
768	// in_INSERT_DEPTH - component_rename_unit
769	// in_INSERT_ADDRESS - component_rename_unit
770	// in_INSERT_ADDRESS_NEXT - component_rename_unit
771	// in_INSERT_EXCEPTION_USE - component_rename_unit
772	// in_INSERT_EXCEPTION - component_rename_unit
773	// in_INSERT_NUM_REG_RA_LOG - component_rename_unit
774	// in_INSERT_NUM_REG_RB_LOG - component_rename_unit
775	// in_INSERT_NUM_REG_RC_LOG - component_rename_unit
776	// in_INSERT_NUM_REG_RD_LOG - component_rename_unit
777	// in_INSERT_NUM_REG_RE_LOG - component_rename_unit
778	// in_INSERT_IS_DELAY_SLOT - component_rename_unit
779	}
780
781	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
782	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
783	for (uint32_t j=0; j<_param->_nb_inst_retire [i]; j++)
784	{
785	// dest = _name+"_glue";
786
787	// #ifdef POSITION
788	// _component->interface_map (src ,"retire_"+toString(i)+"_"+toString(j),
789	// dest,"retire_"+toString(i)+"_"+toString(j));
790	// #endif
791
792	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_VAL" ,
793	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL" );
794	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_"+toString(j)+ "_ACK" ,
795	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK" );
796	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
797	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD" );
798	// if (_param->_have_port_front_end_id)
799	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
800	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID" );
801	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
802	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD");
803	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
804	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW");
805	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
806	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE" );
807	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
808	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD");
809	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
810	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW");
811	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_EVENT_STATE" ,
812	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_EVENT_STATE" );
813
814
815	// out_RETIRE_VAL - component_rename_unit
816	// in_RETIRE_ACK - component_rename_unit
817	// out_RETIRE_WRITE_RD - component_rename_unit
818	// out_RETIRE_FRONT_END_ID - component_rename_unit
819	// out_RETIRE_NUM_REG_RD_PHY_OLD - component_rename_unit
820	// out_RETIRE_NUM_REG_RD_PHY_NEW - component_rename_unit
821	// out_RETIRE_WRITE_RE - component_rename_unit
822	// out_RETIRE_NUM_REG_RE_PHY_OLD - component_rename_unit
823	// out_RETIRE_NUM_REG_RE_PHY_NEW - component_rename_unit
824	// out_RETIRE_EVENT_STATE - component_rename_unit
825
826	// out_RETIRE_CONTEXT_ID - component_rename_unit
827	////out_RETIRE_RENAME_UNIT_ID - component_rename_unit
828	// out_RETIRE_USE_STORE_QUEUE - component_rename_unit
829	// out_RETIRE_USE_LOAD_QUEUE - component_rename_unit
830	// out_RETIRE_STORE_QUEUE_PTR_WRITE - component_rename_unit
831	// out_RETIRE_LOAD_QUEUE_PTR_WRITE - component_rename_unit
832	// out_RETIRE_READ_RA - component_rename_unit
833	// out_RETIRE_NUM_REG_RA_PHY - component_rename_unit
834	// out_RETIRE_READ_RB - component_rename_unit
835	// out_RETIRE_NUM_REG_RB_PHY - component_rename_unit
836	// out_RETIRE_READ_RC - component_rename_unit
837	// out_RETIRE_NUM_REG_RC_PHY - component_rename_unit
838	// out_RETIRE_NUM_REG_RD_LOG - component_rename_unit
839	// out_RETIRE_NUM_REG_RE_LOG - component_rename_unit
840	}
841
842	// ~~~~~[ Interface "retire_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
843	// out_RETIRE_VAL - rename_unit.out_RETIRE_VAL
844	// in_RETIRE_ACK - rename_unit. in_RETIRE_ACK
845	// out_RETIRE_EVENT_STATE - rename_unit.out_RETIRE_EVENT_STATE
846
847
848	// ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
849	for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
850	{
851	dest = _name+"_reexecute_unit";
852	#ifdef POSITION
853	_component->interface_map (src ,"commit_"+toString(i),
854	dest,"commit_"+toString(i));
855	#endif
856
857	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_VAL" ,
858	dest,"out_COMMIT_"+toString(i)+"_VAL" );
859	COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_ACK" ,
860	dest, "in_COMMIT_"+toString(i)+"_ACK" );
861	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN" ,
862	dest,"out_COMMIT_"+toString(i)+"_WEN" );
863	if (_param->_have_port_rob_ptr)
864	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID" ,
865	dest,"out_COMMIT_"+toString(i)+"_PACKET_ID" );
866	// COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_OPERATION" ,
867	// dest,"out_COMMIT_"+toString(i)+"_OPERATION" );
868	// COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_TYPE" ,
869	// dest,"out_COMMIT_"+toString(i)+"_TYPE" );
870	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FLAGS" ,
871	dest,"out_COMMIT_"+toString(i)+"_FLAGS" );
872	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_EXCEPTION" ,
873	dest,"out_COMMIT_"+toString(i)+"_EXCEPTION" );
874	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_NO_SEQUENCE",
875	dest,"out_COMMIT_"+toString(i)+"_NO_SEQUENCE");
876	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_ADDRESS" ,
877	dest,"out_COMMIT_"+toString(i)+"_ADDRESS" );
878	COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_NUM_REG_RD" ,
879	dest, "in_COMMIT_"+toString(i)+"_NUM_REG_RD" );
880	//@@@@@@@@@@
881	}
882
883	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
884	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
885	{
886	dest = _name+"_reexecute_unit";
887	#ifdef POSITION
888	_component->interface_map (src ,"reexecute_" +toString(i),
889	dest,"reexecute_rob_"+toString(i));
890	#endif
891
892	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_VAL" ,
893	dest, "in_REEXECUTE_ROB_"+toString(i)+"_VAL" );
894	COMPONENT_MAP(_component,src , "in_REEXECUTE_" +toString(i)+"_ACK" ,
895	dest,"out_REEXECUTE_ROB_"+toString(i)+"_ACK" );
896	if (_param->_have_port_front_end_id)
897	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_FRONT_END_ID" ,
898	dest, "in_REEXECUTE_ROB_"+toString(i)+"_FRONT_END_ID" );
899	if (_param->_have_port_context_id)
900	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_CONTEXT_ID" ,
901	dest, "in_REEXECUTE_ROB_"+toString(i)+"_CONTEXT_ID" );
902	if (_param->_have_port_rob_ptr)
903	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_PACKET_ID" ,
904	dest, "in_REEXECUTE_ROB_"+toString(i)+"_PACKET_ID" );
905	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_OPERATION" ,
906	dest, "in_REEXECUTE_ROB_"+toString(i)+"_OPERATION" );
907	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_TYPE" ,
908	dest, "in_REEXECUTE_ROB_"+toString(i)+"_TYPE" );
909	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE",
910	dest, "in_REEXECUTE_ROB_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
911	}
912
913	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
914	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
915	{
916	dest = _name;
917	#ifdef POSITION
918	_component->interface_map (src ,"branch_complete_"+toString(i),
919	dest,"branch_complete_"+toString(i));
920	#endif
921
922	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL" ,
923	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL" );
924	PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_ACK" ,
925	dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ACK" );
926	if (_param->_have_port_front_end_id)
927	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID" ,
928	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID" );
929	if (_param->_have_port_context_id)
930	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID" ,
931	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID" );
932	if (_param->_have_port_depth)
933	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH" ,
934	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH" );
935	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" ,
936	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" );
937	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE" ,
938	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE" );
939	PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION",
940	dest, "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION");
941	}
942
943	// ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
944	{
945	dest = _name;
946	#ifdef POSITION
947	_component->interface_map (src ,"update",
948	dest,"commit_event");
949	#endif
950
951	PORT_MAP(_component,src ,"out_UPDATE_VAL" ,dest,"out_COMMIT_EVENT_VAL" );
952	PORT_MAP(_component,src , "in_UPDATE_ACK" ,dest, "in_COMMIT_EVENT_ACK" );
953	if (_param->_have_port_front_end_id)
954	PORT_MAP(_component,src ,"out_UPDATE_FRONT_END_ID" ,dest,"out_COMMIT_EVENT_FRONT_END_ID" );
955	if (_param->_have_port_context_id)
956	PORT_MAP(_component,src ,"out_UPDATE_CONTEXT_ID" ,dest,"out_COMMIT_EVENT_CONTEXT_ID" );
957	if (_param->_have_port_depth)
958	PORT_MAP(_component,src ,"out_UPDATE_DEPTH" ,dest,"out_COMMIT_EVENT_DEPTH" );
959	PORT_MAP(_component,src ,"out_UPDATE_TYPE" ,dest,"out_COMMIT_EVENT_TYPE" );
960	PORT_MAP(_component,src ,"out_UPDATE_IS_DELAY_SLOT" ,dest,"out_COMMIT_EVENT_IS_DELAY_SLOT" );
961	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS" ,dest,"out_COMMIT_EVENT_ADDRESS" );
962	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EPCR_VAL");
963	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR" ,dest,"out_COMMIT_EVENT_ADDRESS_EPCR" );
964	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL");
965	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR" ,dest,"out_COMMIT_EVENT_ADDRESS_EEAR" );
966	}
967
968	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
969	for (uint32_t i=0; i<_param->_nb_front_end; i++)
970	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
971	{
972	dest = _name;
973	#ifdef POSITION
974	_component->interface_map (src ,"event_"+toString(i)+"_"+toString(j),
975	dest,"event_"+toString(i)+"_"+toString(j));
976	#endif
977
978	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" ,
979	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" );
980	PORT_MAP(_component,src ,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" ,
981	dest,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" );
982	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
983	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
984	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ,
985	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
986	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL",
987	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL");
988	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE" ,
989	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE" );
990	}
991
992	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
993	for (uint32_t i=0; i<_param->_nb_front_end; i++)
994	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
995	{
996	dest = _name;
997	#ifdef POSITION
998	_component->interface_map (src ,"nb_inst_"+toString(i)+"_"+toString(j),
999	dest,"nb_inst_"+toString(i)+"_"+toString(j));
1000	#endif
1001
1002	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL",
1003	dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL");
1004	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM",
1005	dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM");
1006	PORT_MAP(_component,src , "in_NB_INST_"+toString(i)+"_"+toString(j)+"_DECOD_ALL" ,
1007	dest, "in_NB_INST_"+toString(i)+"_"+toString(j)+"_DECOD_ALL" );
1008	}
1009
1010	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1011	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1012	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1013	{
1014	dest = _name;
1015	#ifdef POSITION
1016	_component->interface_map (src ,"depth_"+toString(i)+"_"+toString(j),
1017	dest,"depth_"+toString(i)+"_"+toString(j));
1018	#endif
1019
1020	if (_param->_have_port_depth)
1021	{
1022	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN",
1023	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN");
1024	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX",
1025	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX");
1026	}
1027	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_FULL",
1028	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_FULL");
1029	}
1030
1031	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1032	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1033	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1034	{
1035	dest = _name+"_glue";
1036
1037	#ifdef POSITION
1038	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
1039	dest,"spr_" +toString(i)+"_"+toString(j));
1040	#endif
1041
1042	COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR_OVE",
1043	dest,"out_SPR_" +toString(i)+"_"+toString(j)+"_COMMIT_UNIT_SR_OVE");
1044	}
1045
1046	// ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1047	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1048	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1049	{
1050	dest = _name+"_special_register_unit";
1051	#ifdef POSITION
1052	_component->interface_map (src ,"spr_write_" +toString(i)+"_"+toString(j),
1053	dest,"spr_commit_"+toString(i)+"_"+toString(j));
1054	#endif
1055
1056	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_VAL" ,
1057	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_VAL" );
1058	COMPONENT_MAP(_component,src , "in_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_ACK" ,
1059	dest,"out_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_ACK" );
1060	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F_VAL" ,
1061	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F_VAL" );
1062	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F" ,
1063	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F" );
1064	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY_VAL",
1065	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY_VAL");
1066	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY" ,
1067	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY" );
1068	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV_VAL",
1069	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV_VAL");
1070	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV" ,
1071	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV" );
1072	}
1073	}
1074
1075	// ===================================================================
1076	// =====[ issue_queue ]===============================================
1077	// ===================================================================
1078	{
1079	src = _name+"_issue_queue";
1080	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1081
1082	{
1083	dest = _name;
1084	#ifdef POSITION
1085	_component->interface_map (src ,"",
1086	dest,"");
1087	#endif
1088	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1089	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1090	}
1091
1092	// ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1093	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
1094	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
1095	{
1096	dest = _name+"_glue";
1097	#ifdef POSITION
1098	_component->interface_map (src ,"issue_in_"+toString(i)+"_"+toString(j),
1099	dest,"insert_" +toString(i)+"_"+toString(j));
1100	#endif
1101
1102	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_VAL" ,
1103	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_VAL" );
1104	COMPONENT_MAP(_component,src ,"out_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_ACK" ,
1105	dest, "in_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_ACK" );
1106	if (_param->_have_port_context_id)
1107	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_CONTEXT_ID" ,
1108	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_CONTEXT_ID" );
1109	if (_param->_have_port_front_end_id)
1110	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
1111	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_FRONT_END_ID" );
1112	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_OPERATION" ,
1113	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_OPERATION" );
1114	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_TYPE" ,
1115	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_TYPE" );
1116	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
1117	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE");
1118	if (_param->_have_port_load_queue_ptr)
1119	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
1120	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE" );
1121	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_HAS_IMMEDIAT" ,
1122	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_HAS_IMMEDIAT" );
1123	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_IMMEDIAT" ,
1124	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_IMMEDIAT" );
1125	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RA" ,
1126	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RA" );
1127	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA" ,
1128	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RA" );
1129	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RB" ,
1130	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RB" );
1131	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB" ,
1132	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RB" );
1133	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RC" ,
1134	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RC" );
1135	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RC" ,
1136	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RC" );
1137	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
1138	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RD" );
1139	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD" ,
1140	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RD" );
1141	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
1142	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RE" );
1143	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE" ,
1144	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RE" );
1145
1146
1147
1148	// in_ISSUE_IN_PACKET_ID - component_commit_unit
1149	}
1150
1151	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1152	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
1153	{
1154	dest = _name+"_reexecute_unit";
1155	#ifdef POSITION
1156	_component->interface_map (src ,"reexecute_"+toString(i),
1157	dest,"reexecute_"+toString(i));
1158	#endif
1159
1160
1161	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_VAL" ,
1162	dest,"out_REEXECUTE_"+toString(i)+"_VAL" );
1163	COMPONENT_MAP(_component,src ,"out_REEXECUTE_"+toString(i)+"_ACK" ,
1164	dest, "in_REEXECUTE_"+toString(i)+"_ACK" );
1165	if (_param->_have_port_front_end_id)
1166	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_FRONT_END_ID" ,
1167	dest,"out_REEXECUTE_"+toString(i)+"_FRONT_END_ID" );
1168	if (_param->_have_port_context_id)
1169	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_CONTEXT_ID" ,
1170	dest,"out_REEXECUTE_"+toString(i)+"_CONTEXT_ID" );
1171	if (_param->_have_port_rob_ptr)
1172	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_PACKET_ID" ,
1173	dest,"out_REEXECUTE_"+toString(i)+"_PACKET_ID" );
1174	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_TYPE" ,
1175	dest,"out_REEXECUTE_"+toString(i)+"_TYPE" );
1176	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_OPERATION" ,
1177	dest,"out_REEXECUTE_"+toString(i)+"_OPERATION" );
1178	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1179	dest,"out_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
1180	if (_param->_have_port_load_queue_ptr)
1181	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1182	dest,"out_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
1183	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT" ,
1184	dest,"out_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT" );
1185	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_IMMEDIAT" ,
1186	dest,"out_REEXECUTE_"+toString(i)+"_IMMEDIAT" );
1187	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RA" ,
1188	dest,"out_REEXECUTE_"+toString(i)+"_READ_RA" );
1189	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RA" ,
1190	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RA" );
1191	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RB" ,
1192	dest,"out_REEXECUTE_"+toString(i)+"_READ_RB" );
1193	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RB" ,
1194	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RB" );
1195	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RC" ,
1196	dest,"out_REEXECUTE_"+toString(i)+"_READ_RC" );
1197	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RC" ,
1198	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RC" );
1199	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RD" ,
1200	dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RD" );
1201	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RD" ,
1202	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RD" );
1203	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RE" ,
1204	dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RE" );
1205	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RE" ,
1206	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RE" );
1207	}
1208
1209	// ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1210	for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
1211	{
1212	dest = _name;
1213
1214	#ifdef POSITION
1215	_component->interface_map (src ,"issue_out_"+toString(i),
1216	dest,"issue_" +toString(i));
1217	#endif
1218
1219	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_VAL" ,
1220	dest,"out_ISSUE_" +toString(i)+"_VAL" );
1221	PORT_MAP(_component,src , "in_ISSUE_OUT_"+toString(i)+"_ACK" ,
1222	dest, "in_ISSUE_" +toString(i)+"_ACK" );
1223	if (_param->_have_port_front_end_id)
1224	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_FRONT_END_ID" ,
1225	dest,"out_ISSUE_" +toString(i)+"_FRONT_END_ID" );
1226	if (_param->_have_port_context_id)
1227	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_CONTEXT_ID" ,
1228	dest,"out_ISSUE_" +toString(i)+"_CONTEXT_ID" );
1229	if (_param->_have_port_rob_ptr)
1230	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_PACKET_ID" ,
1231	dest,"out_ISSUE_" +toString(i)+"_PACKET_ID" );
1232	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_TYPE" ,
1233	dest,"out_ISSUE_" +toString(i)+"_TYPE" );
1234	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_OPERATION" ,
1235	dest,"out_ISSUE_" +toString(i)+"_OPERATION" );
1236	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1237	dest,"out_ISSUE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE");
1238	if (_param->_have_port_load_queue_ptr)
1239	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1240	dest,"out_ISSUE_" +toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
1241	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_HAS_IMMEDIAT" ,
1242	dest,"out_ISSUE_" +toString(i)+"_HAS_IMMEDIAT" );
1243	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_IMMEDIAT" ,
1244	dest,"out_ISSUE_" +toString(i)+"_IMMEDIAT" );
1245	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RA" ,
1246	dest,"out_ISSUE_" +toString(i)+"_READ_RA" );
1247	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RA" ,
1248	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RA" );
1249	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RB" ,
1250	dest,"out_ISSUE_" +toString(i)+"_READ_RB" );
1251	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RB" ,
1252	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RB" );
1253	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RC" ,
1254	dest,"out_ISSUE_" +toString(i)+"_READ_RC" );
1255	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RC" ,
1256	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RC" );
1257	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RD" ,
1258	dest,"out_ISSUE_" +toString(i)+"_WRITE_RD" );
1259	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RD" ,
1260	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RD" );
1261	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RE" ,
1262	dest,"out_ISSUE_" +toString(i)+"_WRITE_RE" );
1263	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RE" ,
1264	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RE" );
1265	}
1266	}
1267
1268	// ===================================================================
1269	// =====[ reexecute_unit ]============================================
1270	// ===================================================================
1271	{
1272	src = _name+"_reexecute_unit";
1273	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1274
1275	{
1276	dest = _name;
1277	#ifdef POSITION
1278	_component->interface_map (src ,"",
1279	dest,"");
1280	#endif
1281	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1282	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1283	}
1284
1285	// ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1286	for (uint32_t i=0; i<_param->_nb_execute_loop; i++)
1287	for (uint32_t j=0; j<_param->_nb_inst_execute[i]; j++)
1288	{
1289	dest = _name;
1290	#ifdef POSITION
1291	_component->interface_map (src ,"execute_loop_"+toString(i)+"_"+toString(j),
1292	dest,"execute_loop_"+toString(i)+"_"+toString(j));
1293	#endif
1294
1295	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL" ,
1296	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL" );
1297	PORT_MAP(_component,src ,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK" ,
1298	dest,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK" );
1299	if (_param->_have_port_front_end_id)
1300	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
1301	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
1302	if (_param->_have_port_context_id)
1303	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ,
1304	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
1305	if (_param->_have_port_rob_ptr)
1306	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID" ,
1307	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID" );
1308	// PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ,
1309	// dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" );
1310	// PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" ,
1311	// dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" );
1312	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ,
1313	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" );
1314	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION" ,
1315	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
1316	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" ,
1317	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" );
1318	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
1319	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
1320	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA" ,
1321	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA" );
1322	}
1323
1324	// ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1325	// out_COMMIT_VAL - component_commit_unit
1326	// in_COMMIT_ACK - component_commit_unit
1327	// out_COMMIT_WEN - component_commit_unit
1328	// out_COMMIT_FRONT_END_ID - component_commit_unit
1329	// out_COMMIT_CONTEXT_ID - component_commit_unit
1330	// out_COMMIT_PACKET_ID - component_commit_unit
1331	////out_COMMIT_OPERATION - component_commit_unit
1332	////out_COMMIT_TYPE - component_commit_unit
1333	// out_COMMIT_FLAGS - component_commit_unit
1334	// out_COMMIT_EXCEPTION - component_commit_unit
1335	// out_COMMIT_NO_SEQUENCE - component_commit_unit
1336	// out_COMMIT_ADDRESS - component_commit_unit
1337	// in_COMMIT_NUM_REG_RD - component_commit_unit
1338
1339	// ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1340	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
1341	{
1342	dest = _name+"_special_register_unit";
1343	#ifdef POSITION
1344	_component->interface_map (src ,"spr_"+toString(i),
1345	dest,"spr_"+toString(i));
1346	#endif
1347
1348	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_VAL" ,
1349	dest, "in_SPR_ACCESS_"+toString(i)+"_VAL" );
1350	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_ACK" ,
1351	dest,"out_SPR_ACCESS_"+toString(i)+"_ACK" );
1352	if (_param->_have_port_front_end_id)
1353	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_FRONT_END_ID",
1354	dest, "in_SPR_ACCESS_"+toString(i)+"_FRONT_END_ID");
1355	if (_param->_have_port_context_id)
1356	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_CONTEXT_ID" ,
1357	dest, "in_SPR_ACCESS_"+toString(i)+"_CONTEXT_ID" );
1358	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_WEN" ,
1359	dest, "in_SPR_ACCESS_"+toString(i)+"_WEN" );
1360	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_NUM_GROUP" ,
1361	dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_GROUP" );
1362	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_NUM_REG" ,
1363	dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_REG" );
1364	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_WDATA" ,
1365	dest, "in_SPR_ACCESS_"+toString(i)+"_WDATA" );
1366	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_RDATA" ,
1367	dest,"out_SPR_ACCESS_"+toString(i)+"_RDATA" );
1368	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_INVALID" ,
1369	dest,"out_SPR_ACCESS_"+toString(i)+"_INVALID" );
1370	}
1371
1372	// ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1373	// in_REEXECUTE_ROB_VAL - component_commit_unit
1374	// out_REEXECUTE_ROB_ACK - component_commit_unit
1375	// in_REEXECUTE_ROB_FRONT_END_ID - component_commit_unit
1376	// in_REEXECUTE_ROB_CONTEXT_ID - component_commit_unit
1377	// in_REEXECUTE_ROB_PACKET_ID - component_commit_unit
1378	// in_REEXECUTE_ROB_OPERATION - component_commit_unit
1379	// in_REEXECUTE_ROB_TYPE - component_commit_unit
1380	// in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE - component_commit_unit
1381
1382	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1383	// out_REEXECUTE_VAL - component_issue_queue
1384	// in_REEXECUTE_ACK - component_issue_queue
1385	// out_REEXECUTE_CONTEXT_ID - component_issue_queue
1386	// out_REEXECUTE_FRONT_END_ID - component_issue_queue
1387	// out_REEXECUTE_PACKET_ID - component_issue_queue
1388	// out_REEXECUTE_OPERATION - component_issue_queue
1389	// out_REEXECUTE_TYPE - component_issue_queue
1390	// out_REEXECUTE_STORE_QUEUE_PTR_WRITE - component_issue_queue
1391	// out_REEXECUTE_LOAD_QUEUE_PTR_WRITE - component_issue_queue
1392	// out_REEXECUTE_HAS_IMMEDIAT - component_issue_queue
1393	// out_REEXECUTE_IMMEDIAT - component_issue_queue
1394	// out_REEXECUTE_READ_RA - component_issue_queue
1395	// out_REEXECUTE_NUM_REG_RA - component_issue_queue
1396	// out_REEXECUTE_READ_RB - component_issue_queue
1397	// out_REEXECUTE_NUM_REG_RB - component_issue_queue
1398	// out_REEXECUTE_READ_RC - component_issue_queue
1399	// out_REEXECUTE_NUM_REG_RC - component_issue_queue
1400	// out_REEXECUTE_WRITE_RD - component_issue_queue
1401	// out_REEXECUTE_NUM_REG_RD - component_issue_queue
1402	// out_REEXECUTE_WRITE_RE - component_issue_queue
1403	// out_REEXECUTE_NUM_REG_RE - component_issue_queue
1404	}
1405
1406	// ===================================================================
1407	// =====[ special_register_unit ]=====================================
1408	// ===================================================================
1409	{
1410	src = _name+"_special_register_unit";
1411	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1412
1413	{
1414	dest = _name;
1415	#ifdef POSITION
1416	_component->interface_map (src ,"",
1417	dest,"");
1418	#endif
1419	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1420	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1421	}
1422
1423	// ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1424	// in_SPR_ACCESS_VAL - component_reexecute_unit
1425	// out_SPR_ACCESS_ACK - component_reexecute_unit
1426	// in_SPR_ACCESS_FRONT_END_ID - component_reexecute_unit
1427	// in_SPR_ACCESS_CONTEXT_ID - component_reexecute_unit
1428	// in_SPR_ACCESS_WEN - component_reexecute_unit
1429	// in_SPR_ACCESS_NUM_GROUP - component_reexecute_unit
1430	// in_SPR_ACCESS_NUM_REG - component_reexecute_unit
1431	// in_SPR_ACCESS_WDATA - component_reexecute_unit
1432	// out_SPR_ACCESS_RDATA - component_reexecute_unit
1433	// out_SPR_ACCESS_INVALID - component_reexecute_unit
1434
1435	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1436	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1437	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1438	{
1439	dest = _name+"_glue";
1440
1441	#ifdef POSITION
1442	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
1443	dest,"spr_" +toString(i)+"_"+toString(j));
1444	#endif
1445
1446	COMPONENT_MAP(_component,src ,"out_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR",
1447	dest, "in_SPR_" +toString(i)+"_"+toString(j)+"_SPECIAL_REGISTER_UNIT_SR");
1448	}
1449
1450	// ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1451	// in_SPR_COMMIT_VAL - component_commit_unit
1452	// out_SPR_COMMIT_ACK - component_commit_unit
1453	// in_SPR_COMMIT_SR_F_VAL - component_commit_unit
1454	// in_SPR_COMMIT_SR_F - component_commit_unit
1455	// in_SPR_COMMIT_SR_CY_VAL - component_commit_unit
1456	// in_SPR_COMMIT_SR_CY - component_commit_unit
1457	// in_SPR_COMMIT_SR_OV_VAL - component_commit_unit
1458	// in_SPR_COMMIT_SR_OV - component_commit_unit
1459
1460	// ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1461	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1462	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1463	{
1464	dest = _name;
1465	#ifdef POSITION
1466	_component->interface_map (src ,"spr_event_"+toString(i)+"_"+toString(j),
1467	dest,"spr_event_"+toString(i)+"_"+toString(j));
1468	#endif
1469
1470	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" ,
1471	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" );
1472	PORT_MAP(_component,src ,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" ,
1473	dest,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" );
1474	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR" ,
1475	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR" );
1476	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" ,
1477	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" );
1478	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR" ,
1479	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR" );
1480	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX" ,
1481	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX" );
1482	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR",
1483	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR");
1484	}
1485	}
1486
1487	// ===================================================================
1488	// =====[ glue ]======================================================
1489	// ===================================================================
1490	{
1491	src = _name+"_glue";
1492	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1493
1494	{
1495	dest = _name;
1496	#ifdef POSITION
1497	_component->interface_map (src ,"",
1498	dest,"");
1499	#endif
1500	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1501	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1502	}
1503
1504	// ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1505	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1506	for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++)
1507	{
1508	dest = _name;
1509	#ifdef POSITION
1510	_component->interface_map (src ,"rename_"+toString(i)+"_"+toString(j),
1511	dest,"rename_"+toString(i)+"_"+toString(j));
1512	#endif
1513
1514	if (_param->_have_port_front_end_id)
1515	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
1516	dest, "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
1517
1518	// out_RENAME_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1519	}
1520
1521	// ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1522	for (uint32_t i=0; i<_param->_sum_inst_insert; i++)
1523	{
1524	dest = _name;
1525	#ifdef POSITION
1526	_component->interface_map (src ,"insert_"+toString(i),
1527	dest,"insert_"+toString(i));
1528	#endif
1529	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" ,
1530	dest,"out_INSERT_"+toString(i)+"_VAL" );
1531	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" ,
1532	dest, "in_INSERT_"+toString(i)+"_ACK" );
1533	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" ,
1534	dest,"out_INSERT_"+toString(i)+"_RD_USE" );
1535	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG",
1536	dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG");
1537	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" ,
1538	dest,"out_INSERT_"+toString(i)+"_RE_USE" );
1539	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG",
1540	dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG");
1541	}
1542
1543	// in_INSERT_RENAME_UNIT_VAL - component_rename_unit
1544	// out_INSERT_RENAME_UNIT_ACK - component_rename_unit
1545	// in_INSERT_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1546	// in_INSERT_RENAME_UNIT_CONTEXT_ID - component_rename_unit
1547	// in_INSERT_RENAME_UNIT_TYPE - component_rename_unit
1548	// in_INSERT_RENAME_UNIT_OPERATION - component_rename_unit
1549	// in_INSERT_RENAME_UNIT_NO_EXECUTE - component_rename_unit
1550	// in_INSERT_RENAME_UNIT_HAS_IMMEDIAT - component_rename_unit
1551	// in_INSERT_RENAME_UNIT_IMMEDIAT - component_rename_unit
1552	// in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE - component_rename_unit
1553	// in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE - component_rename_unit
1554	// in_INSERT_RENAME_UNIT_READ_RA - component_rename_unit
1555	// in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY - component_rename_unit
1556	// in_INSERT_RENAME_UNIT_READ_RB - component_rename_unit
1557	// in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY - component_rename_unit
1558	// in_INSERT_RENAME_UNIT_READ_RC - component_rename_unit
1559	// in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY - component_rename_unit
1560	// in_INSERT_RENAME_UNIT_WRITE_RD - component_rename_unit
1561	// in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD - component_rename_unit
1562	// in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW - component_rename_unit
1563	// in_INSERT_RENAME_UNIT_WRITE_RE - component_rename_unit
1564	// in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD - component_rename_unit
1565	// in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW - component_rename_unit
1566	//
1567	// out_INSERT_COMMIT_UNIT_VAL - component_commit_unit
1568	// in_INSERT_COMMIT_UNIT_ACK - component_commit_unit
1569	// out_INSERT_COMMIT_UNIT_FRONT_END_ID - component_commit_unit
1570	// out_INSERT_COMMIT_UNIT_CONTEXT_ID - component_commit_unit
1571	////out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID - component_commit_unit
1572	// out_INSERT_COMMIT_UNIT_TYPE - component_commit_unit
1573	// out_INSERT_COMMIT_UNIT_OPERATION - component_commit_unit
1574	// out_INSERT_COMMIT_UNIT_NO_EXECUTE - component_commit_unit
1575	// out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE - component_commit_unit
1576	// out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE - component_commit_unit
1577	// out_INSERT_COMMIT_UNIT_READ_RA - component_commit_unit
1578	// out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY - component_commit_unit
1579	// out_INSERT_COMMIT_UNIT_READ_RB - component_commit_unit
1580	// out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY - component_commit_unit
1581	// out_INSERT_COMMIT_UNIT_READ_RC - component_commit_unit
1582	// out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY - component_commit_unit
1583	// out_INSERT_COMMIT_UNIT_WRITE_RD - component_commit_unit
1584	// out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD - component_commit_unit
1585	// out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW - component_commit_unit
1586	// out_INSERT_COMMIT_UNIT_WRITE_RE - component_commit_unit
1587	// out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD - component_commit_unit
1588	// out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW - component_commit_unit
1589	//
1590	// out_INSERT_ISSUE_QUEUE_VAL - component_issue_queue
1591	// in_INSERT_ISSUE_QUEUE_ACK - component_issue_queue
1592	// out_INSERT_ISSUE_QUEUE_CONTEXT_ID - component_issue_queue
1593	// out_INSERT_ISSUE_QUEUE_FRONT_END_ID - component_issue_queue
1594	// out_INSERT_ISSUE_QUEUE_OPERATION - component_issue_queue
1595	// out_INSERT_ISSUE_QUEUE_TYPE - component_issue_queue
1596	// out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE - component_issue_queue
1597	// out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE - component_issue_queue
1598	// out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT - component_issue_queue
1599	// out_INSERT_ISSUE_QUEUE_IMMEDIAT - component_issue_queue
1600	// out_INSERT_ISSUE_QUEUE_READ_RA - component_issue_queue
1601	// out_INSERT_ISSUE_QUEUE_NUM_REG_RA - component_issue_queue
1602	// out_INSERT_ISSUE_QUEUE_READ_RB - component_issue_queue
1603	// out_INSERT_ISSUE_QUEUE_NUM_REG_RB - component_issue_queue
1604	// out_INSERT_ISSUE_QUEUE_READ_RC - component_issue_queue
1605	// out_INSERT_ISSUE_QUEUE_NUM_REG_RC - component_issue_queue
1606	// out_INSERT_ISSUE_QUEUE_WRITE_RD - component_issue_queue
1607	// out_INSERT_ISSUE_QUEUE_NUM_REG_RD - component_issue_queue
1608	// out_INSERT_ISSUE_QUEUE_WRITE_RE - component_issue_queue
1609	// out_INSERT_ISSUE_QUEUE_NUM_REG_RE - component_issue_queue
1610
1611	// // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1612	// for (uint32_t i=0; i<_param->_sum_inst_retire; i++)
1613	// {
1614	// dest = _name;
1615	// #ifdef POSITION
1616	// _component->interface_map (src ,"retire_"+toString(i),
1617	// dest,"retire_"+toString(i));
1618	// #endif
1619
1620	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_VAL" ,
1621	// dest,"out_RETIRE_"+toString(i)+"_VAL" );
1622	// PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_ACK" ,
1623	// dest, "in_RETIRE_"+toString(i)+"_ACK" );
1624	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_USE" ,
1625	// dest,"out_RETIRE_"+toString(i)+"_RD_OLD_USE" );
1626	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG",
1627	// dest,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG");
1628	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_USE" ,
1629	// dest,"out_RETIRE_"+toString(i)+"_RD_NEW_USE" );
1630	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG",
1631	// dest,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG");
1632	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_USE" ,
1633	// dest,"out_RETIRE_"+toString(i)+"_RE_OLD_USE" );
1634	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG",
1635	// dest,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG");
1636	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_USE" ,
1637	// dest,"out_RETIRE_"+toString(i)+"_RE_NEW_USE" );
1638	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG",
1639	// dest,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG");
1640	// }
1641
1642	// out_RETIRE_RENAME_UNIT_VAL - component_rename_unit
1643	// in_RETIRE_RENAME_UNIT_ACK - component_rename_unit
1644	// out_RETIRE_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1645	// out_RETIRE_RENAME_UNIT_WRITE_RD - component_rename_unit
1646	// out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD - component_rename_unit
1647	// out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW - component_rename_unit
1648	// out_RETIRE_RENAME_UNIT_WRITE_RE - component_rename_unit
1649	// out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD - component_rename_unit
1650	// out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW - component_rename_unit
1651	// out_RETIRE_RENAME_UNIT_EVENT_STATE - component_rename_unit
1652
1653	// in_RETIRE_COMMIT_UNIT_VAL - component_commit_unit
1654	// out_RETIRE_COMMIT_UNIT_ACK - component_commit_unit
1655	// in_RETIRE_COMMIT_UNIT_FRONT_END_ID - component_commit_unit
1656	// in_RETIRE_COMMIT_UNIT_WRITE_RD - component_commit_unit
1657	// in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD - component_commit_unit
1658	// in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW - component_commit_unit
1659	// in_RETIRE_COMMIT_UNIT_WRITE_RE - component_commit_unit
1660	// in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD - component_commit_unit
1661	// in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW - component_commit_unit
1662	// in_RETIRE_COMMIT_UNIT_EVENT_STATE - component_commit_unit
1663
1664	// ~~~~~[ Interface : "spr_sr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1665	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1666	for (uint32_t j=0; j<_param->_nb_context [i]; j++)
1667	{
1668	dest = _name;
1669	#ifdef POSITION
1670	_component->interface_map (src ,"spr_"+toString(i)+"_"+toString(j),
1671	dest,"spr_"+toString(i)+"_"+toString(j));
1672	#endif
1673
1674	PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE",
1675	dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE");
1676	PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH",
1677	dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH");
1678
1679	// out_SPR_RENAME_UNIT_SR - component_rename_unit
1680	// out_SPR_COMMIT_UNIT_SR_OVE - component_commit_unit
1681	// in_SPR_SPECIAL_REGISTER_UNIT_SR - component_special_register_unit
1682	}
1683
1684
1685	}
1686
1687	// ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1688	#if DEBUG_OOO_Engine == true
1689	_component->test_map();
1690	#endif
1691
1692	#ifdef POSITION
1693	if (usage_is_set(_usage,USE_POSITION))
1694	_component->generate_file();
1695	#endif
1696
1697	log_end(OOO_Engine,FUNCTION);
1698	};
1699
1700	}; // end namespace ooo_engine
1701	}; // end namespace multi_ooo_engine
1702	}; // end namespace core
1703
1704	}; // end namespace behavioural
1705	}; // end namespace morpheo

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