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source: trunk/IPs/systemC/processor/Morpheo/Behavioural/Core/Multi_OOO_Engine/OOO_Engine/src/OOO_Engine_allocation.cpp @ 98

Last change on this file since 98 was 98, checked in by rosiere, 15 years ago
1) Fix bug (read unit, RAT -> write in R0, SPR desallocation ...) 2) Change VHDL Execute_queue -> use Generic/Queue? 3) Complete document on VHDL generation 4) Add soc test
Property svn:keywords set to `Id`
File size: 117.1 KB

Line
1	/*
2	* $Id: OOO_Engine_allocation.cpp 98 2008-12-31 10:18:08Z rosiere $
3	*
4	* [ Description ]
5	*
6	*/
7
8	#include "Behavioural/Core/Multi_OOO_Engine/OOO_Engine/include/OOO_Engine.h"
9	#include "Behavioural/include/Allocation.h"
10
11	namespace morpheo {
12	namespace behavioural {
13	namespace core {
14	namespace multi_ooo_engine {
15	namespace ooo_engine {
16
17	#undef FUNCTION
18	#define FUNCTION "OOO_Engine::allocation"
19	void OOO_Engine::allocation
20	(
21	#ifdef STATISTICS
22	morpheo::behavioural::Parameters_Statistics * param_statistics
23	#else
24	void
25	#endif
26	)
27	{
28	log_begin(OOO_Engine,FUNCTION);
29
30	_component = new Component (_usage);
31
32	Entity * entity = _component->set_entity (_name
33	,"OOO_Engine"
34	#ifdef POSITION
35	,COMBINATORY
36	#endif
37	);
38
39	_interfaces = entity->set_interfaces();
40
41	// ~~~~~[ Interface : "" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
42	{
43	Interface * interface = _interfaces->set_interface(""
44	#ifdef POSITION
45	,IN
46	,SOUTH,
47	"Generalist interface"
48	#endif
49	);
50
51	in_CLOCK = interface->set_signal_clk ("clock" ,1, CLOCK_VHDL_YES);
52	in_NRESET = interface->set_signal_in <Tcontrol_t> ("nreset",1, RESET_VHDL_YES);
53	}
54
55	// ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
56	{
57	ALLOC2_INTERFACE("rename",IN,WEST,_("Instruction from front_end."),_param->_nb_front_end,_param->_nb_inst_decod[it1]);
58
59	_ALLOC2_VALACK_IN ( in_RENAME_VAL , VAL ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
60	_ALLOC2_VALACK_OUT(out_RENAME_ACK , ACK ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
61	_ALLOC2_SIGNAL_IN ( in_RENAME_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
62	_ALLOC2_SIGNAL_IN ( in_RENAME_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
63	_ALLOC2_SIGNAL_IN ( in_RENAME_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
64	_ALLOC2_SIGNAL_IN ( in_RENAME_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
65	_ALLOC2_SIGNAL_IN ( in_RENAME_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
66	_ALLOC2_SIGNAL_IN ( in_RENAME_NO_EXECUTE ,"NO_EXECUTE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
67	_ALLOC2_SIGNAL_IN ( in_RENAME_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
68	_ALLOC2_SIGNAL_IN ( in_RENAME_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
69	_ALLOC2_SIGNAL_IN ( in_RENAME_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
70	_ALLOC2_SIGNAL_IN ( in_RENAME_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
71	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RA ,"READ_RA" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
72	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RA ,"NUM_REG_RA" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
73	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RB ,"READ_RB" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
74	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RB ,"NUM_REG_RB" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
75	_ALLOC2_SIGNAL_IN ( in_RENAME_READ_RC ,"READ_RC" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
76	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RC ,"NUM_REG_RC" ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
77	_ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
78	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
79	_ALLOC2_SIGNAL_IN ( in_RENAME_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
80	_ALLOC2_SIGNAL_IN ( in_RENAME_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register_logic ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
81	_ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION_USE ,"EXCEPTION_USE" ,Texception_t ,_param->_size_exception_use ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
82	_ALLOC2_SIGNAL_IN ( in_RENAME_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_front_end,_param->_nb_inst_decod[it1]);
83	}
84
85	// ~~~~~[ Interface : "issue" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
86	{
87	ALLOC1_INTERFACE("issue",OUT,EAST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
88
89	ALLOC1_VALACK_OUT (out_ISSUE_VAL , VAL );
90	ALLOC1_VALACK_IN ( in_ISSUE_ACK , ACK );
91	ALLOC1_SIGNAL_OUT (out_ISSUE_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
92	ALLOC1_SIGNAL_OUT (out_ISSUE_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
93	ALLOC1_SIGNAL_OUT (out_ISSUE_PACKET_ID ,"PACKET_ID" ,Tpacket_t ,_param->_size_rob_ptr );
94	ALLOC1_SIGNAL_OUT (out_ISSUE_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type );
95	ALLOC1_SIGNAL_OUT (out_ISSUE_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation );
96	ALLOC1_SIGNAL_OUT (out_ISSUE_STORE_QUEUE_PTR_WRITE ,"STORE_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_store_queue_ptr );
97	ALLOC1_SIGNAL_OUT (out_ISSUE_LOAD_QUEUE_PTR_WRITE ,"LOAD_QUEUE_PTR_WRITE" ,Tlsq_ptr_t ,_param->_size_load_queue_ptr );
98	ALLOC1_SIGNAL_OUT (out_ISSUE_HAS_IMMEDIAT ,"HAS_IMMEDIAT" ,Tcontrol_t ,1 );
99	ALLOC1_SIGNAL_OUT (out_ISSUE_IMMEDIAT ,"IMMEDIAT" ,Tgeneral_data_t ,_param->_size_general_data );
100	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RA ,"READ_RA" ,Tcontrol_t ,1 );
101	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RA ,"NUM_REG_RA" ,Tgeneral_address_t,_param->_size_general_register );
102	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RB ,"READ_RB" ,Tcontrol_t ,1 );
103	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RB ,"NUM_REG_RB" ,Tgeneral_address_t,_param->_size_general_register );
104	ALLOC1_SIGNAL_OUT (out_ISSUE_READ_RC ,"READ_RC" ,Tcontrol_t ,1 );
105	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RC ,"NUM_REG_RC" ,Tspecial_address_t,_param->_size_special_register );
106	ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RD ,"WRITE_RD" ,Tcontrol_t ,1 );
107	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RD ,"NUM_REG_RD" ,Tgeneral_address_t,_param->_size_general_register );
108	ALLOC1_SIGNAL_OUT (out_ISSUE_WRITE_RE ,"WRITE_RE" ,Tcontrol_t ,1 );
109	ALLOC1_SIGNAL_OUT (out_ISSUE_NUM_REG_RE ,"NUM_REG_RE" ,Tspecial_address_t,_param->_size_special_register );
110	}
111
112	// ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
113	{
114	ALLOC2_INTERFACE("execute_loop",IN,EAST,_("Instruction executed, from execute_loop."),_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
115
116	_ALLOC2_VALACK_IN ( in_EXECUTE_LOOP_VAL , VAL ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
117	_ALLOC2_VALACK_OUT(out_EXECUTE_LOOP_ACK , ACK ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
118	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
119	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
120	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_PACKET_ID ,"PACKET_ID" ,Tpacket_t ,_param->_size_rob_ptr ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
121	// _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_TYPE ,"TYPE" ,Ttype_t ,_param->_size_type ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
122	// _ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_OPERATION ,"OPERATION" ,Toperation_t ,_param->_size_operation ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
123	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_FLAGS ,"FLAGS" ,Tspecial_data_t ,_param->_size_special_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
124	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_EXCEPTION ,"EXCEPTION" ,Texception_t ,_param->_size_exception ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
125	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
126	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
127	_ALLOC2_SIGNAL_IN ( in_EXECUTE_LOOP_DATA ,"DATA" ,Tgeneral_data_t ,_param->_size_general_data ,_param->_nb_execute_loop,_param->_nb_inst_execute[it1]);
128	}
129
130	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
131	{
132	ALLOC1_INTERFACE("insert",OUT,EAST,_("Interface with RegisterFile's stat-list (insert Re-Order-Buffer)."),_param->_sum_inst_insert);
133
134	ALLOC1_VALACK_OUT (out_INSERT_VAL , VAL);
135	ALLOC1_VALACK_IN ( in_INSERT_ACK , ACK);
136	ALLOC1_SIGNAL_OUT (out_INSERT_RD_USE ,"RD_USE" ,Tcontrol_t ,1 );
137	ALLOC1_SIGNAL_OUT (out_INSERT_RD_NUM_REG ,"RD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
138	ALLOC1_SIGNAL_OUT (out_INSERT_RE_USE ,"RE_USE" ,Tcontrol_t ,1 );
139	ALLOC1_SIGNAL_OUT (out_INSERT_RE_NUM_REG ,"RE_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
140	}
141
142	// // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
143	// {
144	// ALLOC1_INTERFACE("retire",OUT,EAST,_("Interface with RegisterFile's stat-list (retire Re-Order-Buffer)."),_param->_sum_inst_retire);
145
146	// ALLOC1_VALACK_OUT (out_RETIRE_VAL , VAL);
147	// ALLOC1_VALACK_IN ( in_RETIRE_ACK , ACK);
148	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_USE ,"RD_OLD_USE" ,Tcontrol_t ,1 );
149	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_OLD_NUM_REG ,"RD_OLD_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
150	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_USE ,"RD_NEW_USE" ,Tcontrol_t ,1 );
151	// ALLOC1_SIGNAL_OUT (out_RETIRE_RD_NEW_NUM_REG ,"RD_NEW_NUM_REG" ,Tgeneral_address_t,_param->_size_general_register );
152	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_USE ,"RE_OLD_USE" ,Tcontrol_t ,1 );
153	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_OLD_NUM_REG ,"RE_OLD_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
154	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_USE ,"RE_NEW_USE" ,Tcontrol_t ,1 );
155	// ALLOC1_SIGNAL_OUT (out_RETIRE_RE_NEW_NUM_REG ,"RE_NEW_NUM_REG" ,Tspecial_address_t,_param->_size_special_register );
156	// }
157
158	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
159	{
160	ALLOC1_INTERFACE("branch_complete",OUT,WEST,_("Instruction to execute_loop"),_param->_nb_inst_issue);
161
162	ALLOC1_VALACK_OUT (out_BRANCH_COMPLETE_VAL , VAL);
163	ALLOC1_VALACK_IN ( in_BRANCH_COMPLETE_ACK , ACK);
164	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
165	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
166	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth );
167	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address );
168	ALLOC1_SIGNAL_OUT (out_BRANCH_COMPLETE_NO_SEQUENCE ,"NO_SEQUENCE" ,Tcontrol_t ,1 );
169	ALLOC1_SIGNAL_IN ( in_BRANCH_COMPLETE_MISS_PREDICTION ,"MISS_PREDICTION" ,Tcontrol_t ,1 );
170	}
171
172	// ~~~~~[ Interface : "commit_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
173	{
174	ALLOC_INTERFACE("commit_event",OUT,WEST,_("Commit an event (exception)."));
175
176	ALLOC_VALACK_OUT (out_COMMIT_EVENT_VAL , VAL);
177	ALLOC_VALACK_IN ( in_COMMIT_EVENT_ACK , ACK);
178	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_FRONT_END_ID ,"FRONT_END_ID" ,Tcontext_t ,_param->_size_front_end_id );
179	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_CONTEXT_ID ,"CONTEXT_ID" ,Tcontext_t ,_param->_size_context_id );
180	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_DEPTH ,"DEPTH" ,Tdepth_t ,_param->_size_depth );
181	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_TYPE ,"TYPE" ,Tevent_type_t ,_param->_size_event_type );
182	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_IS_DELAY_SLOT ,"IS_DELAY_SLOT" ,Tcontrol_t ,1 );
183	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address );
184	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EPCR ,"ADDRESS_EPCR" ,Taddress_t ,_param->_size_instruction_address );
185	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR_VAL ,"ADDRESS_EEAR_VAL" ,Tcontrol_t ,1 );
186	ALLOC_SIGNAL_OUT (out_COMMIT_EVENT_ADDRESS_EEAR ,"ADDRESS_EEAR" ,Tgeneral_data_t ,_param->_size_general_data );
187	}
188
189	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
190	{
191	ALLOC2_INTERFACE("event",IN,WEST,_("Event from context_state."),_param->_nb_front_end,_param->_nb_context[it1]);
192
193	_ALLOC2_VALACK_IN ( in_EVENT_VAL , VAL ,_param->_nb_front_end,_param->_nb_context[it1]);
194	_ALLOC2_VALACK_OUT(out_EVENT_ACK , ACK ,_param->_nb_front_end,_param->_nb_context[it1]);
195	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS ,"ADDRESS" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_context[it1]);
196	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT ,"ADDRESS_NEXT" ,Taddress_t ,_param->_size_instruction_address ,_param->_nb_front_end,_param->_nb_context[it1]);
197	_ALLOC2_SIGNAL_IN ( in_EVENT_ADDRESS_NEXT_VAL ,"ADDRESS_NEXT_VAL" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
198	_ALLOC2_SIGNAL_IN ( in_EVENT_IS_DS_TAKE ,"IS_DS_TAKE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
199	}
200
201	// ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
202	{
203	ALLOC2_INTERFACE("spr_event",IN,WEST,_("Exception : save spr and set a lot of special register."),_param->_nb_front_end,_param->_nb_context[it1]);
204
205	_ALLOC2_VALACK_IN ( in_SPR_EVENT_VAL , VAL ,_param->_nb_front_end,_param->_nb_context[it1]);
206	_ALLOC2_VALACK_OUT(out_SPR_EVENT_ACK , ACK ,_param->_nb_front_end,_param->_nb_context[it1]);
207	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EPCR ,"EPCR" ,Tspr_t ,_param->_size_spr ,_param->_nb_front_end,_param->_nb_context[it1]);
208	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR_WEN ,"EEAR_WEN" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
209	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_EEAR ,"EEAR" ,Tspr_t ,_param->_size_spr ,_param->_nb_front_end,_param->_nb_context[it1]);
210	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_DSX ,"SR_DSX" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
211	_ALLOC2_SIGNAL_IN ( in_SPR_EVENT_SR_TO_ESR ,"SR_TO_ESR" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
212	}
213
214	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
215	{
216	ALLOC2_INTERFACE("nb_inst",OUT,WEST,_("Internal number instruction."),_param->_nb_front_end,_param->_nb_context[it1]);
217
218	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_ALL ,"COMMIT_ALL" ,Tcounter_t ,_param->_size_nb_inst_commit ,_param->_nb_front_end,_param->_nb_context[it1]);
219	_ALLOC2_SIGNAL_OUT(out_NB_INST_COMMIT_MEM ,"COMMIT_MEM" ,Tcounter_t ,_param->_size_nb_inst_commit ,_param->_nb_front_end,_param->_nb_context[it1]);
220	}
221
222	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
223	{
224	ALLOC2_INTERFACE("depth",IN,WEST,_("Interface with Prediction unit."),_param->_nb_front_end, _param->_nb_context[it1]);
225
226	_ALLOC2_SIGNAL_IN ( in_DEPTH_MIN ,"MIN" ,Tdepth_t ,_param->_size_depth ,_param->_nb_front_end, _param->_nb_context[it1]);
227	_ALLOC2_SIGNAL_IN ( in_DEPTH_MAX ,"MAX" ,Tdepth_t ,_param->_size_depth+1 ,_param->_nb_front_end, _param->_nb_context[it1]);
228	}
229
230	// ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
231	{
232	ALLOC2_INTERFACE("spr",OUT,WEST,_("SPR"),_param->_nb_front_end,_param->_nb_context[it1]);
233
234	_ALLOC2_SIGNAL_OUT(out_SPR_SR_IEE ,"SR_IEE" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
235	_ALLOC2_SIGNAL_OUT(out_SPR_SR_EPH ,"SR_EPH" ,Tcontrol_t ,1 ,_param->_nb_front_end,_param->_nb_context[it1]);
236	}
237
238	// ~~~~~[ Component ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
239	std::string name;
240
241	_component_rename_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit * [_param->_nb_rename_unit];
242	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
243	{
244	name = _name+"_rename_unit_"+toString(i);
245	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
246
247	_component_rename_unit [i] = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::rename_unit::Rename_unit
248	(name.c_str()
249	#ifdef STATISTICS
250	,param_statistics
251	#endif
252	,_param->_param_rename_unit [i]
253	,_usage);
254
255	_component->set_component (_component_rename_unit [i]->_component
256	#ifdef POSITION
257	, 50, 50, 10, 10
258	#endif
259	);
260	}
261
262	{
263	name = _name+"_commit_unit";
264	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
265
266	_component_commit_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::commit_unit::Commit_unit
267	(name.c_str()
268	#ifdef STATISTICS
269	,param_statistics
270	#endif
271	,_param->_param_commit_unit
272	,_usage);
273
274	_component->set_component (_component_commit_unit->_component
275	#ifdef POSITION
276	, 50, 50, 10, 10
277	#endif
278	);
279	}
280
281	{
282	name = _name+"_issue_queue";
283	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
284
285	_component_issue_queue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::issue_queue::Issue_queue
286	(name.c_str()
287	#ifdef STATISTICS
288	,param_statistics
289	#endif
290	,_param->_param_issue_queue
291	,_usage);
292
293	_component->set_component (_component_issue_queue->_component
294	#ifdef POSITION
295	, 50, 50, 10, 10
296	#endif
297	);
298	}
299
300	{
301	name = _name+"_reexecute_unit";
302	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
303
304	_component_reexecute_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::reexecute_unit::Reexecute_unit
305	(name.c_str()
306	#ifdef STATISTICS
307	,param_statistics
308	#endif
309	,_param->_param_reexecute_unit
310	,_usage);
311
312	_component->set_component (_component_reexecute_unit->_component
313	#ifdef POSITION
314	, 50, 50, 10, 10
315	#endif
316	);
317	}
318
319	{
320	name = _name+"_special_register_unit";
321	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
322
323	_component_special_register_unit = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::special_register_unit::Special_Register_unit
324	(name.c_str()
325	#ifdef STATISTICS
326	,param_statistics
327	#endif
328	,_param->_param_special_register_unit
329	,_usage);
330
331	_component->set_component (_component_special_register_unit->_component
332	#ifdef POSITION
333	, 50, 50, 10, 10
334	#endif
335	);
336	}
337
338	{
339	name = _name+"_glue";
340	log_printf(TRACE,OOO_Engine,FUNCTION,_("Create : %s"),name.c_str());
341
342	_component_glue = new morpheo::behavioural::core::multi_ooo_engine::ooo_engine::ooo_engine_glue::OOO_Engine_Glue
343	(name.c_str()
344	#ifdef STATISTICS
345	,param_statistics
346	#endif
347	,_param->_param_glue
348	,_usage);
349
350	_component->set_component (_component_glue->_component
351	#ifdef POSITION
352	, 50, 50, 10, 10
353	#endif
354	);
355	}
356
357	// ~~~~~[ Instanciation ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
358	std::string src,dest;
359
360	// ===================================================================
361	// =====[ rename_unit ]===============================================
362	// ===================================================================
363	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
364	{
365	src = _name+"_rename_unit_"+toString(i);
366	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
367
368	{
369	dest = _name;
370	#ifdef POSITION
371	_component->interface_map (src ,"",
372	dest,"");
373	#endif
374	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
375	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
376	}
377
378	// ~~~~~[ Interface : "rename_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
379	std::vector<uint32_t>::iterator it = _param->_link_front_end_with_rename_unit[i].begin();
380	uint32_t x = 0;
381	for (uint32_t j=0; j<_param->_nb_front_end; j++)
382	{
383	if (i == *it)
384	{
385	// this front end is link with this rename_unit
386	for (uint32_t k=0; k<_param->_nb_inst_decod [j]; k++)
387	{
388	dest = _name;
389
390	#ifdef POSITION
391	_component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
392	dest,"rename_" +toString(j)+"_"+toString(k));
393	#endif
394
395	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_VAL" ,
396	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_VAL" );
397	PORT_MAP(_component,src ,"out_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ACK" ,
398	dest,"out_RENAME_" +toString(j)+"_"+toString(k)+"_ACK" );
399	if (_param->_have_port_context_id)
400	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_CONTEXT_ID" ,
401	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_CONTEXT_ID" );
402	if (_param->_have_port_depth)
403	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_DEPTH" ,
404	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_DEPTH" );
405	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_TYPE" ,
406	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_TYPE" );
407	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_OPERATION" ,
408	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_OPERATION" );
409	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NO_EXECUTE" ,
410	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NO_EXECUTE" );
411	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IS_DELAY_SLOT",
412	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IS_DELAY_SLOT");
413	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_ADDRESS" ,
414	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_ADDRESS" );
415	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_HAS_IMMEDIAT" ,
416	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_HAS_IMMEDIAT" );
417	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_IMMEDIAT" ,
418	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_IMMEDIAT" );
419	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RA" ,
420	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RA" );
421	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RA" ,
422	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RA" );
423	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RB" ,
424	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RB" );
425	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RB" ,
426	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RB" );
427	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_READ_RC" ,
428	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_READ_RC" );
429	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RC" ,
430	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RC" );
431	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RD" ,
432	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_WRITE_RD" );
433	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RD" ,
434	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RD" );
435	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_WRITE_RE" ,
436	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_WRITE_RE" );
437	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_NUM_REG_RE" ,
438	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_NUM_REG_RE" );
439	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION_USE",
440	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_EXCEPTION_USE");
441	PORT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+"_EXCEPTION" ,
442	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_EXCEPTION" );
443
444	// glue
445	dest = _name+"_glue";
446
447	#ifdef POSITION
448	_component->interface_map (src ,"rename_in_"+toString(x)+"_"+toString(k),
449	dest,"rename_" +toString(j)+"_"+toString(k));
450	#endif
451
452	if (_param->_have_port_front_end_id)
453	COMPONENT_MAP(_component,src , "in_RENAME_IN_"+toString(x)+"_"+toString(k)+ "_FRONT_END_ID" ,
454	dest, "in_RENAME_" +toString(j)+"_"+toString(k)+"_RENAME_UNIT_FRONT_END_ID" );
455	}
456
457	x ++;
458	it++;
459	}
460	}
461
462	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
463	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
464	{
465	dest = _name+"_commit_unit";
466
467	#ifdef POSITION
468	_component->interface_map (src ,"insert_"+toString(j),
469	dest,"insert_"+toString(i)+"_"+toString(j));
470	#endif
471
472	if (_param->_have_port_depth)
473	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_DEPTH" ,
474	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_DEPTH" );
475	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_IS_DELAY_SLOT" ,
476	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_IS_DELAY_SLOT" );
477	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_ADDRESS" ,
478	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
479	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_EXCEPTION_USE" ,
480	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION_USE" );
481	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_EXCEPTION" ,
482	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
483	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RA_LOG",
484	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_LOG");
485	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RB_LOG",
486	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_LOG");
487	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RC_LOG",
488	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_LOG");
489	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RD_LOG",
490	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG");
491	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j) +"_NUM_REG_RE_LOG",
492	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG");
493
494	dest = _name+"_glue";
495
496	#ifdef POSITION
497	_component->interface_map (src ,"insert_"+toString(j),
498	dest,"insert_"+toString(i)+"_"+toString(j));
499	#endif
500
501	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_VAL" ,
502	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_VAL" );
503	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(j)+ "_ACK" ,
504	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_ACK" );
505	if (_param->_have_port_front_end_id)
506	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_FRONT_END_ID" ,
507	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_FRONT_END_ID" );
508	if (_param->_have_port_context_id)
509	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_CONTEXT_ID" ,
510	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_CONTEXT_ID" );
511	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_TYPE" ,
512	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_TYPE" );
513	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_OPERATION" ,
514	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_OPERATION" );
515	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NO_EXECUTE" ,
516	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NO_EXECUTE" );
517	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_HAS_IMMEDIAT" ,
518	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_HAS_IMMEDIAT" );
519	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_IMMEDIAT" ,
520	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_IMMEDIAT" );
521	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
522	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_STORE_QUEUE_PTR_WRITE");
523	if (_param->_have_port_load_queue_ptr)
524	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
525	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE" );
526	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RA" ,
527	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RA" );
528	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RA_PHY" ,
529	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RA_PHY" );
530	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RB" ,
531	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RB" );
532	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RB_PHY" ,
533	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RB_PHY" );
534	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_READ_RC" ,
535	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_READ_RC" );
536	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RC_PHY" ,
537	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RC_PHY" );
538	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_WRITE_RD" ,
539	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RD" );
540	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RD_PHY_OLD" ,
541	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_OLD" );
542	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RD_PHY_NEW" ,
543	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_NEW" );
544	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_WRITE_RE" ,
545	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RE" );
546	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RE_PHY_OLD" ,
547	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_OLD" );
548	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(j)+ "_NUM_REG_RE_PHY_NEW" ,
549	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_NEW" );
550	}
551
552	for (uint32_t j=0; j<_param->_nb_inst_retire[i]; j++)
553	{
554	dest = _name+"_commit_unit";
555
556	#ifdef POSITION
557	_component->interface_map (src ,"retire_"+toString(j),
558	dest,"retire_"+toString(i)+"_"+toString(j));
559	#endif
560
561
562
563	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_VAL" ,
564	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_VAL" );
565	COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(j)+ "_ACK" ,
566	dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_ACK" );
567	if (_param->_have_port_front_end_id)
568	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_FRONT_END_ID" ,
569	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID" );
570	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RD" ,
571	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RD" );
572	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
573	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_OLD");
574	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
575	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_PHY_NEW");
576	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RE" ,
577	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_WRITE_RE" );
578	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
579	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_OLD");
580	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
581	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_PHY_NEW");
582	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_EVENT_STATE" ,
583	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_EVENT_STATE" );
584
585	if (_param->_have_port_context_id)
586	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_CONTEXT_ID" ,
587	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
588	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_TYPE" ,
589	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_TYPE" );
590	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_OPERATION" ,
591	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_OPERATION" );
592	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_USE_STORE_QUEUE" ,
593	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_STORE_QUEUE" );
594	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_USE_LOAD_QUEUE" ,
595	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_USE_LOAD_QUEUE" );
596	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
597	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_STORE_QUEUE_PTR_WRITE");
598	if (_param->_have_port_load_queue_ptr)
599	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
600	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_LOAD_QUEUE_PTR_WRITE" );
601	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RA" ,
602	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RA" );
603	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RA_PHY" ,
604	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RA_PHY" );
605	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RB" ,
606	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RB" );
607	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RB_PHY" ,
608	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RB_PHY" );
609	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_READ_RC" ,
610	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_READ_RC" );
611	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RC_PHY" ,
612	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RC_PHY" );
613	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_LOG" ,
614	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RD_LOG" );
615	COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_LOG" ,
616	dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_NUM_REG_RE_LOG" );
617
618	// dest = _name+"_glue";
619
620	// #ifdef POSITION
621	// _component->interface_map (src ,"retire_"+toString(j),
622	// dest,"retire_"+toString(i)+"_"+toString(j));
623	// #endif
624
625	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_VAL" ,
626	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_VAL" );
627	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(j)+ "_ACK" ,
628	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_ACK" );
629	// if (_param->_have_port_front_end_id)
630	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_FRONT_END_ID" ,
631	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_FRONT_END_ID" );
632	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RD" ,
633	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RD" );
634	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
635	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_OLD");
636	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
637	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RD_PHY_NEW");
638	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_WRITE_RE" ,
639	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_WRITE_RE" );
640	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
641	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_OLD");
642	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
643	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_NUM_REG_RE_PHY_NEW");
644	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(j)+ "_EVENT_STATE" ,
645	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_RENAME_UNIT_EVENT_STATE" );
646	}
647
648	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
649	for (uint32_t i=0; i<_param->_nb_front_end; i++)
650	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
651	{
652	dest = _name+"_glue";
653
654	#ifdef POSITION
655	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
656	dest,"spr_" +toString(i)+"_"+toString(j));
657	#endif
658
659	COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR",
660	dest,"out_SPR_" +toString(i)+"_"+toString(j)+"_RENAME_UNIT_SR");
661	}
662	}
663
664	// ===================================================================
665	// =====[ commit_unit ]===============================================
666	// ===================================================================
667	{
668	src = _name+"_commit_unit";
669	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
670
671	{
672	dest = _name;
673	#ifdef POSITION
674	_component->interface_map (src ,"",
675	dest,"");
676	#endif
677	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
678	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
679	}
680
681	// ~~~~~[ Interface "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
682	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
683	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
684	{
685	dest = _name+"_glue";
686	#ifdef POSITION
687	_component->interface_map (src ,"insert_"+toString(i)+"_"+toString(j),
688	dest,"insert_"+toString(i)+"_"+toString(j));
689	#endif
690
691	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_VAL" ,
692	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL" );
693	COMPONENT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_"+toString(j)+ "_ACK" ,
694	dest, "in_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK" );
695	if (_param->_have_port_front_end_id)
696	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
697	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID" );
698	if (_param->_have_port_context_id)
699	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_CONTEXT_ID" ,
700	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_CONTEXT_ID" );
701	// COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_RENAME_UNIT_ID" ,
702	// dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_RENAME_UNIT_ID" );
703	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_TYPE" ,
704	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_TYPE" );
705	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_OPERATION" ,
706	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_OPERATION" );
707	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NO_EXECUTE" ,
708	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NO_EXECUTE" );
709	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
710	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE");
711	if (_param->_have_port_load_queue_ptr)
712	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
713	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE" );
714	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RA" ,
715	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RA" );
716	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA_PHY" ,
717	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RA_PHY" );
718	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RB" ,
719	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RB" );
720	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB_PHY" ,
721	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RB_PHY" );
722	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_READ_RC" ,
723	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_READ_RC" );
724	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RC_PHY" ,
725	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RC_PHY" );
726	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
727	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD" );
728	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_OLD" ,
729	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD" );
730	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_NEW" ,
731	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW" );
732	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
733	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE" );
734	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_OLD" ,
735	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD" );
736	COMPONENT_MAP(_component,src , "in_INSERT_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_NEW" ,
737	dest,"out_INSERT_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW" );
738
739	dest = _name+"_issue_queue";
740	#ifdef POSITION
741	_component->interface_map (src ,"insert_" +toString(i)+"_"+toString(j),
742	dest,"issue_in_"+toString(i)+"_"+toString(j));
743	#endif
744
745	if (_param->_have_port_rob_ptr)
746	COMPONENT_MAP(_component,src ,"out_INSERT_" +toString(i)+"_"+toString(j)+"_PACKET_ID",
747	dest, "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+"_PACKET_ID");
748
749	// in_INSERT_DEPTH - component_rename_unit
750	// in_INSERT_ADDRESS - component_rename_unit
751	// in_INSERT_EXCEPTION_USE - component_rename_unit
752	// in_INSERT_EXCEPTION - component_rename_unit
753	// in_INSERT_NUM_REG_RA_LOG - component_rename_unit
754	// in_INSERT_NUM_REG_RB_LOG - component_rename_unit
755	// in_INSERT_NUM_REG_RC_LOG - component_rename_unit
756	// in_INSERT_NUM_REG_RD_LOG - component_rename_unit
757	// in_INSERT_NUM_REG_RE_LOG - component_rename_unit
758	// in_INSERT_IS_DELAY_SLOT - component_rename_unit
759	}
760
761	// ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
762	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
763	for (uint32_t j=0; j<_param->_nb_inst_retire [i]; j++)
764	{
765	// dest = _name+"_glue";
766
767	// #ifdef POSITION
768	// _component->interface_map (src ,"retire_"+toString(i)+"_"+toString(j),
769	// dest,"retire_"+toString(i)+"_"+toString(j));
770	// #endif
771
772	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_VAL" ,
773	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_VAL" );
774	// COMPONENT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_"+toString(j)+ "_ACK" ,
775	// dest,"out_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_ACK" );
776	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
777	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RD" );
778	// if (_param->_have_port_front_end_id)
779	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
780	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_FRONT_END_ID" );
781	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_OLD",
782	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_OLD");
783	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD_PHY_NEW",
784	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RD_PHY_NEW");
785	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
786	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_WRITE_RE" );
787	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_OLD",
788	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_OLD");
789	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE_PHY_NEW",
790	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_NUM_REG_RE_PHY_NEW");
791	// COMPONENT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_"+toString(j)+ "_EVENT_STATE" ,
792	// dest, "in_RETIRE_"+toString(i)+"_"+toString(j)+"_COMMIT_UNIT_EVENT_STATE" );
793
794
795	// out_RETIRE_VAL - component_rename_unit
796	// in_RETIRE_ACK - component_rename_unit
797	// out_RETIRE_WRITE_RD - component_rename_unit
798	// out_RETIRE_FRONT_END_ID - component_rename_unit
799	// out_RETIRE_NUM_REG_RD_PHY_OLD - component_rename_unit
800	// out_RETIRE_NUM_REG_RD_PHY_NEW - component_rename_unit
801	// out_RETIRE_WRITE_RE - component_rename_unit
802	// out_RETIRE_NUM_REG_RE_PHY_OLD - component_rename_unit
803	// out_RETIRE_NUM_REG_RE_PHY_NEW - component_rename_unit
804	// out_RETIRE_EVENT_STATE - component_rename_unit
805
806	// out_RETIRE_CONTEXT_ID - component_rename_unit
807	////out_RETIRE_RENAME_UNIT_ID - component_rename_unit
808	// out_RETIRE_USE_STORE_QUEUE - component_rename_unit
809	// out_RETIRE_USE_LOAD_QUEUE - component_rename_unit
810	// out_RETIRE_STORE_QUEUE_PTR_WRITE - component_rename_unit
811	// out_RETIRE_LOAD_QUEUE_PTR_WRITE - component_rename_unit
812	// out_RETIRE_READ_RA - component_rename_unit
813	// out_RETIRE_NUM_REG_RA_PHY - component_rename_unit
814	// out_RETIRE_READ_RB - component_rename_unit
815	// out_RETIRE_NUM_REG_RB_PHY - component_rename_unit
816	// out_RETIRE_READ_RC - component_rename_unit
817	// out_RETIRE_NUM_REG_RC_PHY - component_rename_unit
818	// out_RETIRE_NUM_REG_RD_LOG - component_rename_unit
819	// out_RETIRE_NUM_REG_RE_LOG - component_rename_unit
820	}
821
822	// ~~~~~[ Interface : "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
823	for (uint32_t i=0; i<_param->_nb_inst_commit; i++)
824	{
825	dest = _name+"_reexecute_unit";
826	#ifdef POSITION
827	_component->interface_map (src ,"commit_"+toString(i),
828	dest,"commit_"+toString(i));
829	#endif
830
831	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_VAL" ,
832	dest,"out_COMMIT_"+toString(i)+"_VAL" );
833	COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_ACK" ,
834	dest, "in_COMMIT_"+toString(i)+"_ACK" );
835	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_WEN" ,
836	dest,"out_COMMIT_"+toString(i)+"_WEN" );
837	if (_param->_have_port_rob_ptr)
838	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_PACKET_ID" ,
839	dest,"out_COMMIT_"+toString(i)+"_PACKET_ID" );
840	// COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_OPERATION" ,
841	// dest,"out_COMMIT_"+toString(i)+"_OPERATION" );
842	// COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_TYPE" ,
843	// dest,"out_COMMIT_"+toString(i)+"_TYPE" );
844	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_FLAGS" ,
845	dest,"out_COMMIT_"+toString(i)+"_FLAGS" );
846	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_EXCEPTION" ,
847	dest,"out_COMMIT_"+toString(i)+"_EXCEPTION" );
848	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_NO_SEQUENCE",
849	dest,"out_COMMIT_"+toString(i)+"_NO_SEQUENCE");
850	COMPONENT_MAP(_component,src , "in_COMMIT_"+toString(i)+"_ADDRESS" ,
851	dest,"out_COMMIT_"+toString(i)+"_ADDRESS" );
852	COMPONENT_MAP(_component,src ,"out_COMMIT_"+toString(i)+"_NUM_REG_RD" ,
853	dest, "in_COMMIT_"+toString(i)+"_NUM_REG_RD" );
854	//@@@@@@@@@@
855	}
856
857	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
858	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
859	{
860	dest = _name+"_reexecute_unit";
861	#ifdef POSITION
862	_component->interface_map (src ,"reexecute_" +toString(i),
863	dest,"reexecute_rob_"+toString(i));
864	#endif
865
866	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_VAL" ,
867	dest, "in_REEXECUTE_ROB_"+toString(i)+"_VAL" );
868	COMPONENT_MAP(_component,src , "in_REEXECUTE_" +toString(i)+"_ACK" ,
869	dest,"out_REEXECUTE_ROB_"+toString(i)+"_ACK" );
870	if (_param->_have_port_front_end_id)
871	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_FRONT_END_ID" ,
872	dest, "in_REEXECUTE_ROB_"+toString(i)+"_FRONT_END_ID" );
873	if (_param->_have_port_context_id)
874	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_CONTEXT_ID" ,
875	dest, "in_REEXECUTE_ROB_"+toString(i)+"_CONTEXT_ID" );
876	if (_param->_have_port_rob_ptr)
877	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_PACKET_ID" ,
878	dest, "in_REEXECUTE_ROB_"+toString(i)+"_PACKET_ID" );
879	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_OPERATION" ,
880	dest, "in_REEXECUTE_ROB_"+toString(i)+"_OPERATION" );
881	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_TYPE" ,
882	dest, "in_REEXECUTE_ROB_"+toString(i)+"_TYPE" );
883	COMPONENT_MAP(_component,src ,"out_REEXECUTE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE",
884	dest, "in_REEXECUTE_ROB_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
885	}
886
887	// ~~~~~[ Interface : "branch_complete" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
888	for (uint32_t i=0; i<_param->_nb_inst_branch_complete; i++)
889	{
890	dest = _name;
891	#ifdef POSITION
892	_component->interface_map (src ,"branch_complete_"+toString(i),
893	dest,"branch_complete_"+toString(i));
894	#endif
895
896	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL" ,
897	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_VAL" );
898	PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_ACK" ,
899	dest, "in_BRANCH_COMPLETE_"+toString(i)+"_ACK" );
900	if (_param->_have_port_front_end_id)
901	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID" ,
902	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_FRONT_END_ID" );
903	if (_param->_have_port_context_id)
904	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID" ,
905	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_CONTEXT_ID" );
906	if (_param->_have_port_depth)
907	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH" ,
908	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_DEPTH" );
909	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" ,
910	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_ADDRESS" );
911	PORT_MAP(_component,src ,"out_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE" ,
912	dest,"out_BRANCH_COMPLETE_"+toString(i)+"_NO_SEQUENCE" );
913	PORT_MAP(_component,src , "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION",
914	dest, "in_BRANCH_COMPLETE_"+toString(i)+"_MISS_PREDICTION");
915	}
916
917	// ~~~~~[ Interface : "update" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
918	{
919	dest = _name;
920	#ifdef POSITION
921	_component->interface_map (src ,"update",
922	dest,"commit_event");
923	#endif
924
925	PORT_MAP(_component,src ,"out_UPDATE_VAL" ,dest,"out_COMMIT_EVENT_VAL" );
926	PORT_MAP(_component,src , "in_UPDATE_ACK" ,dest, "in_COMMIT_EVENT_ACK" );
927	if (_param->_have_port_front_end_id)
928	PORT_MAP(_component,src ,"out_UPDATE_FRONT_END_ID" ,dest,"out_COMMIT_EVENT_FRONT_END_ID" );
929	if (_param->_have_port_context_id)
930	PORT_MAP(_component,src ,"out_UPDATE_CONTEXT_ID" ,dest,"out_COMMIT_EVENT_CONTEXT_ID" );
931	if (_param->_have_port_depth)
932	PORT_MAP(_component,src ,"out_UPDATE_DEPTH" ,dest,"out_COMMIT_EVENT_DEPTH" );
933	PORT_MAP(_component,src ,"out_UPDATE_TYPE" ,dest,"out_COMMIT_EVENT_TYPE" );
934	PORT_MAP(_component,src ,"out_UPDATE_IS_DELAY_SLOT" ,dest,"out_COMMIT_EVENT_IS_DELAY_SLOT" );
935	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS" ,dest,"out_COMMIT_EVENT_ADDRESS" );
936	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EPCR" ,dest,"out_COMMIT_EVENT_ADDRESS_EPCR" );
937	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR_VAL",dest,"out_COMMIT_EVENT_ADDRESS_EEAR_VAL");
938	PORT_MAP(_component,src ,"out_UPDATE_ADDRESS_EEAR" ,dest,"out_COMMIT_EVENT_ADDRESS_EEAR" );
939	}
940
941	// ~~~~~[ Interface "event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
942	for (uint32_t i=0; i<_param->_nb_front_end; i++)
943	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
944	{
945	dest = _name;
946	#ifdef POSITION
947	_component->interface_map (src ,"event_"+toString(i)+"_"+toString(j),
948	dest,"event_"+toString(i)+"_"+toString(j));
949	#endif
950
951	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" ,
952	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" );
953	PORT_MAP(_component,src ,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" ,
954	dest,"out_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" );
955	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
956	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
957	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" ,
958	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT" );
959	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL",
960	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_ADDRESS_NEXT_VAL");
961	PORT_MAP(_component,src , "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE" ,
962	dest, "in_EVENT_"+toString(i)+"_"+toString(j)+"_IS_DS_TAKE" );
963	}
964
965	// ~~~~~[ Interface : "nb_inst" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
966	for (uint32_t i=0; i<_param->_nb_front_end; i++)
967	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
968	{
969	dest = _name;
970	#ifdef POSITION
971	_component->interface_map (src ,"nb_inst_"+toString(i)+"_"+toString(j),
972	dest,"nb_inst_"+toString(i)+"_"+toString(j));
973	#endif
974
975	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL",
976	dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_ALL");
977	PORT_MAP(_component,src ,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM",
978	dest,"out_NB_INST_"+toString(i)+"_"+toString(j)+"_COMMIT_MEM");
979	}
980
981	// ~~~~~[ Interface : "depth" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
982	for (uint32_t i=0; i<_param->_nb_front_end; i++)
983	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
984	{
985	dest = _name;
986	#ifdef POSITION
987	_component->interface_map (src ,"depth_"+toString(i)+"_"+toString(j),
988	dest,"depth_"+toString(i)+"_"+toString(j));
989	#endif
990
991	if (_param->_have_port_depth)
992	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN",
993	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MIN");
994	PORT_MAP(_component,src , "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX",
995	dest, "in_DEPTH_"+toString(i)+"_"+toString(j)+"_MAX");
996	}
997
998	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
999	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1000	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1001	{
1002	dest = _name+"_glue";
1003
1004	#ifdef POSITION
1005	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
1006	dest,"spr_" +toString(i)+"_"+toString(j));
1007	#endif
1008
1009	COMPONENT_MAP(_component,src , "in_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR_OVE",
1010	dest,"out_SPR_" +toString(i)+"_"+toString(j)+"_COMMIT_UNIT_SR_OVE");
1011	}
1012
1013	// ~~~~~[ Interface : "spr_write" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1014	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1015	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1016	{
1017	dest = _name+"_special_register_unit";
1018	#ifdef POSITION
1019	_component->interface_map (src ,"spr_write_" +toString(i)+"_"+toString(j),
1020	dest,"spr_commit_"+toString(i)+"_"+toString(j));
1021	#endif
1022
1023	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_VAL" ,
1024	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_VAL" );
1025	COMPONENT_MAP(_component,src , "in_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_ACK" ,
1026	dest,"out_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_ACK" );
1027	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F_VAL" ,
1028	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F_VAL" );
1029	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_F" ,
1030	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_F" );
1031	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY_VAL",
1032	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY_VAL");
1033	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_CY" ,
1034	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_CY" );
1035	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV_VAL",
1036	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV_VAL");
1037	COMPONENT_MAP(_component,src ,"out_SPR_WRITE_" +toString(i)+"_"+toString(j)+"_SR_OV" ,
1038	dest, "in_SPR_COMMIT_"+toString(i)+"_"+toString(j)+"_SR_OV" );
1039	}
1040
1041	}
1042
1043	// ===================================================================
1044	// =====[ issue_queue ]===============================================
1045	// ===================================================================
1046	{
1047	src = _name+"_issue_queue";
1048	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1049
1050	{
1051	dest = _name;
1052	#ifdef POSITION
1053	_component->interface_map (src ,"",
1054	dest,"");
1055	#endif
1056	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1057	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1058	}
1059
1060	// ~~~~~[ Interface : "issue_in" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1061	for (uint32_t i=0; i<_param->_nb_rename_unit; ++i)
1062	for (uint32_t j=0; j<_param->_nb_inst_insert[i]; j++)
1063	{
1064	dest = _name+"_glue";
1065	#ifdef POSITION
1066	_component->interface_map (src ,"issue_in_"+toString(i)+"_"+toString(j),
1067	dest,"insert_" +toString(i)+"_"+toString(j));
1068	#endif
1069
1070	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_VAL" ,
1071	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_VAL" );
1072	COMPONENT_MAP(_component,src ,"out_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_ACK" ,
1073	dest, "in_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_ACK" );
1074	if (_param->_have_port_context_id)
1075	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_CONTEXT_ID" ,
1076	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_CONTEXT_ID" );
1077	if (_param->_have_port_front_end_id)
1078	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_FRONT_END_ID" ,
1079	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_FRONT_END_ID" );
1080	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_OPERATION" ,
1081	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_OPERATION" );
1082	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_TYPE" ,
1083	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_TYPE" );
1084	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_STORE_QUEUE_PTR_WRITE",
1085	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE");
1086	if (_param->_have_port_load_queue_ptr)
1087	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_LOAD_QUEUE_PTR_WRITE" ,
1088	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE" );
1089	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_HAS_IMMEDIAT" ,
1090	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_HAS_IMMEDIAT" );
1091	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_IMMEDIAT" ,
1092	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_IMMEDIAT" );
1093	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RA" ,
1094	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RA" );
1095	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RA" ,
1096	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RA" );
1097	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RB" ,
1098	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RB" );
1099	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RB" ,
1100	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RB" );
1101	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_READ_RC" ,
1102	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_READ_RC" );
1103	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RC" ,
1104	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RC" );
1105	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_WRITE_RD" ,
1106	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RD" );
1107	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RD" ,
1108	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RD" );
1109	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_WRITE_RE" ,
1110	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_WRITE_RE" );
1111	COMPONENT_MAP(_component,src , "in_ISSUE_IN_"+toString(i)+"_"+toString(j)+ "_NUM_REG_RE" ,
1112	dest,"out_INSERT_" +toString(i)+"_"+toString(j)+"_ISSUE_QUEUE_NUM_REG_RE" );
1113
1114
1115
1116	// in_ISSUE_IN_PACKET_ID - component_commit_unit
1117	}
1118
1119	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1120	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
1121	{
1122	dest = _name+"_reexecute_unit";
1123	#ifdef POSITION
1124	_component->interface_map (src ,"reexecute_"+toString(i),
1125	dest,"reexecute_"+toString(i));
1126	#endif
1127
1128
1129	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_VAL" ,
1130	dest,"out_REEXECUTE_"+toString(i)+"_VAL" );
1131	COMPONENT_MAP(_component,src ,"out_REEXECUTE_"+toString(i)+"_ACK" ,
1132	dest, "in_REEXECUTE_"+toString(i)+"_ACK" );
1133	if (_param->_have_port_front_end_id)
1134	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_FRONT_END_ID" ,
1135	dest,"out_REEXECUTE_"+toString(i)+"_FRONT_END_ID" );
1136	if (_param->_have_port_context_id)
1137	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_CONTEXT_ID" ,
1138	dest,"out_REEXECUTE_"+toString(i)+"_CONTEXT_ID" );
1139	if (_param->_have_port_rob_ptr)
1140	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_PACKET_ID" ,
1141	dest,"out_REEXECUTE_"+toString(i)+"_PACKET_ID" );
1142	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_TYPE" ,
1143	dest,"out_REEXECUTE_"+toString(i)+"_TYPE" );
1144	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_OPERATION" ,
1145	dest,"out_REEXECUTE_"+toString(i)+"_OPERATION" );
1146	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1147	dest,"out_REEXECUTE_"+toString(i)+"_STORE_QUEUE_PTR_WRITE");
1148	if (_param->_have_port_load_queue_ptr)
1149	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1150	dest,"out_REEXECUTE_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
1151	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT" ,
1152	dest,"out_REEXECUTE_"+toString(i)+"_HAS_IMMEDIAT" );
1153	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_IMMEDIAT" ,
1154	dest,"out_REEXECUTE_"+toString(i)+"_IMMEDIAT" );
1155	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RA" ,
1156	dest,"out_REEXECUTE_"+toString(i)+"_READ_RA" );
1157	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RA" ,
1158	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RA" );
1159	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RB" ,
1160	dest,"out_REEXECUTE_"+toString(i)+"_READ_RB" );
1161	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RB" ,
1162	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RB" );
1163	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_READ_RC" ,
1164	dest,"out_REEXECUTE_"+toString(i)+"_READ_RC" );
1165	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RC" ,
1166	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RC" );
1167	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RD" ,
1168	dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RD" );
1169	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RD" ,
1170	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RD" );
1171	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_WRITE_RE" ,
1172	dest,"out_REEXECUTE_"+toString(i)+"_WRITE_RE" );
1173	COMPONENT_MAP(_component,src , "in_REEXECUTE_"+toString(i)+"_NUM_REG_RE" ,
1174	dest,"out_REEXECUTE_"+toString(i)+"_NUM_REG_RE" );
1175	}
1176
1177	// ~~~~~[ Interface : "issue_out" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1178	for (uint32_t i=0; i<_param->_nb_inst_issue; i++)
1179	{
1180	dest = _name;
1181
1182	#ifdef POSITION
1183	_component->interface_map (src ,"issue_out_"+toString(i),
1184	dest,"issue_" +toString(i));
1185	#endif
1186
1187	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_VAL" ,
1188	dest,"out_ISSUE_" +toString(i)+"_VAL" );
1189	PORT_MAP(_component,src , "in_ISSUE_OUT_"+toString(i)+"_ACK" ,
1190	dest, "in_ISSUE_" +toString(i)+"_ACK" );
1191	if (_param->_have_port_front_end_id)
1192	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_FRONT_END_ID" ,
1193	dest,"out_ISSUE_" +toString(i)+"_FRONT_END_ID" );
1194	if (_param->_have_port_context_id)
1195	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_CONTEXT_ID" ,
1196	dest,"out_ISSUE_" +toString(i)+"_CONTEXT_ID" );
1197	if (_param->_have_port_rob_ptr)
1198	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_PACKET_ID" ,
1199	dest,"out_ISSUE_" +toString(i)+"_PACKET_ID" );
1200	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_TYPE" ,
1201	dest,"out_ISSUE_" +toString(i)+"_TYPE" );
1202	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_OPERATION" ,
1203	dest,"out_ISSUE_" +toString(i)+"_OPERATION" );
1204	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_STORE_QUEUE_PTR_WRITE",
1205	dest,"out_ISSUE_" +toString(i)+"_STORE_QUEUE_PTR_WRITE");
1206	if (_param->_have_port_load_queue_ptr)
1207	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_LOAD_QUEUE_PTR_WRITE" ,
1208	dest,"out_ISSUE_" +toString(i)+"_LOAD_QUEUE_PTR_WRITE" );
1209	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_HAS_IMMEDIAT" ,
1210	dest,"out_ISSUE_" +toString(i)+"_HAS_IMMEDIAT" );
1211	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_IMMEDIAT" ,
1212	dest,"out_ISSUE_" +toString(i)+"_IMMEDIAT" );
1213	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RA" ,
1214	dest,"out_ISSUE_" +toString(i)+"_READ_RA" );
1215	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RA" ,
1216	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RA" );
1217	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RB" ,
1218	dest,"out_ISSUE_" +toString(i)+"_READ_RB" );
1219	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RB" ,
1220	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RB" );
1221	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_READ_RC" ,
1222	dest,"out_ISSUE_" +toString(i)+"_READ_RC" );
1223	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RC" ,
1224	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RC" );
1225	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RD" ,
1226	dest,"out_ISSUE_" +toString(i)+"_WRITE_RD" );
1227	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RD" ,
1228	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RD" );
1229	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_WRITE_RE" ,
1230	dest,"out_ISSUE_" +toString(i)+"_WRITE_RE" );
1231	PORT_MAP(_component,src ,"out_ISSUE_OUT_"+toString(i)+"_NUM_REG_RE" ,
1232	dest,"out_ISSUE_" +toString(i)+"_NUM_REG_RE" );
1233	}
1234	}
1235
1236	// ===================================================================
1237	// =====[ reexecute_unit ]============================================
1238	// ===================================================================
1239	{
1240	src = _name+"_reexecute_unit";
1241	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1242
1243	{
1244	dest = _name;
1245	#ifdef POSITION
1246	_component->interface_map (src ,"",
1247	dest,"");
1248	#endif
1249	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1250	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1251	}
1252
1253	// ~~~~~[ Interface "execute_loop" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1254	for (uint32_t i=0; i<_param->_nb_execute_loop; i++)
1255	for (uint32_t j=0; j<_param->_nb_inst_execute[i]; j++)
1256	{
1257	dest = _name;
1258	#ifdef POSITION
1259	_component->interface_map (src ,"execute_loop_"+toString(i)+"_"+toString(j),
1260	dest,"execute_loop_"+toString(i)+"_"+toString(j));
1261	#endif
1262
1263	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL" ,
1264	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_VAL" );
1265	PORT_MAP(_component,src ,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK" ,
1266	dest,"out_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ACK" );
1267	if (_param->_have_port_front_end_id)
1268	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
1269	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
1270	if (_param->_have_port_context_id)
1271	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" ,
1272	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_CONTEXT_ID" );
1273	if (_param->_have_port_rob_ptr)
1274	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID" ,
1275	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_PACKET_ID" );
1276	// PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" ,
1277	// dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_TYPE" );
1278	// PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" ,
1279	// dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_OPERATION" );
1280	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" ,
1281	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_FLAGS" );
1282	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION" ,
1283	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_EXCEPTION" );
1284	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" ,
1285	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_NO_SEQUENCE" );
1286	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS" ,
1287	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_ADDRESS" );
1288	PORT_MAP(_component,src , "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA" ,
1289	dest, "in_EXECUTE_LOOP_"+toString(i)+"_"+toString(j)+"_DATA" );
1290	}
1291
1292	// ~~~~~[ Interface "commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1293	// out_COMMIT_VAL - component_commit_unit
1294	// in_COMMIT_ACK - component_commit_unit
1295	// out_COMMIT_WEN - component_commit_unit
1296	// out_COMMIT_FRONT_END_ID - component_commit_unit
1297	// out_COMMIT_CONTEXT_ID - component_commit_unit
1298	// out_COMMIT_PACKET_ID - component_commit_unit
1299	////out_COMMIT_OPERATION - component_commit_unit
1300	////out_COMMIT_TYPE - component_commit_unit
1301	// out_COMMIT_FLAGS - component_commit_unit
1302	// out_COMMIT_EXCEPTION - component_commit_unit
1303	// out_COMMIT_NO_SEQUENCE - component_commit_unit
1304	// out_COMMIT_ADDRESS - component_commit_unit
1305	// in_COMMIT_NUM_REG_RD - component_commit_unit
1306
1307	// ~~~~~[ Interface : "spr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1308	for (uint32_t i=0; i<_param->_nb_inst_reexecute; i++)
1309	{
1310	dest = _name+"_special_register_unit";
1311	#ifdef POSITION
1312	_component->interface_map (src ,"spr_"+toString(i),
1313	dest,"spr_"+toString(i));
1314	#endif
1315
1316	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_VAL" ,
1317	dest, "in_SPR_ACCESS_"+toString(i)+"_VAL" );
1318	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_ACK" ,
1319	dest,"out_SPR_ACCESS_"+toString(i)+"_ACK" );
1320	if (_param->_have_port_front_end_id)
1321	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_FRONT_END_ID",
1322	dest, "in_SPR_ACCESS_"+toString(i)+"_FRONT_END_ID");
1323	if (_param->_have_port_context_id)
1324	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_CONTEXT_ID" ,
1325	dest, "in_SPR_ACCESS_"+toString(i)+"_CONTEXT_ID" );
1326	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_WEN" ,
1327	dest, "in_SPR_ACCESS_"+toString(i)+"_WEN" );
1328	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_NUM_GROUP" ,
1329	dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_GROUP" );
1330	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_NUM_REG" ,
1331	dest, "in_SPR_ACCESS_"+toString(i)+"_NUM_REG" );
1332	COMPONENT_MAP(_component,src ,"out_SPR_" +toString(i)+"_WDATA" ,
1333	dest, "in_SPR_ACCESS_"+toString(i)+"_WDATA" );
1334	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_RDATA" ,
1335	dest,"out_SPR_ACCESS_"+toString(i)+"_RDATA" );
1336	COMPONENT_MAP(_component,src , "in_SPR_" +toString(i)+"_INVALID" ,
1337	dest,"out_SPR_ACCESS_"+toString(i)+"_INVALID" );
1338	}
1339
1340	// ~~~~~[ Interface : "reexecute_rob" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1341	// in_REEXECUTE_ROB_VAL - component_commit_unit
1342	// out_REEXECUTE_ROB_ACK - component_commit_unit
1343	// in_REEXECUTE_ROB_FRONT_END_ID - component_commit_unit
1344	// in_REEXECUTE_ROB_CONTEXT_ID - component_commit_unit
1345	// in_REEXECUTE_ROB_PACKET_ID - component_commit_unit
1346	// in_REEXECUTE_ROB_OPERATION - component_commit_unit
1347	// in_REEXECUTE_ROB_TYPE - component_commit_unit
1348	// in_REEXECUTE_ROB_STORE_QUEUE_PTR_WRITE - component_commit_unit
1349
1350	// ~~~~~[ Interface : "reexecute" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1351	// out_REEXECUTE_VAL - component_issue_queue
1352	// in_REEXECUTE_ACK - component_issue_queue
1353	// out_REEXECUTE_CONTEXT_ID - component_issue_queue
1354	// out_REEXECUTE_FRONT_END_ID - component_issue_queue
1355	// out_REEXECUTE_PACKET_ID - component_issue_queue
1356	// out_REEXECUTE_OPERATION - component_issue_queue
1357	// out_REEXECUTE_TYPE - component_issue_queue
1358	// out_REEXECUTE_STORE_QUEUE_PTR_WRITE - component_issue_queue
1359	// out_REEXECUTE_LOAD_QUEUE_PTR_WRITE - component_issue_queue
1360	// out_REEXECUTE_HAS_IMMEDIAT - component_issue_queue
1361	// out_REEXECUTE_IMMEDIAT - component_issue_queue
1362	// out_REEXECUTE_READ_RA - component_issue_queue
1363	// out_REEXECUTE_NUM_REG_RA - component_issue_queue
1364	// out_REEXECUTE_READ_RB - component_issue_queue
1365	// out_REEXECUTE_NUM_REG_RB - component_issue_queue
1366	// out_REEXECUTE_READ_RC - component_issue_queue
1367	// out_REEXECUTE_NUM_REG_RC - component_issue_queue
1368	// out_REEXECUTE_WRITE_RD - component_issue_queue
1369	// out_REEXECUTE_NUM_REG_RD - component_issue_queue
1370	// out_REEXECUTE_WRITE_RE - component_issue_queue
1371	// out_REEXECUTE_NUM_REG_RE - component_issue_queue
1372	}
1373
1374	// ===================================================================
1375	// =====[ special_register_unit ]=====================================
1376	// ===================================================================
1377	{
1378	src = _name+"_special_register_unit";
1379	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1380
1381	{
1382	dest = _name;
1383	#ifdef POSITION
1384	_component->interface_map (src ,"",
1385	dest,"");
1386	#endif
1387	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1388	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1389	}
1390
1391	// ~~~~~[ Interface : "spr_access" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1392	// in_SPR_ACCESS_VAL - component_reexecute_unit
1393	// out_SPR_ACCESS_ACK - component_reexecute_unit
1394	// in_SPR_ACCESS_FRONT_END_ID - component_reexecute_unit
1395	// in_SPR_ACCESS_CONTEXT_ID - component_reexecute_unit
1396	// in_SPR_ACCESS_WEN - component_reexecute_unit
1397	// in_SPR_ACCESS_NUM_GROUP - component_reexecute_unit
1398	// in_SPR_ACCESS_NUM_REG - component_reexecute_unit
1399	// in_SPR_ACCESS_WDATA - component_reexecute_unit
1400	// out_SPR_ACCESS_RDATA - component_reexecute_unit
1401	// out_SPR_ACCESS_INVALID - component_reexecute_unit
1402
1403	// ~~~~~[ Interface : "spr_read" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1404	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1405	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1406	{
1407	dest = _name+"_glue";
1408
1409	#ifdef POSITION
1410	_component->interface_map (src ,"spr_read_"+toString(i)+"_"+toString(j),
1411	dest,"spr_" +toString(i)+"_"+toString(j));
1412	#endif
1413
1414	COMPONENT_MAP(_component,src ,"out_SPR_READ_"+toString(i)+"_"+toString(j)+ "_SR",
1415	dest, "in_SPR_" +toString(i)+"_"+toString(j)+"_SPECIAL_REGISTER_UNIT_SR");
1416	}
1417
1418	// ~~~~~[ Interface : "spr_commit" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1419	// in_SPR_COMMIT_VAL - component_commit_unit
1420	// out_SPR_COMMIT_ACK - component_commit_unit
1421	// in_SPR_COMMIT_SR_F_VAL - component_commit_unit
1422	// in_SPR_COMMIT_SR_F - component_commit_unit
1423	// in_SPR_COMMIT_SR_CY_VAL - component_commit_unit
1424	// in_SPR_COMMIT_SR_CY - component_commit_unit
1425	// in_SPR_COMMIT_SR_OV_VAL - component_commit_unit
1426	// in_SPR_COMMIT_SR_OV - component_commit_unit
1427
1428	// ~~~~~[ Interface "spr_event" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1429	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1430	for (uint32_t j=0; j<_param->_nb_context[i]; j++)
1431	{
1432	dest = _name;
1433	#ifdef POSITION
1434	_component->interface_map (src ,"spr_event_"+toString(i)+"_"+toString(j),
1435	dest,"spr_event_"+toString(i)+"_"+toString(j));
1436	#endif
1437
1438	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" ,
1439	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_VAL" );
1440	PORT_MAP(_component,src ,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" ,
1441	dest,"out_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_ACK" );
1442	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR" ,
1443	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EPCR" );
1444	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" ,
1445	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR_WEN" );
1446	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR" ,
1447	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_EEAR" );
1448	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX" ,
1449	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_DSX" );
1450	PORT_MAP(_component,src , "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR",
1451	dest, "in_SPR_EVENT_"+toString(i)+"_"+toString(j)+"_SR_TO_ESR");
1452	}
1453	}
1454
1455	// ===================================================================
1456	// =====[ glue ]======================================================
1457	// ===================================================================
1458	{
1459	src = _name+"_glue";
1460	log_printf(TRACE,OOO_Engine,FUNCTION,_("Instance : %s"),name.c_str());
1461
1462	{
1463	dest = _name;
1464	#ifdef POSITION
1465	_component->interface_map (src ,"",
1466	dest,"");
1467	#endif
1468	PORT_MAP(_component,src , "in_CLOCK" ,dest, "in_CLOCK");
1469	PORT_MAP(_component,src , "in_NRESET",dest, "in_NRESET");
1470	}
1471
1472	// ~~~~~[ Interface : "rename" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1473	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1474	for (uint32_t j=0; j<_param->_nb_inst_decod [i]; j++)
1475	{
1476	dest = _name;
1477	#ifdef POSITION
1478	_component->interface_map (src ,"rename_"+toString(i)+"_"+toString(j),
1479	dest,"rename_"+toString(i)+"_"+toString(j));
1480	#endif
1481
1482	if (_param->_have_port_front_end_id)
1483	PORT_MAP(_component,src , "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID",
1484	dest, "in_RENAME_"+toString(i)+"_"+toString(j)+"_FRONT_END_ID");
1485
1486	// out_RENAME_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1487	}
1488
1489	// ~~~~~[ Interface : "insert" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1490	for (uint32_t i=0; i<_param->_sum_inst_insert; i++)
1491	{
1492	dest = _name;
1493	#ifdef POSITION
1494	_component->interface_map (src ,"insert_"+toString(i),
1495	dest,"insert_"+toString(i));
1496	#endif
1497
1498	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_VAL" ,
1499	dest,"out_INSERT_"+toString(i)+"_VAL" );
1500	PORT_MAP(_component,src , "in_INSERT_"+toString(i)+"_ACK" ,
1501	dest, "in_INSERT_"+toString(i)+"_ACK" );
1502	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_USE" ,
1503	dest,"out_INSERT_"+toString(i)+"_RD_USE" );
1504	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RD_NUM_REG",
1505	dest,"out_INSERT_"+toString(i)+"_RD_NUM_REG");
1506	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_USE" ,
1507	dest,"out_INSERT_"+toString(i)+"_RE_USE" );
1508	PORT_MAP(_component,src ,"out_INSERT_"+toString(i)+"_RE_NUM_REG",
1509	dest,"out_INSERT_"+toString(i)+"_RE_NUM_REG");
1510	}
1511
1512	// in_INSERT_RENAME_UNIT_VAL - component_rename_unit
1513	// out_INSERT_RENAME_UNIT_ACK - component_rename_unit
1514	// in_INSERT_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1515	// in_INSERT_RENAME_UNIT_CONTEXT_ID - component_rename_unit
1516	// in_INSERT_RENAME_UNIT_TYPE - component_rename_unit
1517	// in_INSERT_RENAME_UNIT_OPERATION - component_rename_unit
1518	// in_INSERT_RENAME_UNIT_NO_EXECUTE - component_rename_unit
1519	// in_INSERT_RENAME_UNIT_HAS_IMMEDIAT - component_rename_unit
1520	// in_INSERT_RENAME_UNIT_IMMEDIAT - component_rename_unit
1521	// in_INSERT_RENAME_UNIT_STORE_QUEUE_PTR_WRITE - component_rename_unit
1522	// in_INSERT_RENAME_UNIT_LOAD_QUEUE_PTR_WRITE - component_rename_unit
1523	// in_INSERT_RENAME_UNIT_READ_RA - component_rename_unit
1524	// in_INSERT_RENAME_UNIT_NUM_REG_RA_PHY - component_rename_unit
1525	// in_INSERT_RENAME_UNIT_READ_RB - component_rename_unit
1526	// in_INSERT_RENAME_UNIT_NUM_REG_RB_PHY - component_rename_unit
1527	// in_INSERT_RENAME_UNIT_READ_RC - component_rename_unit
1528	// in_INSERT_RENAME_UNIT_NUM_REG_RC_PHY - component_rename_unit
1529	// in_INSERT_RENAME_UNIT_WRITE_RD - component_rename_unit
1530	// in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_OLD - component_rename_unit
1531	// in_INSERT_RENAME_UNIT_NUM_REG_RD_PHY_NEW - component_rename_unit
1532	// in_INSERT_RENAME_UNIT_WRITE_RE - component_rename_unit
1533	// in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_OLD - component_rename_unit
1534	// in_INSERT_RENAME_UNIT_NUM_REG_RE_PHY_NEW - component_rename_unit
1535	//
1536	// out_INSERT_COMMIT_UNIT_VAL - component_commit_unit
1537	// in_INSERT_COMMIT_UNIT_ACK - component_commit_unit
1538	// out_INSERT_COMMIT_UNIT_FRONT_END_ID - component_commit_unit
1539	// out_INSERT_COMMIT_UNIT_CONTEXT_ID - component_commit_unit
1540	////out_INSERT_COMMIT_UNIT_RENAME_UNIT_ID - component_commit_unit
1541	// out_INSERT_COMMIT_UNIT_TYPE - component_commit_unit
1542	// out_INSERT_COMMIT_UNIT_OPERATION - component_commit_unit
1543	// out_INSERT_COMMIT_UNIT_NO_EXECUTE - component_commit_unit
1544	// out_INSERT_COMMIT_UNIT_STORE_QUEUE_PTR_WRITE - component_commit_unit
1545	// out_INSERT_COMMIT_UNIT_LOAD_QUEUE_PTR_WRITE - component_commit_unit
1546	// out_INSERT_COMMIT_UNIT_READ_RA - component_commit_unit
1547	// out_INSERT_COMMIT_UNIT_NUM_REG_RA_PHY - component_commit_unit
1548	// out_INSERT_COMMIT_UNIT_READ_RB - component_commit_unit
1549	// out_INSERT_COMMIT_UNIT_NUM_REG_RB_PHY - component_commit_unit
1550	// out_INSERT_COMMIT_UNIT_READ_RC - component_commit_unit
1551	// out_INSERT_COMMIT_UNIT_NUM_REG_RC_PHY - component_commit_unit
1552	// out_INSERT_COMMIT_UNIT_WRITE_RD - component_commit_unit
1553	// out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_OLD - component_commit_unit
1554	// out_INSERT_COMMIT_UNIT_NUM_REG_RD_PHY_NEW - component_commit_unit
1555	// out_INSERT_COMMIT_UNIT_WRITE_RE - component_commit_unit
1556	// out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_OLD - component_commit_unit
1557	// out_INSERT_COMMIT_UNIT_NUM_REG_RE_PHY_NEW - component_commit_unit
1558	//
1559	// out_INSERT_ISSUE_QUEUE_VAL - component_issue_queue
1560	// in_INSERT_ISSUE_QUEUE_ACK - component_issue_queue
1561	// out_INSERT_ISSUE_QUEUE_CONTEXT_ID - component_issue_queue
1562	// out_INSERT_ISSUE_QUEUE_FRONT_END_ID - component_issue_queue
1563	// out_INSERT_ISSUE_QUEUE_OPERATION - component_issue_queue
1564	// out_INSERT_ISSUE_QUEUE_TYPE - component_issue_queue
1565	// out_INSERT_ISSUE_QUEUE_STORE_QUEUE_PTR_WRITE - component_issue_queue
1566	// out_INSERT_ISSUE_QUEUE_LOAD_QUEUE_PTR_WRITE - component_issue_queue
1567	// out_INSERT_ISSUE_QUEUE_HAS_IMMEDIAT - component_issue_queue
1568	// out_INSERT_ISSUE_QUEUE_IMMEDIAT - component_issue_queue
1569	// out_INSERT_ISSUE_QUEUE_READ_RA - component_issue_queue
1570	// out_INSERT_ISSUE_QUEUE_NUM_REG_RA - component_issue_queue
1571	// out_INSERT_ISSUE_QUEUE_READ_RB - component_issue_queue
1572	// out_INSERT_ISSUE_QUEUE_NUM_REG_RB - component_issue_queue
1573	// out_INSERT_ISSUE_QUEUE_READ_RC - component_issue_queue
1574	// out_INSERT_ISSUE_QUEUE_NUM_REG_RC - component_issue_queue
1575	// out_INSERT_ISSUE_QUEUE_WRITE_RD - component_issue_queue
1576	// out_INSERT_ISSUE_QUEUE_NUM_REG_RD - component_issue_queue
1577	// out_INSERT_ISSUE_QUEUE_WRITE_RE - component_issue_queue
1578	// out_INSERT_ISSUE_QUEUE_NUM_REG_RE - component_issue_queue
1579
1580	// // ~~~~~[ Interface "retire" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1581	// for (uint32_t i=0; i<_param->_sum_inst_retire; i++)
1582	// {
1583	// dest = _name;
1584	// #ifdef POSITION
1585	// _component->interface_map (src ,"retire_"+toString(i),
1586	// dest,"retire_"+toString(i));
1587	// #endif
1588
1589	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_VAL" ,
1590	// dest,"out_RETIRE_"+toString(i)+"_VAL" );
1591	// PORT_MAP(_component,src , "in_RETIRE_"+toString(i)+"_ACK" ,
1592	// dest, "in_RETIRE_"+toString(i)+"_ACK" );
1593	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_USE" ,
1594	// dest,"out_RETIRE_"+toString(i)+"_RD_OLD_USE" );
1595	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG",
1596	// dest,"out_RETIRE_"+toString(i)+"_RD_OLD_NUM_REG");
1597	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_USE" ,
1598	// dest,"out_RETIRE_"+toString(i)+"_RD_NEW_USE" );
1599	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG",
1600	// dest,"out_RETIRE_"+toString(i)+"_RD_NEW_NUM_REG");
1601	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_USE" ,
1602	// dest,"out_RETIRE_"+toString(i)+"_RE_OLD_USE" );
1603	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG",
1604	// dest,"out_RETIRE_"+toString(i)+"_RE_OLD_NUM_REG");
1605	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_USE" ,
1606	// dest,"out_RETIRE_"+toString(i)+"_RE_NEW_USE" );
1607	// PORT_MAP(_component,src ,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG",
1608	// dest,"out_RETIRE_"+toString(i)+"_RE_NEW_NUM_REG");
1609	// }
1610
1611	// out_RETIRE_RENAME_UNIT_VAL - component_rename_unit
1612	// in_RETIRE_RENAME_UNIT_ACK - component_rename_unit
1613	// out_RETIRE_RENAME_UNIT_FRONT_END_ID - component_rename_unit
1614	// out_RETIRE_RENAME_UNIT_WRITE_RD - component_rename_unit
1615	// out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_OLD - component_rename_unit
1616	// out_RETIRE_RENAME_UNIT_NUM_REG_RD_PHY_NEW - component_rename_unit
1617	// out_RETIRE_RENAME_UNIT_WRITE_RE - component_rename_unit
1618	// out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_OLD - component_rename_unit
1619	// out_RETIRE_RENAME_UNIT_NUM_REG_RE_PHY_NEW - component_rename_unit
1620	// out_RETIRE_RENAME_UNIT_EVENT_STATE - component_rename_unit
1621
1622	// in_RETIRE_COMMIT_UNIT_VAL - component_commit_unit
1623	// out_RETIRE_COMMIT_UNIT_ACK - component_commit_unit
1624	// in_RETIRE_COMMIT_UNIT_FRONT_END_ID - component_commit_unit
1625	// in_RETIRE_COMMIT_UNIT_WRITE_RD - component_commit_unit
1626	// in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_OLD - component_commit_unit
1627	// in_RETIRE_COMMIT_UNIT_NUM_REG_RD_PHY_NEW - component_commit_unit
1628	// in_RETIRE_COMMIT_UNIT_WRITE_RE - component_commit_unit
1629	// in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_OLD - component_commit_unit
1630	// in_RETIRE_COMMIT_UNIT_NUM_REG_RE_PHY_NEW - component_commit_unit
1631	// in_RETIRE_COMMIT_UNIT_EVENT_STATE - component_commit_unit
1632
1633	// ~~~~~[ Interface : "spr_sr" ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1634	for (uint32_t i=0; i<_param->_nb_front_end; i++)
1635	for (uint32_t j=0; j<_param->_nb_context [i]; j++)
1636	{
1637	dest = _name;
1638	#ifdef POSITION
1639	_component->interface_map (src ,"spr_"+toString(i)+"_"+toString(j),
1640	dest,"spr_"+toString(i)+"_"+toString(j));
1641	#endif
1642
1643	PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE",
1644	dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_IEE");
1645	PORT_MAP(_component,src ,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH",
1646	dest,"out_SPR_"+toString(i)+"_"+toString(j)+"_SR_EPH");
1647
1648	// out_SPR_RENAME_UNIT_SR - component_rename_unit
1649	// out_SPR_COMMIT_UNIT_SR_OVE - component_commit_unit
1650	// in_SPR_SPECIAL_REGISTER_UNIT_SR - component_special_register_unit
1651	}
1652
1653
1654	}
1655
1656	// ~~~~~[ Others ]~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
1657	#if DEBUG_OOO_Engine == true
1658	_component->test_map();
1659	#endif
1660
1661	#ifdef POSITION
1662	if (usage_is_set(_usage,USE_POSITION))
1663	_component->generate_file();
1664	#endif
1665
1666	log_end(OOO_Engine,FUNCTION);
1667	};
1668
1669	}; // end namespace ooo_engine
1670	}; // end namespace multi_ooo_engine
1671	}; // end namespace core
1672
1673	}; // end namespace behavioural
1674	}; // end namespace morpheo

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