source: trunk/IPs/systemC/processor/Morpheo/Documentation/fig/MORPHEO_VHDL_methodologie.fig @ 91

Last change on this file since 91 was 91, checked in by rosiere, 15 years ago

Documentation
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File size: 3.9 KB
Line 
1#FIG 3.2
2Landscape
3Center
4Inches
5Letter 
6100.00
7Single
8-2
91200 2
106 900 -2400 2100 -2100
112 4 0 1 0 30 51 -1 20 0.000 0 0 7 0 0 5
12         2100 -2100 900 -2100 900 -2400 2100 -2400 2100 -2100
134 1 0 50 -1 2 8 0.0000 0 105 315 1500 -2250 D\351but\001
14-6
156 825 -1125 2175 -450
161 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1500 -825 600 225 1500 -825 2100 -825
174 0 0 51 -1 0 8 0.0000 0 75 120 1575 -450 ok\001
184 1 0 50 -1 2 8 0.0000 0 75 240 1500 -825 Test\001
194 0 0 51 -1 0 8 0.0000 0 75 120 2025 -975 ko\001
20-6
216 1650 450 2850 900
222 4 0 1 0 11 51 -1 20 0.000 0 0 7 0 0 5
23         2850 900 1650 900 1650 450 2850 450 2850 900
244 1 0 50 -1 2 8 0.0000 0 75 375 2250 825 VHDL\001
254 1 0 50 -1 2 8 0.0000 0 90 615 2250 600 TestBench \001
26-6
271 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1500 -75 600 225 1500 -75 2100 -300
281 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1501 1423 600 225 1501 1423 2101 1198
291 1 0 1 0 14 51 -1 20 0.000 1 0.0000 1500 2175 600 225 1500 2175 2100 1950
301 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 1425 600 225 1575 1425 2175 1200
311 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 2175 600 225 1575 2175 2175 1950
321 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 -75 600 225 1575 -75 2175 -300
331 1 0 1 0 14 60 -1 10 0.000 1 0.0000 1575 -825 600 225 1575 -825 2175 -1050
342 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2
35        3 0 1.00 60.00 120.00
36         1500 150 2250 450
372 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2
38        3 0 1.00 60.00 120.00
39         750 900 1350 1200
402 1 0 1 0 7 50 -1 20 0.000 0 0 -1 1 0 2
41        3 0 1.00 60.00 120.00
42         2250 900 1650 1200
432 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 5
44        3 0 1.00 60.00 120.00
45         900 2175 -150 2175 -150 -1950 1200 -1950 1200 -1800
462 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 5
47        3 0 1.00 60.00 120.00
48         2100 -825 2400 -825 2400 -1950 1800 -1950 1800 -1800
492 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
50        3 0 1.00 60.00 120.00
51         1500 -2100 1500 -1800
522 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
53        3 0 1.00 60.00 120.00
54         1500 -1350 1500 -1050
552 4 0 1 0 11 51 -1 20 0.000 0 0 7 0 0 5
56         2100 -1350 900 -1350 900 -1800 2100 -1800 2100 -1350
572 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
58        3 0 1.00 60.00 120.00
59         1500 -600 1500 -300
602 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
61        3 0 1.00 60.00 120.00
62         900 -75 -150 -75
632 1 0 1 0 7 50 -1 20 0.000 0 0 7 1 0 2
64        3 0 1.00 60.00 120.00
65         1500 150 750 450
662 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 5
67        3 0 1.00 60.00 120.00
68         900 1425 0 1425 0 300 450 300 450 450
692 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
70        3 0 1.00 60.00 120.00
71         1500 1650 1500 1950
722 1 0 1 0 7 50 -1 -1 0.000 0 0 -1 1 0 2
73        3 0 1.00 60.00 120.00
74         1500 2400 1500 2700
752 4 0 1 0 30 51 -1 20 0.000 0 0 7 0 0 5
76         2100 3000 900 3000 900 2700 2100 2700 2100 3000
772 4 0 1 0 11 51 -1 20 0.000 0 0 7 0 0 5
78         1350 900 150 900 150 450 1350 450 1350 900
792 4 0 1 0 30 60 -1 10 0.000 0 0 7 0 0 5
80         2175 -2025 2175 -2325 975 -2325 975 -2025 2175 -2025
812 4 0 1 0 30 60 -1 10 0.000 0 0 7 0 0 5
82         2175 3075 2175 2775 975 2775 975 3075 2175 3075
832 4 0 1 0 11 60 -1 10 0.000 0 0 7 0 0 5
84         2925 975 2925 525 1725 525 1725 975 2925 975
852 4 0 1 0 11 60 -1 10 0.000 0 0 7 0 0 5
86         1425 975 1425 525 225 525 225 975 1425 975
872 4 0 1 0 11 60 -1 10 0.000 0 0 7 0 0 5
88         2175 -1275 2175 -1725 975 -1725 975 -1275 2175 -1275
894 1 0 50 -1 2 8 0.0000 0 105 465 1500 -1425 SystemC\001
904 1 0 50 -1 2 8 0.0000 0 105 450 1500 -1650 Mod\350le \001
914 1 0 50 -1 2 8 0.0000 0 90 600 1500 -150 Contrainte\001
924 1 0 50 -1 2 8 0.0000 0 90 675 1500 75 Performance\001
934 2 0 51 -1 0 8 0.0000 0 75 120 900 -225 ko\001
944 1 0 50 -1 2 8 0.0000 0 75 240 1500 1425 Test\001
954 2 0 51 -1 0 8 0.0000 0 75 120 900 1350 ko\001
964 0 0 51 -1 0 8 0.0000 0 75 120 1575 1800 ok\001
974 0 0 51 -1 0 8 0.0000 0 75 120 1575 2550 ok\001
984 2 0 51 -1 0 8 0.0000 0 75 120 900 2100 ko\001
994 1 0 50 -1 2 8 0.0000 0 90 390 1500 2325 Surface\001
1004 1 0 50 -1 2 8 0.0000 0 90 600 1500 2100 Contrainte\001
1014 1 0 50 -1 2 8 0.0000 0 90 195 1500 2850 Fin\001
1024 1 0 50 -1 2 8 0.0000 0 75 375 750 825 VHDL\001
1034 1 0 50 -1 2 8 0.0000 0 105 450 750 600 Mod\350le \001
1044 1 0 51 -1 0 8 0.0000 0 75 120 1500 300 ok\001
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