source: branches/reconfiguration/modules/vci_mem_cache/caba/test/memcache_cc_test/dspin_memcache_cc_test/caba/metadata/dspin_memcache_cc_test.sd @ 872

Last change on this file since 872 was 872, checked in by cfuguet, 8 years ago

reconf: adding test platform for the vci_mem_cache test mechanisms

  • The goal is to test the recently introduced test mechanisms of the coherence network in the VciMemCache?.
File size: 1.2 KB
Line 
1# -*- python -*-
2# author: Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr>
3
4Module('caba:reconf:dspin_memcache_cc_test',
5        classname = 'soclib::caba::DspinMemcacheCcTest',
6
7        tmpl_parameters = [
8            parameter.Int('M2P_WIDTH'),
9            parameter.Int('P2M_WIDTH')
10        ],
11
12        header_files = [
13            '../source/include/dspin_memcache_cc_test.h'
14        ],
15
16        implementation_files = [
17            '../source/src/dspin_memcache_cc_test.cpp'
18        ],
19
20        uses = [
21            Uses('caba:base_module'),
22            Uses('caba:reconf:dspin_dhccp_param')
23        ],
24
25        ports = [
26            Port('caba:clock_in', 'p_clk', auto='clock'),
27            Port('caba:bit_in', 'p_resetn', auto='resetn'),
28            Port('caba:dspin_output', 'p_dspin_p2m',
29                 dspin_data_size=parameter.Reference('P2M_WIDTH')),
30            Port('caba:dspin_input', 'p_dspin_m2p',
31                 dspin_data_size=parameter.Reference('M2P_WIDTH')),
32            Port('caba:dspin_input', 'p_dspin_clack',
33                 dspin_data_size=parameter.Reference('M2P_WIDTH')),
34        ],
35
36        instance_parameters = [
37
38        ],
39)
40
41# vim: ts=4 : sw=4 : sts=4 : et
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