# -*- python -*-
# author: Cesar Fuguet <cesar.fuguet-tortolero@lip6.fr>

Module('caba:reconf:dspin_memcache_cc_test',
        classname = 'soclib::caba::DspinMemcacheCcTest',

        tmpl_parameters = [
            parameter.Int('M2P_WIDTH'),
            parameter.Int('P2M_WIDTH')
        ],

        header_files = [
            '../source/include/dspin_memcache_cc_test.h'
        ],

        implementation_files = [
            '../source/src/dspin_memcache_cc_test.cpp'
        ],

        uses = [
            Uses('caba:base_module'),
            Uses('caba:reconf:dspin_dhccp_param')
        ],

        ports = [
            Port('caba:clock_in', 'p_clk', auto='clock'),
            Port('caba:bit_in', 'p_resetn', auto='resetn'),
            Port('caba:dspin_output', 'p_dspin_p2m',
                 dspin_data_size=parameter.Reference('P2M_WIDTH')),
            Port('caba:dspin_input', 'p_dspin_m2p',
                 dspin_data_size=parameter.Reference('M2P_WIDTH')),
            Port('caba:dspin_input', 'p_dspin_clack',
                 dspin_data_size=parameter.Reference('M2P_WIDTH')),
        ],

        instance_parameters = [

        ],
)

# vim: ts=4 : sw=4 : sts=4 : et