# -*- python -*- Module('caba:tsar_cluster_mmu', classname = 'soclib::caba::TsarClusterMmu', tmpl_parameters = [ parameter.Module('vci_param', default = 'caba:vci_param'), parameter.Module('iss_t'), parameter.Int('cmd_width'), parameter.Int('rsp_width'), ], header_files = [ '../source/include/tsar_cluster_mmu.h', ], implementation_files = [ '../source/src/tsar_cluster_mmu.cpp', ], uses = [ Uses('caba:base_module'), Uses('common:mapping_table'), Uses('common:iss2'), Uses('caba:vci_cc_vcache_wrapper', iss_t = 'common:gdb_iss', gdb_iss_t = 'common:mips32el'), Uses('caba:vci_mem_cache'), Uses('caba:vci_simple_ram'), Uses('caba:vci_xicu'), Uses('caba:vci_local_crossbar'), Uses('caba:dspin_local_ring_fast_c', ring_cmd_data_size = parameter.Reference('cmd_width'), ring_rsp_data_size = parameter.Reference('rsp_width')), Uses('caba:virtual_dspin_router', flit_width = parameter.Reference('cmd_width')), Uses('caba:virtual_dspin_router', flit_width = parameter.Reference('rsp_width')), Uses('caba:vci_vdspin_target_wrapper', dspin_cmd_width = parameter.Reference('cmd_width'), dspin_rsp_width = parameter.Reference('rsp_width')), Uses('caba:vci_vdspin_initiator_wrapper', dspin_cmd_width = parameter.Reference('cmd_width'), dspin_rsp_width = parameter.Reference('rsp_width')), Uses('caba:vci_multi_tty'), Uses('caba:vci_framebuffer'), Uses('caba:vci_multi_nic'), Uses('caba:vci_block_device_tsar_v4'), Uses('caba:vci_multi_dma'), Uses('common:elf_file_loader'), ], ports = [ Port('caba:bit_in', 'p_resetn', auto = 'resetn'), Port('caba:clock_in', 'p_clk', auto = 'clock'), Port('caba:dspin_output', 'p_cmd_out', [2, 4], dspin_data_size = parameter.Reference('cmd_width')), Port('caba:dspin_input', 'p_cmd_in', [2, 4], dspin_data_size = parameter.Reference('cmd_width')), Port('caba:dspin_output', 'p_rsp_out', [2, 4], dspin_data_size = parameter.Reference('rsp_width')), Port('caba:dspin_input', 'p_rsp_in', [2, 4], dspin_data_size = parameter.Reference('rsp_width')), ], )