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source: trunk/lib/vci_ring_initiator/caba/source/include/vci_ring_initiator.h @ 10

Last change on this file since 10 was 10, checked in by simerabe, 14 years ago
changing broadcast offset on vci_ring_initiator
File size: 23.2 KB

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1	/* SOCLIB_LGPL_HEADER_BEGIN
2	*
3	* This file is part of SoCLib, GNU LGPLv2.1.
4	*
5	* SoCLib is free software; you can redistribute it and/or modify it
6	* under the terms of the GNU Lesser General Public License as published
7	* by the Free Software Foundation; version 2.1 of the License.
8	*
9	* SoCLib is distributed in the hope that it will be useful, but
10	* WITHOUT ANY WARRANTY; without even the implied warranty of
11	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12	* Lesser General Public License for more details.
13	*
14	* You should have received a copy of the GNU Lesser General Public
15	* License along with SoCLib; if not, write to the Free Software
16	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
17	* 02110-1301 USA
18	*
19	* SOCLIB_LGPL_HEADER_END
20	*
21	* Author : Abdelmalek SI MERABET
22	* Date : March 2010
23	* Copyright: UPMC - LIP6
24	*/
25	///////////////////////////////////////////////////////////////////////////////////
26	// Ring : Read Command Packet Format : 2 flits //
27	//---------------------------------------------------------------------------------
28	// 1st flit \| eop \| address* = (X,Y)(10) + OFFSET(28) \|0\|
29	// (40) (1) (38) (1)
30	//---------------------------------------------------------------------------------
31	// 2nd flit \| eop \| res \| srcid \| cmd \| contig \|const \| plen \| pktid \| trdid \|
32	// (39) (1) 5 (14) (2) (1) (1) (8) (4) (4)
33	///////////////////////////////////////////////////////////////////////////////////
34	// Ring : Write Command Packet Format : 2 + N flits //
35	//---------------------------------------------------------------------------------
36	// 1st flit \| eop \| address \|0\|
37	// (40) (1) (38) (1)
38	//---------------------------------------------------------------------------------
39	// 2nd flit \| eop \| res \| srcid \| cmd \| contig \|const \| plen \| pktid \| trdid \|
40	// (40) (1) 3 (14) (2) (1) (1) (8) (4) (4)
41	//---------------------------------------------------------------------------------
42	// next flits \| eop \|res\| be \| wdata \|
43	// (40) (1) (3) (4) (32)
44	///////////////////////////////////////////////////////////////////////////////////
45	// Ring : Read & write Response Packet Format : 1 + N flits //
46	//-----------------------------------------------------------------
47	// 1st flit \| eop \| res \| rsrcid \| rerror \| rpktid \| rtrdid \|
48	// (33) (1) 6 (14) (4) (4) (4)
49	//-----------------------------------------------------------------
50	// next flits \| eop \| data \|
51	// (33) (1) (32)
52	/////////////////////////////////////////////////////////////////////////////////////
53	// Ring : Broadcast : 2 flits //
54	//-----------------------------------------------------------------------------------
55	// 1st flit \| eop \| res \| srcid \| trdid \|xmin \|xmax \|ymin \|ymax \|1\|
56	// (40) (1) 4 (14) (4) (4) (4) (4) (4) (1)
57	//-----------------------------------------------------------------------------------
58	// confinement broadcast : pour 16 clusters
59	// xmin = 0, xmax = F, ymin = 0, ymax = F d'où conf = 0x0F0F
60	//-----------------------------------------------------------------------------------
61	// next flits \| eop \|res\| be \| wdata \|
62	// (40) (1) (3) (4) (32)
63	// next flit \| eop \| res \| nline \|
64	// (40) (1) (5) (34)
65	/////////////////////////////////////////////////////////////////////////////////////
66
67	#include "vci_target.h"
68	#include "generic_fifo.h"
69	#include "mapping_table.h"
70	#include "ring_signals_2.h"
71	#include <systemc.h>
72
73	//#define I_DEBUG
74	//#define IR_DEBUG
75	//#define I_DEBUG_FSM
76
77	namespace soclib { namespace caba {
78
79	using namespace sc_core;
80
81	#ifdef I_DEBUG_FSM
82	namespace {
83	const char *vci_cmd_fsm_state_str_i[] = {
84	"CMD_FIRST_HEADER",
85	"CMD_SECOND_HEADER",
86	"WDATA",
87	};
88	const char *vci_rsp_fsm_state_str_i[] = {
89	"RSP_HEADER",
90	"RSP_DATA",
91	};
92	const char *ring_cmd_fsm_state_str_i[] = {
93	"CMD_IDLE",
94	"DEFAULT",
95	"KEEP",
96	};
97	const char *ring_rsp_fsm_state_str_i[] = {
98	"RSP_IDLE",
99	"LOCAL",
100	"RING",
101	};
102	}
103	#endif
104
105	template<typename vci_param, int ring_cmd_data_size, int ring_rsp_data_size>
106	class VciRingInitiator
107	{
108
109	typedef soclib::caba::VciTarget<vci_param> vci_target_t;
110	typedef RingSignals2 ring_signal_t;
111
112	private:
113	enum vci_cmd_fsm_state_e {
114	CMD_FIRST_HEADER, // first flit for a ring cmd packet (read or write)
115	CMD_SECOND_HEADER, // second flit for a ring cmd packet
116	WDATA, // data flit for a ring cmd write packet
117	};
118
119	enum vci_rsp_fsm_state_e {
120	RSP_HEADER, // first flit for a ring rsp packet (read or write)
121	RSP_DATA, // next flit for a ring rsp packet
122
123	};
124
125	enum ring_rsp_fsm_state_e {
126	RSP_IDLE, // waiting for first flit of a response packet
127	LOCAL, // next flit of a local rsp packet
128	RING, // next flit of a ring rsp packet
129	};
130
131	// cmd token allocation fsm
132	enum ring_cmd_fsm_state_e {
133	CMD_IDLE,
134	DEFAULT,
135	KEEP,
136	};
137
138	// structural parameters
139	bool m_alloc_init;
140	uint32_t m_srcid;
141	std::string m_name;
142
143	// internal registers
144	sc_signal<int> r_ring_cmd_fsm; // ring command packet FSM (distributed)
145	sc_signal<int> r_ring_rsp_fsm; // ring response packet FSM
146	sc_signal<int> r_vci_cmd_fsm; // vci command packet FSM
147	sc_signal<int> r_vci_rsp_fsm; // vci response packet FSM
148
149	sc_signal<bool> r_read_ack; // vci ack if vci cmd read
150
151	sc_signal<sc_uint<vci_param::S> > r_srcid_save;
152	sc_signal<sc_uint<vci_param::T> > r_trdid_save;
153	sc_signal<sc_uint<vci_param::P> > r_pktid_save;
154	sc_signal<sc_uint<vci_param::E> > r_error_save;
155
156	// internal fifos
157	GenericFifo<uint64_t > m_cmd_fifo; // fifo for the local command packet
158	GenericFifo<uint64_t > m_rsp_fifo; // fifo for the local response packet
159
160	// routing table
161	soclib::common::AddressMaskingTable<uint32_t> m_rt;
162	soclib::common::AddressDecodingTable<uint32_t, bool> m_lt;
163
164	bool trace(int sc_time_stamp)
165	{
166	int time_stamp=0;
167	char *ctime_stamp= getenv("FROM_CYCLE");
168
169	if (ctime_stamp) time_stamp=atoi(ctime_stamp);
170
171	return sc_time_stamp >= time_stamp;
172
173	}
174
175	public :
176
177	VciRingInitiator(
178	const char *name,
179	bool alloc_init,
180	const int &wrapper_fifo_depth,
181	const soclib::common::MappingTable &mt,
182	const soclib::common::IntTab &ringid,
183	const uint32_t &srcid)
184	: m_name(name),
185	m_alloc_init(alloc_init),
186	m_cmd_fifo("m_cmd_fifo", wrapper_fifo_depth),
187	m_rsp_fifo("m_rsp_fifo", wrapper_fifo_depth),
188	m_rt(mt.getIdMaskingTable(ringid.level())),
189	m_lt(mt.getIdLocalityTable(ringid)),
190	m_srcid(srcid),
191	r_ring_cmd_fsm("r_ring_cmd_fsm"),
192	r_ring_rsp_fsm("r_ring_rsp_fsm"),
193	r_vci_cmd_fsm("r_vci_cmd_fsm"),
194	r_vci_rsp_fsm("r_vci_rsp_fsm")
195
196	{} // end constructor
197
198	void reset()
199	{
200	if(m_alloc_init)
201	r_ring_cmd_fsm = DEFAULT;
202	else
203	r_ring_cmd_fsm = CMD_IDLE;
204
205	r_vci_cmd_fsm = CMD_FIRST_HEADER;
206	r_vci_rsp_fsm = RSP_HEADER;
207	r_ring_rsp_fsm = RSP_IDLE;
208	m_cmd_fifo.init();
209	m_rsp_fifo.init();
210	}
211
212	void transition(const vci_target_t &p_vci, const ring_signal_t p_ring_in)
213	{
214
215	bool cmd_fifo_get = false;
216	bool cmd_fifo_put = false;
217	uint64_t cmd_fifo_data = 0;
218
219	bool rsp_fifo_get = false;
220	bool rsp_fifo_put = false;
221	uint64_t rsp_fifo_data = 0;
222
223	#ifdef I_DEBUG_FSM
224	std::cout << "--------------------------------------------" << std::endl;
225	std::cout << " vci cmd fsm = " << vci_cmd_fsm_state_str_i[r_vci_cmd_fsm] << std::endl
226	<< " vci rsp fsm = " << vci_rsp_fsm_state_str_i[r_vci_rsp_fsm] << std::endl
227	<< " ring cmd fsm = " << ring_cmd_fsm_state_str_i[r_ring_cmd_fsm] << std::endl
228	<< " ring rsp fsm = " << ring_rsp_fsm_state_str_i[r_ring_rsp_fsm] << std::endl;
229	#endif
230	//////////// VCI CMD FSM /////////////////////////
231	switch ( r_vci_cmd_fsm )
232	{
233	case CMD_FIRST_HEADER:
234	if ( p_vci.cmdval.read() )
235	{
236	#ifdef I_DEBUG
237	if( trace(sc_time_stamp()))
238	std::cout << sc_time_stamp() << " -- " << m_name
239	<< " -- r_vci_cmd_fsm -- CMD_FIRST_HEADER "
240	<< " -- vci_cmdval : " << p_vci.cmdval.read()
241	<< " -- vci_address : " << std::hex << p_vci.address.read()
242	<< " -- vci_srcid : " << p_vci.srcid.read()
243	<< " -- fifo_wok : " << m_cmd_fifo.wok()
244	<< std::endl;
245	#endif
246	cmd_fifo_data = (uint64_t) ((p_vci.address.read() >> 2) << 1);
247	r_read_ack = p_vci.eop.read()
248	&& ((p_vci.cmd.read() == vci_param::CMD_READ)
249	\|\| (p_vci.cmd.read() == vci_param::CMD_LOCKED_READ));
250
251	if(m_cmd_fifo.wok())
252	{
253	cmd_fifo_put = true;
254
255	// test sur broadcast
256	if ((p_vci.address.read() & 0x3) == 0x3)
257	{
258	#ifdef I_DEBUG
259	if( trace(sc_time_stamp()))
260	std::cout << sc_time_stamp() << " -- " << m_name << " -- " << " broadcast " << std::endl;
261	#endif
262	cmd_fifo_data = cmd_fifo_data \| ((uint64_t) 0x1) \|
263	(((uint64_t) 0x0F0F) << 1) \|
264	(((uint64_t) p_vci.srcid.read()) << 21) \|
265	(((uint64_t) (p_vci.trdid.read() & 0xF)) << 17);
266
267	r_vci_cmd_fsm = WDATA;
268
269	}
270	else
271	{
272	r_vci_cmd_fsm = CMD_SECOND_HEADER;
273
274	}
275	} // end fifo wok
276
277
278	} // end if cmdval
279	break;
280
281	case CMD_SECOND_HEADER:
282
283
284	if ( p_vci.cmdval.read() && m_cmd_fifo.wok() )
285	{
286	#ifdef I_DEBUG
287	if( trace(sc_time_stamp()))
288	std::cout << sc_time_stamp() << " -- " << m_name
289	<< " -- r_vci_cmd_fsm -- CMD_SECOND_HEADER "
290	<< " -- vci_cmdval : " << p_vci.cmdval.read()
291	<< " -- fifo_wok : " << m_cmd_fifo.wok()
292	<< " -- vci_cmd : " << std::hex << p_vci.cmd.read()
293	<< " -- vci_plen : " << p_vci.plen.read()
294	<< std::endl;
295	#endif
296	cmd_fifo_put = true;
297	cmd_fifo_data = (((uint64_t) p_vci.srcid.read()) << 20)\|
298	(((uint64_t) (p_vci.cmd.read() & 0x3)) << 18) \|
299	(((uint64_t) (p_vci.plen.read() & 0xFF)) << 8) \|
300	(((uint64_t) (p_vci.pktid.read() & 0xF)) << 4) \|
301	(uint64_t) (p_vci.trdid.read() & 0xF);
302	if (p_vci.contig == true)
303	cmd_fifo_data = cmd_fifo_data \| ((uint64_t) 0x1) << 17;
304	if (p_vci.cons == true)
305	cmd_fifo_data = cmd_fifo_data \| ((uint64_t) 0x1) << 16;
306	if(r_read_ack)
307	{
308	cmd_fifo_data = cmd_fifo_data \| (((uint64_t) 0x1) << (ring_cmd_data_size-1)); //39
309	r_vci_cmd_fsm = CMD_FIRST_HEADER;
310	}
311	else // write command
312	{
313	r_vci_cmd_fsm = WDATA;
314	}
315	} // endif cmdval
316	break;
317
318	case WDATA:
319
320
321	if ( p_vci.cmdval.read() && m_cmd_fifo.wok() )
322	{
323	#ifdef I_DEBUG
324	if( trace(sc_time_stamp()))
325	std::cout << sc_time_stamp() << " -- " << m_name
326	<< " -- r_vci_cmd_fsm -- WDATA "
327	<< " -- vci_cmdval : " << p_vci.cmdval.read()
328	<< " -- fifo_wok : " << m_cmd_fifo.wok()
329	<< " -- vci_wdata : " << std::hex << p_vci.wdata.read()
330	<< " -- vci_be : " << p_vci.be.read()
331	<< " -- vci_eop : " << p_vci.eop.read()
332	<< std::endl;
333	#endif
334
335
336	cmd_fifo_put = true;
337	cmd_fifo_data = ((uint64_t) p_vci.wdata.read()) \| (((uint64_t) p_vci.be.read()) << 32);
338	if ( p_vci.eop.read() == true )
339	{
340	r_vci_cmd_fsm = CMD_FIRST_HEADER;
341	cmd_fifo_data = cmd_fifo_data \| (((uint64_t) 0x1) << (ring_cmd_data_size-1)); //39
342	}
343	else
344	r_vci_cmd_fsm = WDATA;
345	} // end if cmdval
346	break;
347
348	} // end switch r_vci_cmd_fsm
349
350	/////////// VCI RSP FSM /////////////////////////
351	switch ( r_vci_rsp_fsm )
352	{
353	case RSP_HEADER:
354
355	if ( m_rsp_fifo.rok() )
356	{
357
358	#ifdef I_DEBUG
359	if( trace(sc_time_stamp()))
360	std::cout << sc_time_stamp() << " -- " << m_name
361	<< " -- r_vci_rsp_fsm -- RSP_HEADER "
362	<< " -- fifo_rsp_rok : " << m_rsp_fifo.rok()
363	<< std::endl;
364	#endif
365	rsp_fifo_get = true;
366	r_srcid_save = ((sc_uint<vci_param::S>) m_rsp_fifo.read()) >> 12;
367	r_trdid_save = (sc_uint<vci_param::T>) (m_rsp_fifo.read() & 0xF);
368	r_pktid_save = (((sc_uint<vci_param::P>) m_rsp_fifo.read()) >> 4) & 0xF;
369	r_error_save = (((sc_uint<vci_param::E>) m_rsp_fifo.read()) >> 8) & 0x1;
370	r_vci_rsp_fsm = RSP_DATA;
371	}
372	break;
373
374	case RSP_DATA:
375
376	if ( p_vci.rspack.read() && m_rsp_fifo.rok() )
377	{
378	#ifdef I_DEBUG
379	if( trace(sc_time_stamp()))
380	std::cout << sc_time_stamp() << " -- " << m_name
381	<< " -- r_vci_rsp_fsm -- RSP_DATA "
382	<< " -- rsrcid : " << std::hex << r_srcid_save.read()
383	<< " -- rdata : " << m_rsp_fifo.read()
384	<< " -- rerror : " << r_error_save.read()
385	<< std::endl;
386	#endif
387	rsp_fifo_get = true;
388	if(((m_rsp_fifo.read() >> 32) & 0x1) == 0x1)
389	r_vci_rsp_fsm = RSP_HEADER;
390	} // endif rspack && rok
391	break;
392
393	} // end switch r_vci_rsp_fsm
394
395	//////////// RING CMD FSM /////////////////////////
396	switch( r_ring_cmd_fsm )
397	{
398	case CMD_IDLE:
399	#ifdef IR_DEBUG
400	if( trace(sc_time_stamp()))
401	std::cout << sc_time_stamp() << " -- " << m_name << " -- r_ring_cmd_fsm : CMD_IDLE "
402	<< " -- fifo ROK : " << m_cmd_fifo.rok()
403	<< " -- in grant : " << p_ring_in.cmd_grant
404	<< " -- fifo _data : " << std::hex << m_cmd_fifo.read()
405	<< std::endl;
406
407	#endif
408
409	if ( p_ring_in.cmd_grant && m_cmd_fifo.rok() )
410	{
411	// debug above is here
412	r_ring_cmd_fsm = KEEP;
413	}
414	break;
415
416	case DEFAULT:
417	#ifdef IR_DEBUG
418	if( trace(sc_time_stamp()))
419	std::cout << sc_time_stamp() << " -- " << m_name << " -- r_ring_cmd_fsm : DEFAULT "
420	<< " -- fifo ROK : " << m_cmd_fifo.rok()
421	<< " -- in grant : " << p_ring_in.cmd_grant
422	<< " -- fifo _data : " << std::hex << m_cmd_fifo.read()
423	<< std::endl;
424
425	#endif
426
427
428	if ( m_cmd_fifo.rok() )
429	{
430	// debug above is here
431	cmd_fifo_get = p_ring_in.cmd_r;
432	r_ring_cmd_fsm = KEEP;
433	}
434	else if ( !p_ring_in.cmd_grant )
435	r_ring_cmd_fsm = CMD_IDLE;
436	break;
437
438	case KEEP:
439	#ifdef IR_DEBUG
440	if( trace(sc_time_stamp()))
441	std::cout << sc_time_stamp() << " -- " << m_name
442	<< " -- r_ring_cmd_fsm : KEEP "
443	<< " -- fifo_rok : " << m_cmd_fifo.rok()
444	<< " -- in grant : " << p_ring_in.cmd_grant
445	<< " -- ring_in_wok : " << p_ring_in.cmd_r
446	<< " -- fifo_out_data : " << std::hex << m_cmd_fifo.read()
447	<< std::endl;
448	#endif
449
450	if(m_cmd_fifo.rok() && p_ring_in.cmd_r )
451	{
452	// debug above is here
453	cmd_fifo_get = true;
454	if (((int) (m_cmd_fifo.read() >> (ring_cmd_data_size - 1) ) & 0x1) == 1) // 39
455	{
456	if ( p_ring_in.cmd_grant )
457	r_ring_cmd_fsm = DEFAULT;
458	else
459	r_ring_cmd_fsm = CMD_IDLE;
460	}
461	}
462	break;
463
464	} // end switch ring cmd fsm
465
466	/////////// RING RSP FSM ////////////////////////
467
468	switch( r_ring_rsp_fsm )
469	{
470	case RSP_IDLE:
471	{
472	int rsrcid = (int) ((p_ring_in.rsp_data >> 12) & 0x3FFF);
473	bool islocal = m_lt[rsrcid] && (m_rt[rsrcid] == m_srcid);
474	bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
475	#ifdef IR_DEBUG
476	if( trace(sc_time_stamp()))
477	std::cout << sc_time_stamp() << " -- " << m_name
478	<< " -- ring_rsp_fsm -- RSP_IDLE "
479	<< " -- islocal : " << islocal
480	<< " -- eop : " << reop
481	<< " -- rsrcid : " << std::hex << rsrcid
482	<< " -- in rok : " << p_ring_in.rsp_w
483	<< " -- in wok : " << p_ring_in.rsp_r
484	<< " -- fifo wok : " << m_rsp_fifo.wok()
485	<< std::endl;
486	#endif
487	if (p_ring_in.rsp_w && !reop && islocal)
488	{
489	r_ring_rsp_fsm = LOCAL;
490	rsp_fifo_put = m_rsp_fifo.wok();
491	rsp_fifo_data = p_ring_in.rsp_data;
492	}
493	if (p_ring_in.rsp_w && !reop && !islocal)
494	{
495	r_ring_rsp_fsm = RING;
496	}
497	if (!p_ring_in.rsp_w \|\| reop )
498	{
499	r_ring_rsp_fsm = RSP_IDLE;
500	}
501	}
502	break;
503
504	case LOCAL:
505	{
506	bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
507
508	#ifdef IR_DEBUG
509	if( trace(sc_time_stamp()))
510	std::cout << sc_time_stamp() << " -- " << m_name
511	<< " -- ring_rsp_fsm -- LOCAL "
512	<< " -- in rok : " << p_ring_in.rsp_w
513	<< " -- fifo wok : " << m_rsp_fifo.wok()
514	<< " -- in data : " << std::hex << p_ring_in.rsp_data
515	<< " -- eop : " << reop
516	<< std::endl;
517	#endif
518
519
520	if (p_ring_in.rsp_w && m_rsp_fifo.wok() && reop)
521	{
522
523	rsp_fifo_put = true;
524	rsp_fifo_data = p_ring_in.rsp_data;
525	r_ring_rsp_fsm = RSP_IDLE;
526	}
527	if (!p_ring_in.rsp_w \|\| !m_rsp_fifo.wok() \|\| !reop)
528	{
529
530	rsp_fifo_put = p_ring_in.rsp_w && m_rsp_fifo.wok();
531	rsp_fifo_data = p_ring_in.rsp_data;
532	r_ring_rsp_fsm = LOCAL;
533	}
534	}
535	break;
536
537	case RING:
538	{
539	bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
540
541	#ifdef IR_DEBUG
542	if( trace(sc_time_stamp()))
543	std::cout << sc_time_stamp() << " -- " << m_name
544	<< " -- ring_rsp_fsm -- RING "
545	<< " -- in rok : " << p_ring_in.rsp_w
546	<< " -- in wok : " << p_ring_in.rsp_r
547	<< " -- in data : " << std::hex << p_ring_in.rsp_data
548	<< " -- eop : " << reop
549	<< std::endl;
550	#endif
551
552
553	if (p_ring_in.rsp_w && reop)
554	{
555	r_ring_rsp_fsm = RSP_IDLE;
556	}
557	else
558	{
559	r_ring_rsp_fsm = RING;
560	}
561	}
562	break;
563
564	} // end switch rsp fsm
565
566	////////////////////////
567	// fifos update //
568	////////////////////////
569
570	// local cmd fifo update
571	if ( cmd_fifo_put && cmd_fifo_get ) m_cmd_fifo.put_and_get(cmd_fifo_data);
572	else if ( cmd_fifo_put && !cmd_fifo_get ) m_cmd_fifo.simple_put(cmd_fifo_data);
573	else if ( !cmd_fifo_put && cmd_fifo_get ) m_cmd_fifo.simple_get();
574
575	// local rsp fifo update
576	if ( rsp_fifo_put && rsp_fifo_get ) m_rsp_fifo.put_and_get(rsp_fifo_data);
577	else if ( rsp_fifo_put && !rsp_fifo_get ) m_rsp_fifo.simple_put(rsp_fifo_data);
578	else if ( !rsp_fifo_put && rsp_fifo_get ) m_rsp_fifo.simple_get();
579
580	} // end Transition()
581
582	///////////////////////////////////////////////////////////////////
583	void genMoore(vci_target_t &p_vci)
584	///////////////////////////////////////////////////////////////////
585	{
586
587	switch ( r_vci_cmd_fsm )
588	{
589	case CMD_FIRST_HEADER:
590	p_vci.cmdack = false;
591	break;
592
593	case CMD_SECOND_HEADER:
594	p_vci.cmdack = r_read_ack;
595	break;
596
597	case WDATA:
598	p_vci.cmdack = m_cmd_fifo.wok();
599	break;
600
601	} // end switch fsm
602
603	switch ( r_vci_rsp_fsm )
604	{
605	case RSP_HEADER:
606	p_vci.rspval = false;
607	break;
608
609	case RSP_DATA:
610	p_vci.rspval = m_rsp_fifo.rok();
611	p_vci.rsrcid = r_srcid_save;
612	p_vci.rtrdid = r_trdid_save;
613	p_vci.rpktid = r_pktid_save;
614	p_vci.rerror = r_error_save;
615	p_vci.rdata = (sc_uint<32>) (m_rsp_fifo.read());
616	if (((m_rsp_fifo.read() >> 32) & 0x1) == 0x1)
617	p_vci.reop = true;
618	else
619	p_vci.reop = false;
620	break;
621
622	} // end switch fsm
623	} // end genMoore
624
625	///////////////////////////////////////////////////////////////////
626	void update_ring_signals(ring_signal_t p_ring_in, ring_signal_t &p_ring_out)
627	///////////////////////////////////////////////////////////////////
628	{
629	switch( r_ring_cmd_fsm )
630	{
631	case CMD_IDLE:
632	p_ring_out.cmd_grant = p_ring_in.cmd_grant && !m_cmd_fifo.rok();
633
634	p_ring_out.cmd_r = p_ring_in.cmd_r;
635
636	p_ring_out.cmd_w = p_ring_in.cmd_w;
637	p_ring_out.cmd_data = p_ring_in.cmd_data;
638	break;
639
640	case DEFAULT:
641	p_ring_out.cmd_grant = !( m_cmd_fifo.rok());
642
643	p_ring_out.cmd_r = 1;
644
645	p_ring_out.cmd_w = m_cmd_fifo.rok();
646	p_ring_out.cmd_data = m_cmd_fifo.read();
647	break;
648
649	case KEEP:
650	int cmd_fifo_eop = (int) ((m_cmd_fifo.read() >> (ring_cmd_data_size - 1)) & 0x1) ; //39
651	p_ring_out.cmd_grant = m_cmd_fifo.rok() && p_ring_in.cmd_r && (cmd_fifo_eop == 1);
652
653	p_ring_out.cmd_r = 1;
654
655	p_ring_out.cmd_w = m_cmd_fifo.rok();
656	p_ring_out.cmd_data = m_cmd_fifo.read();
657	break;
658
659	} // end switch
660
661	p_ring_out.rsp_grant = p_ring_in.rsp_grant;
662
663	p_ring_out.rsp_w = p_ring_in.rsp_w;
664	p_ring_out.rsp_data = p_ring_in.rsp_data;
665
666	switch( r_ring_rsp_fsm )
667	{
668	case RSP_IDLE:
669	{
670	int rsrcid = (int) ((p_ring_in.rsp_data >> 12 ) & 0x3FFF);
671	bool islocal = m_lt[rsrcid] && (m_rt[rsrcid] == m_srcid);
672	bool reop = ((p_ring_in.rsp_data >> (ring_rsp_data_size - 1)) & 0x1) == 1;
673
674	if(p_ring_in.rsp_w && !reop && islocal) {
675	p_ring_out.rsp_r = m_rsp_fifo.wok();
676	}
677	if(p_ring_in.rsp_w && !reop && !islocal) {
678	p_ring_out.rsp_r = p_ring_in.rsp_r;
679	}
680	if(!p_ring_in.rsp_w \|\| reop) {
681	p_ring_out.rsp_r = p_ring_in.rsp_r;
682	}
683
684	}
685	break;
686
687	case LOCAL:
688	p_ring_out.rsp_r = m_rsp_fifo.wok();
689	break;
690
691	case RING:
692	p_ring_out.rsp_r = p_ring_in.rsp_r;
693	break;
694	} // end switch
695
696
697	} // end update_ring_signals
698
699	};
700
701	}} // end namespace
702
703

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