source: trunk/modules/vci_block_device_tsar/caba/source/include/vci_block_device_tsar.h @ 514

Last change on this file since 514 was 514, checked in by meunier, 9 years ago

More memory cleaning for valgrind (generic_llsc_global_table, vci_block_device_tsar)

File size: 9.1 KB
Line 
1
2/* -*- c++ -*-
3 *
4 * SOCLIB_LGPL_HEADER_BEGIN
5 *
6 * This file is part of SoCLib, GNU LGPLv2.1.
7 *
8 * SoCLib is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU Lesser General Public License as published
10 * by the Free Software Foundation; version 2.1 of the License.
11 *
12 * SoCLib is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with SoCLib; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 * SOCLIB_LGPL_HEADER_END
23 *
24 * Copyright (c) UPMC, Lip6, Asim
25 *         alain.greiner@lip6.fr april 2011
26 *
27 * Maintainers: alain
28 */
29
30//////////////////////////////////////////////////////////////////////////////////////
31// This component is a simplified disk controller with a VCI interface.
32// It supports only 32 or 64 bits VCI DATA width, but all addressable registers
33// contain 32 bits words. It supports VCI addresss lartger than 32 bits.
34//
35// This component can perform data transfers between one single file belonging
36// to the host system and a buffer in the memory of the virtual prototype.
37// The file name is an argument of the constructor.
38// This component has a DMA capability, and is both a target and an initiator.
39// The block size (bytes), and the burst size (bytes) must be power of 2.
40// The burst size is typically a cache line.
41// The memory buffer is not constrained to be aligned on a burst boundary,
42// but must be aligned on a 32 bits word boundary.
43// Both read and write transfers are supported. An IRQ is optionally
44// asserted when the transfer is completed.
45//
46// As a target this block device controler contains 9 32 bits memory mapped registers,
47// taking 36 bytes in the address space.
48// - BLOCK_DEVICE_BUFFER        0x00 (read/write)  Memory buffer base address (LSB bits)
49// - BLOCK_DEVICE_COUNT         0x04 (read/write)  Number of blocks to be transfered.
50// - BLOCK_DEVICE_LBA           0x08 (read/write)  Index of first block in the file.
51// - BLOCK_DEVICE_OP            0x0C (write-only)  Writing here starts the operation.
52// - BLOCK_DEVICE_STATUS        0x10 (read-only)   Block Device status.
53// - BLOCK_DEVICE_IRQ_ENABLE    0x14 (read/write)  IRQ enabled if non zero.
54// - BLOCK_DEVICE_SIZE          0x18 (read-only)   Number of addressable blocks.
55// - BLOCK_DEVICE_BLOCK_SIZE    0x1C (read_only)   Block size in bytes.
56// - BLOCK_DEVICE_BUFFER_EXT    0x20 (read_only)   Memory buffer base address (MSB bits)
57//
58// The following operations codes are supported:
59// - BLOCK_DEVICE_NOOP          No operation
60// - BLOCK_DEVICE_READ          From block device to memory
61// - BLOCK_DEVICE_WRITE         From memory to block device
62//
63// The BLOCK_DEVICE_STATUS is actually defined by the initiator FSM state.
64// The following values are defined for device status:
65// -BLOCK_DEVICE_IDLE           0
66// -BLOCK_DEVICE_BUSY           1
67// -BLOCK_DEVICE_READ_SUCCESS   2
68// -BLOCK_DEVICE_WRITE_SUCCESS  3
69// -BLOCK_DEVICE_READ_ERROR     4
70// -BLOCK_DEVICE_WRITE_ERROR    5
71//
72// In the 4 states READ_ERROR, READ_SUCCESS, WRITE_ERROR, WRITE_SUCCESS,
73// the IRQ is asserted (if it is enabled).
74// A read access to the BLOCK_DEVICE_STATUS in these 4 states reset
75// the initiator FSM state to IDLE, and acknowledge the IRQ.
76// Any write access to registers BUFFER, COUNT, LBA, OP is ignored
77// if the device is not IDLE.
78///////////////////////////////////////////////////////////////////////////
79
80#ifndef SOCLIB_VCI_BLOCK_DEVICE_TSAR_H
81#define SOCLIB_VCI_BLOCK_DEVICE_TSAR_H
82
83#include <stdint.h>
84#include <systemc>
85#include <unistd.h>
86#include "caba_base_module.h"
87#include "mapping_table.h"
88#include "vci_initiator.h"
89#include "vci_target.h"
90
91namespace soclib {
92namespace caba {
93
94using namespace sc_core;
95
96template<typename vci_param>
97class VciBlockDeviceTsar
98        : public caba::BaseModule
99{
100private:
101
102    // Registers
103    sc_signal<int>                     r_target_fsm;       // target fsm state register
104    sc_signal<int>                     r_initiator_fsm;    // initiator fsm state register
105    sc_signal<bool>                    r_irq_enable;       // default value is true
106    sc_signal<uint32_t>                r_nblocks;          // number of blocks in transfer
107    sc_signal<uint64_t>                r_buf_address;      // memory buffer address
108    sc_signal<uint32_t>                r_lba;              // first block index
109    sc_signal<bool>                    r_read;             // requested operation
110    sc_signal<uint32_t>                r_index;            // word index in local buffer
111    sc_signal<uint32_t>                r_latency_count;    // latency counter
112    sc_signal<uint32_t>                r_words_count;      // word counter (in a burst)
113    sc_signal<uint32_t>                r_burst_count;      // burst counter (in a block)
114    sc_signal<uint32_t>                r_block_count;      // block counter (in a transfer)
115    sc_signal<uint32_t>                r_burst_offset;     // number of non aligned words
116    sc_signal<uint32_t>                r_burst_nwords;     // number of words in a burst
117    sc_signal<bool>                    r_go;               // command from T_FSM to M_FSM
118
119    sc_signal<sc_dt::sc_uint<vci_param::S> >    r_srcid;   // save srcid
120    sc_signal<sc_dt::sc_uint<vci_param::T> >    r_trdid;   // save trdid
121    sc_signal<sc_dt::sc_uint<vci_param::P> >    r_pktid;   // save pktid
122
123    uint32_t*                          r_local_buffer;     // capacity is one block
124
125    // structural parameters
126    std::list<soclib::common::Segment> m_seglist;
127    uint32_t                           m_srcid;            // initiator index
128    int                                m_fd;               // File descriptor
129    uint64_t                           m_device_size;      // Total number of blocks
130    const uint32_t                     m_words_per_block;  // number of words in a block
131    const uint32_t                     m_words_per_burst;  // number of words in a burst
132    const uint32_t                     m_bursts_per_block; // number of bursts in a block
133    const uint32_t                     m_latency;          // device latency
134
135    // methods
136    void transition();
137    void genMoore();
138
139    //  Master FSM states
140    enum {
141    M_IDLE              = 0,
142
143    M_READ_BLOCK        = 1,
144    M_READ_BURST        = 2,
145    M_READ_CMD          = 3,
146    M_READ_RSP          = 4,
147    M_READ_SUCCESS      = 5,
148    M_READ_ERROR        = 6,
149
150    M_WRITE_BURST       = 7,
151    M_WRITE_CMD         = 8,
152    M_WRITE_RSP         = 9,
153    M_WRITE_BLOCK       = 10,
154    M_WRITE_SUCCESS     = 11,
155    M_WRITE_ERROR       = 12,
156    };
157
158    // Target FSM states
159    enum {
160    T_IDLE              = 0,
161    T_WRITE_BUFFER      = 1,
162    T_READ_BUFFER       = 2,
163    T_WRITE_BUFFER_EXT  = 3,
164    T_READ_BUFFER_EXT   = 4,
165    T_WRITE_COUNT       = 5,
166    T_READ_COUNT        = 6,
167    T_WRITE_LBA         = 7,
168    T_READ_LBA          = 8,
169    T_WRITE_OP          = 9,
170    T_READ_STATUS       = 10,
171    T_WRITE_IRQEN       = 11,
172    T_READ_IRQEN        = 12,
173    T_READ_SIZE         = 13,
174    T_READ_BLOCK        = 14,
175    T_READ_ERROR        = 15,
176    T_WRITE_ERROR       = 16,
177    };
178
179    // Error codes values
180    enum {
181    VCI_READ_OK         = 0,
182    VCI_READ_ERROR      = 1,
183    VCI_WRITE_OK        = 2,
184    VCI_WRITE_ERROR     = 3,
185    };
186
187    /* transaction type, pktid field */
188    enum transaction_type_e
189    {
190      // b3 unused
191      // b2 READ / NOT READ
192      // Si READ
193      //  b1 DATA / INS
194      //  b0 UNC / MISS
195      // Si NOT READ
196      //  b1 accÚs table llsc type SW / other
197      //  b2 WRITE/CAS/LL/SC
198      TYPE_READ_DATA_UNC          = 0x0,
199      TYPE_READ_DATA_MISS         = 0x1,
200      TYPE_READ_INS_UNC           = 0x2,
201      TYPE_READ_INS_MISS          = 0x3,
202      TYPE_WRITE                  = 0x4,
203      TYPE_CAS                    = 0x5,
204      TYPE_LL                     = 0x6,
205      TYPE_SC                     = 0x7
206    };
207
208protected:
209
210    SC_HAS_PROCESS(VciBlockDeviceTsar);
211
212public:
213
214    // ports
215    sc_in<bool>                                               p_clk;
216    sc_in<bool>                                               p_resetn;
217    soclib::caba::VciInitiator<vci_param> p_vci_initiator;
218    soclib::caba::VciTarget<vci_param>    p_vci_target;
219    sc_out<bool>                                              p_irq;
220
221    void print_trace();
222
223    // Constructor   
224    VciBlockDeviceTsar(
225                sc_module_name                      name,
226                const soclib::common::MappingTable      &mt,
227                const soclib::common::IntTab            &srcid,
228                const soclib::common::IntTab            &tgtid,
229        const std::string                   &filename,
230        const uint32_t                      block_size = 512,
231        const uint32_t                      burst_size = 64,
232        const uint32_t                      latency = 0);
233
234    ~VciBlockDeviceTsar();
235
236};
237
238}}
239
240#endif /* SOCLIB_VCI_BLOCK_DEVICE_TSAR_H */
241
242// Local Variables:
243// tab-width: 4
244// c-basic-offset: 4
245// c-file-offsets:((innamespace . 0)(inline-open . 0))
246// indent-tabs-mode: nil
247// End:
248
249// vim: filetype=cpp:expandtab:shiftwidth=4:tabstop=4:softtabstop=4
250
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