# -*- python -*- Module('caba:tsarv4_cluster_xbar', classname = 'soclib::caba::TsarV4ClusterXbar', tmpl_parameters = [ parameter.Module('vci_param', default = 'caba:vci_param'), parameter.Module('iss_t'), parameter.Int('cmd_width'), parameter.Int('rsp_width'), ], header_files = [ '../source/include/tsarv4_cluster_xbar.h', ], implementation_files = [ '../source/src/tsarv4_cluster_xbar.cpp', ], uses = [ Uses('caba:base_module'), Uses('common:mapping_table'), Uses('common:iss2'), Uses('config:config'), Uses('caba:vci_cc_vcache_wrapper2_v1', iss_t = 'common:mips32el'), #Uses('caba:vci_cc_xcache_wrapper_v4', iss_t = 'common:gdb_iss', gdb_iss_t = 'common:mips32el'), #Uses('caba:vci_mem_cache_v4'), Uses('caba:vci_mem_cache_v3'), Uses('caba:vci_simple_ram'), Uses('caba:vci_xicu'), Uses('caba:vci_local_crossbar'), Uses('caba:virtual_dspin_router', flit_width = parameter.Reference('cmd_width')), Uses('caba:virtual_dspin_router', flit_width = parameter.Reference('rsp_width')), Uses('caba:vci_vdspin_target_wrapper', dspin_cmd_width = parameter.Reference('cmd_width'), dspin_rsp_width = parameter.Reference('rsp_width')), Uses('caba:vci_vdspin_initiator_wrapper', dspin_cmd_width = parameter.Reference('cmd_width'), dspin_rsp_width = parameter.Reference('rsp_width')), Uses('caba:vci_local_ring_fast', ring_cmd_data_size = parameter.Reference('cmd_width'), ring_rsp_data_size = parameter.Reference('rsp_width')), Uses('caba:vci_multi_tty'), Uses('caba:vci_framebuffer'), Uses('caba:vci_profiler'), Uses('caba:vci_logger'), Uses('caba:vci_block_device_tsar_v2'), Uses('caba:vci_dma_tsar_v2'), Uses('common:elf_file_loader'), ], instance_parameters = [ parameter.Int('n_x'), parameter.Int('n_y'), parameter.Int('n_cluster'), parameter.Module('mtd', 'common:mapping_table'), parameter.Module('mtc', 'common:mapping_table'), parameter.Module('mtx', 'common:mapping_table'), parameter.Int('x_width'), parameter.Int('y_width'), parameter.Int('memc_tgtid'), parameter.Int('xicu_tgtid'), parameter.Int('fbuf_tgtid'), parameter.Int('mtty_tgtid'), parameter.Int('brom_tgtid'), parameter.Int('bdev_tgtid'), parameter.Int('cdma_tgtid'), parameter.Int('memc_ways'), parameter.Int('memc_sets'), parameter.Int('l1_i_ways'), parameter.Int('l1_i_sets'), parameter.Int('l1_d_ways'), parameter.Int('l1_d_sets'), parameter.Int('xram_latency'), parameter.Bool('io'), ], ports = [ Port('caba:bit_in', 'p_resetn', auto = 'resetn'), Port('caba:clock_in', 'p_clk', auto = 'clock'), Port('caba:dspin_output', 'p_cmd_out', [2, 4], dspin_data_size = parameter.Reference('cmd_width')), Port('caba:dspin_input', 'p_cmd_in', [2, 4], dspin_data_size = parameter.Reference('cmd_width')), Port('caba:dspin_output', 'p_rsp_out', [2, 4], dspin_data_size = parameter.Reference('rsp_width')), Port('caba:dspin_input', 'p_rsp_in', [2, 4], dspin_data_size = parameter.Reference('rsp_width')), ], )