#!/usr/bin/env python from arch_classes import * ######################################################################################### # file : arch_info.py for the tsar_generic_iob architecture) # date : august 2016 # author : Alain Greiner ######################################################################################### # This python script defines a specific instance of "tsar_generic_iob" architecture # for the ALMOS-MK operating system. It is used to generate the "hard_config.h" # and the "arch_info.bin files, used by bthe ALMOS-MK bootloader. # # The constructor prototype format is imposed by the genarch.py application, # and should not be modified. # # The "tsar_generic_iob" architecture includes 7 external peripherals, accessed # through an IOB components located in cluster [0,0] or in cluster [x_size-1, y_size-1]. # Available peripherals are: TTY, IOC, FBF, ROM, NIC, CMA, PIC. # All clusters contain (nb_cores) processors, one L2 cache, one XCU, and # one optional hardware coprocessor connected to a MWMR controller. # # As the "tsar_generic_iob" architecture is generic, the following parameters # are defined as constructor arguments and can be redefined in the Makefile when # a new kernel image is generated : # - x_size : number of clusters in a row (from 1 to 16) # - y_size : number of clusters in a column (from & to 16) # - nb_cores : number of processors per cluster (from 1 to 4) # - nb_ttys : number of TTY channels (can be from 1 to 8) # - nb_nics : number of NIC channels (from 1 to 2) # - fbf_width : frame_buffer width = frame_buffer heigth # - ioc_type : can be 'IOC_BDV','IOC_HBA','IOC_SDC', 'IOC_SPI','NONE' # - io_cxy : IO cluster identifier # - boot_cxy : boot cluster identifier # - cache_line : number of bytes in cache line (in 16,32,64) # # The following parameters are imposed by the "tsar_generic_iob" architecture: # - devices_max : max number of devices per cluster # - x_width : number of bits for x coordinate # - y_width : number of bits for y coordinate # - paddr_width : number of bits for physical address # - p_width : number of bits for local processor index # - irqs_per_core : number of input IRQs per processor ######################################################################################## ############################ def arch( x_size = 2, y_size = 2, nb_cores = 2, nb_ttys = 1, nb_nics = 1, fbf_width = 128, ioc_type = 'IOC_BDV', io_cxy = 0, boot_cxy = 0, cache_line = 64): ### architecture constants p_width = 2 x_width = 4 y_width = 4 paddr_width = 40 irqs_per_core = 4 devices_max = 16 ### constructor parameters checking assert( (x_size == 1) or (x_size == 2) or (x_size == 4) or (x_size == 8) or (x_size == 16) ) assert( (y_size == 1) or (y_size == 2) or (y_size == 4) or (y_size == 8) or (y_size == 16) ) assert( nb_cores <= 4 ) assert( (nb_ttys >= 1) and (nb_ttys <= 8) ) assert( (nb_nics >= 1) and (nb_nics <= 2) ) assert( ioc_type in ['IOC_BDV','IOC_HBA','IOC_SDC','IOC_SPI','IOC_RDK'] ) assert( (io_cxy == 0) or (io_cxy == ((x_size-1)<> y_width) < x_size) and ((boot_cxy & ((1<