////////////////////////////////////////////////////////////////////////////// // File: tsar_leti_cluster.h // Author: Alain Greiner // Copyright: UPMC/LIP6 // Date : march 2013 // This program is released under the GNU public license ////////////////////////////////////////////////////////////////////////////// #ifndef SOCLIB_CABA_TSAR_LETI_CLUSTER_H #define SOCLIB_CABA_TSAR_LETI_CLUSTER_H #include #include #include #include #include #include #include "gdbserver.h" #include "mapping_table.h" #include "mips32.h" #include "vci_simple_ram.h" #include "vci_xicu.h" #include "vci_local_crossbar.h" #include "dspin_local_crossbar.h" #include "vci_dspin_initiator_wrapper.h" #include "vci_dspin_target_wrapper.h" #include "dspin_router.h" #include "vci_multi_tty.h" #include "vci_block_device_tsar.h" #include "vci_mem_cache.h" #include "vci_cc_vcache_wrapper.h" namespace soclib { namespace caba { /////////////////////////////////////////////////////////////////////////// template class TsarLetiCluster /////////////////////////////////////////////////////////////////////////// : public soclib::caba::BaseModule { public: // Used in destructor size_t m_nprocs; // Ports sc_in p_clk; sc_in p_resetn; soclib::caba::DspinOutput *p_cmd_out; soclib::caba::DspinInput *p_cmd_in; soclib::caba::DspinOutput *p_rsp_out; soclib::caba::DspinInput *p_rsp_in; soclib::caba::DspinOutput *p_m2p_out; soclib::caba::DspinInput *p_m2p_in; soclib::caba::DspinOutput *p_p2m_out; soclib::caba::DspinInput *p_p2m_in; soclib::caba::DspinOutput *p_cla_out; soclib::caba::DspinInput *p_cla_in; // interrupt signals sc_signal signal_false; sc_signal signal_proc_irq[16]; sc_signal signal_irq_mtty; sc_signal signal_irq_memc; sc_signal signal_irq_bdev; // DSPIN signals between DSPIN routers and local_crossbars DspinSignals signal_dspin_cmd_l2g_d; DspinSignals signal_dspin_cmd_g2l_d; DspinSignals signal_dspin_rsp_l2g_d; DspinSignals signal_dspin_rsp_g2l_d; DspinSignals signal_dspin_m2p_l2g_c; DspinSignals signal_dspin_m2p_g2l_c; DspinSignals signal_dspin_clack_l2g_c; DspinSignals signal_dspin_clack_g2l_c; DspinSignals signal_dspin_p2m_l2g_c; DspinSignals signal_dspin_p2m_g2l_c; // Direct VCI signals VciSignals signal_vci_ini_proc[4]; VciSignals signal_vci_ini_mdma; VciSignals signal_vci_ini_bdev; VciSignals signal_vci_ini_chbuf; VciSignals signal_vci_tgt_memc; VciSignals signal_vci_tgt_xicu; VciSignals signal_vci_tgt_mdma; VciSignals signal_vci_tgt_mtty; VciSignals signal_vci_tgt_bdev; VciSignals signal_vci_tgt_fbuf; VciSignals signal_vci_tgt_mnic; VciSignals signal_vci_tgt_chbuf; VciSignals signal_vci_tgt_simh; VciSignals signal_vci_g2l; VciSignals signal_vci_l2g; // Coherence DSPIN signals to local crossbar DspinSignals signal_dspin_m2p_memc; DspinSignals signal_dspin_clack_memc; DspinSignals signal_dspin_p2m_memc; DspinSignals signal_dspin_m2p_proc[4]; DspinSignals signal_dspin_clack_proc[4]; DspinSignals signal_dspin_p2m_proc[4]; // external RAM to MEMC VCI signal VciSignals signal_vci_xram; // Components VciCcVCacheWrapper >* proc[4]; VciMemCache* memc; VciXicu* xicu; VciSimpleRam* xram; VciMultiTty* mtty; VciBlockDeviceTsar* bdev; VciLocalCrossbar* xbar_cmd; VciDspinInitiatorWrapper* wi_gate; VciDspinTargetWrapper* wt_gate; DspinLocalCrossbar* xbar_m2p; DspinLocalCrossbar* xbar_p2m; DspinLocalCrossbar* xbar_cla; DspinRouter* router_cmd; DspinRouter* router_rsp; DspinRouter* router_m2p; DspinRouter* router_p2m; DspinRouter* router_cla; TsarLetiCluster( sc_module_name insname, size_t nb_procs, // processors size_t x, // x coordinate size_t y, // y coordinate size_t cluster, // y + ymax*x const soclib::common::MappingTable &mtd, // internal const soclib::common::MappingTable &mtx, // external uint32_t reset_address, // boot address size_t x_width, // x field bits size_t y_width, // y field bits size_t l_width, // l field bits size_t p_width, // p field bits size_t tgtid_memc, size_t tgtid_xicu, size_t tgtid_mtty, size_t tgtid_bdev, bool use_ramdisk, const char* disk_pathname, size_t memc_ways, size_t memc_sets, size_t l1_i_ways, size_t l1_i_sets, size_t l1_d_ways, size_t l1_d_sets, size_t xram_latency, // external ram const Loader &loader, uint32_t frozen_cycles, uint32_t trace_start_cycle, bool trace_proc_ok, uint32_t trace_proc_id, bool trace_memc_ok, uint32_t trace_memc_id ); ~TsarLetiCluster(); }; }} #endif