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source: trunk/platforms/tsar_generic_xbar/tsar_xbar_cluster/caba/source/include/tsar_xbar_cluster.h @ 548

Last change on this file since 548 was 548, checked in by meunier, 11 years ago
Last commit contained unwanted local modifications; reverting them.
File size: 12.8 KB

Rev	Line
[345]	1	//////////////////////////////////////////////////////////////////////////////
[396]	2	// File: tsar_xbar_cluster.h
[428]	3	// Author: Alain Greiner
[345]	4	// Copyright: UPMC/LIP6
[396]	5	// Date : march 2013
[345]	6	// This program is released under the GNU public license
	7	//////////////////////////////////////////////////////////////////////////////
	8
[378]	9	#ifndef SOCLIB_CABA_TSAR_XBAR_CLUSTER_H
	10	#define SOCLIB_CABA_TSAR_XBAR_CLUSTER_H
[345]	11
	12	#include <systemc>
	13	#include <sys/time.h>
	14	#include <iostream>
	15	#include <sstream>
	16	#include <cstdlib>
	17	#include <cstdarg>
	18
	19	#include "gdbserver.h"
	20	#include "mapping_table.h"
	21	#include "mips32.h"
	22	#include "vci_simple_ram.h"
[436]	23	#include "vci_simple_rom.h"
[345]	24	#include "vci_xicu.h"
	25	#include "dspin_local_crossbar.h"
	26	#include "vci_dspin_initiator_wrapper.h"
	27	#include "vci_dspin_target_wrapper.h"
	28	#include "virtual_dspin_router.h"
	29	#include "vci_multi_tty.h"
	30	#include "vci_multi_nic.h"
[475]	31	#include "vci_chbuf_dma.h"
[378]	32	#include "vci_block_device_tsar.h"
[345]	33	#include "vci_framebuffer.h"
	34	#include "vci_multi_dma.h"
[351]	35	#include "vci_mem_cache.h"
	36	#include "vci_cc_vcache_wrapper.h"
[547]	37	#include "vci_simhelper.h"
[345]	38
[389]	39	namespace soclib { namespace caba {
	40
[345]	41	///////////////////////////////////////////////////////////////////////////
[396]	42	template<size_t dspin_cmd_width,
[428]	43	size_t dspin_rsp_width,
[396]	44	typename vci_param_int,
[428]	45	typename vci_param_ext> class TsarXbarCluster
[345]	46	///////////////////////////////////////////////////////////////////////////
	47	: public soclib::caba::BaseModule
	48	{
[396]	49	public:
[345]	50
[508]	51	// Used in destructor
	52	size_t n_procs;
	53
[428]	54	// Ports
	55	sc_in<bool> p_clk;
	56	sc_in<bool> p_resetn;
	57	soclib::caba::DspinOutput<dspin_cmd_width> **p_cmd_out;
	58	soclib::caba::DspinInput<dspin_cmd_width> **p_cmd_in;
	59	soclib::caba::DspinOutput<dspin_rsp_width> **p_rsp_out;
	60	soclib::caba::DspinInput<dspin_rsp_width> **p_rsp_in;
[389]	61
[345]	62	// interrupt signals
[428]	63	sc_signal<bool> signal_false;
	64	sc_signal<bool> signal_proc_it[8];
	65	sc_signal<bool> signal_irq_mdma[8];
	66	sc_signal<bool> signal_irq_mtty[23];
	67	sc_signal<bool> signal_irq_mnic_rx[8]; // unused
	68	sc_signal<bool> signal_irq_mnic_tx[8]; // unused
[475]	69	sc_signal<bool> signal_irq_chbuf[8]; // unused
[428]	70	sc_signal<bool> signal_irq_bdev;
[345]	71
[428]	72	// DSPIN signals between DSPIN routers and local_crossbars
	73	DspinSignals<dspin_cmd_width> signal_dspin_cmd_l2g_d;
	74	DspinSignals<dspin_cmd_width> signal_dspin_cmd_g2l_d;
	75	DspinSignals<dspin_cmd_width> signal_dspin_m2p_l2g_c;
	76	DspinSignals<dspin_cmd_width> signal_dspin_m2p_g2l_c;
[468]	77	DspinSignals<dspin_cmd_width> signal_dspin_clack_l2g_c;
	78	DspinSignals<dspin_cmd_width> signal_dspin_clack_g2l_c;
[428]	79	DspinSignals<dspin_rsp_width> signal_dspin_rsp_l2g_d;
	80	DspinSignals<dspin_rsp_width> signal_dspin_rsp_g2l_d;
	81	DspinSignals<dspin_rsp_width> signal_dspin_p2m_l2g_c;
	82	DspinSignals<dspin_rsp_width> signal_dspin_p2m_g2l_c;
[345]	83
[428]	84	// Direct VCI signals to VCI/DSPIN wrappers
	85	VciSignals<vci_param_int> signal_vci_ini_proc[8];
	86	VciSignals<vci_param_int> signal_vci_ini_mdma;
	87	VciSignals<vci_param_int> signal_vci_ini_bdev;
[475]	88	VciSignals<vci_param_int> signal_vci_ini_chbuf;
[345]	89
[428]	90	VciSignals<vci_param_int> signal_vci_tgt_memc;
	91	VciSignals<vci_param_int> signal_vci_tgt_xicu;
	92	VciSignals<vci_param_int> signal_vci_tgt_mdma;
	93	VciSignals<vci_param_int> signal_vci_tgt_mtty;
	94	VciSignals<vci_param_int> signal_vci_tgt_bdev;
	95	VciSignals<vci_param_int> signal_vci_tgt_brom;
	96	VciSignals<vci_param_int> signal_vci_tgt_fbuf;
	97	VciSignals<vci_param_int> signal_vci_tgt_mnic;
[475]	98	VciSignals<vci_param_int> signal_vci_tgt_chbuf;
[547]	99	VciSignals<vci_param_int> signal_vci_tgt_simh;
[345]	100
[428]	101	// Direct DSPIN signals to local crossbars
	102	DspinSignals<dspin_cmd_width> signal_dspin_cmd_proc_i[8];
	103	DspinSignals<dspin_rsp_width> signal_dspin_rsp_proc_i[8];
	104	DspinSignals<dspin_cmd_width> signal_dspin_cmd_mdma_i;
	105	DspinSignals<dspin_rsp_width> signal_dspin_rsp_mdma_i;
	106	DspinSignals<dspin_cmd_width> signal_dspin_cmd_bdev_i;
	107	DspinSignals<dspin_rsp_width> signal_dspin_rsp_bdev_i;
[475]	108	DspinSignals<dspin_cmd_width> signal_dspin_cmd_chbuf_i;
	109	DspinSignals<dspin_rsp_width> signal_dspin_rsp_chbuf_i;
[345]	110
[428]	111	DspinSignals<dspin_cmd_width> signal_dspin_cmd_memc_t;
	112	DspinSignals<dspin_rsp_width> signal_dspin_rsp_memc_t;
	113	DspinSignals<dspin_cmd_width> signal_dspin_cmd_xicu_t;
	114	DspinSignals<dspin_rsp_width> signal_dspin_rsp_xicu_t;
	115	DspinSignals<dspin_cmd_width> signal_dspin_cmd_mdma_t;
	116	DspinSignals<dspin_rsp_width> signal_dspin_rsp_mdma_t;
	117	DspinSignals<dspin_cmd_width> signal_dspin_cmd_mtty_t;
	118	DspinSignals<dspin_rsp_width> signal_dspin_rsp_mtty_t;
	119	DspinSignals<dspin_cmd_width> signal_dspin_cmd_bdev_t;
	120	DspinSignals<dspin_rsp_width> signal_dspin_rsp_bdev_t;
	121	DspinSignals<dspin_cmd_width> signal_dspin_cmd_brom_t;
	122	DspinSignals<dspin_rsp_width> signal_dspin_rsp_brom_t;
	123	DspinSignals<dspin_cmd_width> signal_dspin_cmd_fbuf_t;
	124	DspinSignals<dspin_rsp_width> signal_dspin_rsp_fbuf_t;
	125	DspinSignals<dspin_cmd_width> signal_dspin_cmd_mnic_t;
	126	DspinSignals<dspin_rsp_width> signal_dspin_rsp_mnic_t;
[475]	127	DspinSignals<dspin_cmd_width> signal_dspin_cmd_chbuf_t;
	128	DspinSignals<dspin_rsp_width> signal_dspin_rsp_chbuf_t;
[547]	129	DspinSignals<dspin_cmd_width> signal_dspin_cmd_simh_t;
	130	DspinSignals<dspin_rsp_width> signal_dspin_rsp_simh_t;
[345]	131
[428]	132	// Coherence DSPIN signals to local crossbar
	133	DspinSignals<dspin_cmd_width> signal_dspin_m2p_memc;
[468]	134	DspinSignals<dspin_cmd_width> signal_dspin_clack_memc;
[428]	135	DspinSignals<dspin_rsp_width> signal_dspin_p2m_memc;
	136	DspinSignals<dspin_cmd_width> signal_dspin_m2p_proc[8];
[468]	137	DspinSignals<dspin_cmd_width> signal_dspin_clack_proc[8];
[428]	138	DspinSignals<dspin_rsp_width> signal_dspin_p2m_proc[8];
	139
	140	// external RAM to MEMC VCI signal
	141	VciSignals<vci_param_ext> signal_vci_xram;
	142
[345]	143	// Components
	144
[428]	145	VciCcVCacheWrapper<vci_param_int,
[396]	146	dspin_cmd_width,
	147	dspin_rsp_width,
	148	GdbServer<Mips32ElIss> >* proc[8];
[345]	149
[396]	150	VciDspinInitiatorWrapper<vci_param_int,
	151	dspin_cmd_width,
	152	dspin_rsp_width>* wi_proc[8];
[345]	153
[428]	154	VciMemCache<vci_param_int,
	155	vci_param_ext,
	156	dspin_rsp_width,
[396]	157	dspin_cmd_width>* memc;
[345]	158
[396]	159	VciDspinTargetWrapper<vci_param_int,
	160	dspin_cmd_width,
	161	dspin_rsp_width>* wt_memc;
[345]	162
[396]	163	VciXicu<vci_param_int>* xicu;
[345]	164
[396]	165	VciDspinTargetWrapper<vci_param_int,
	166	dspin_cmd_width,
	167	dspin_rsp_width>* wt_xicu;
[345]	168
[396]	169	VciMultiDma<vci_param_int>* mdma;
[345]	170
[396]	171	VciDspinInitiatorWrapper<vci_param_int,
	172	dspin_cmd_width,
	173	dspin_rsp_width>* wi_mdma;
[345]	174
[396]	175	VciDspinTargetWrapper<vci_param_int,
	176	dspin_cmd_width,
	177	dspin_rsp_width>* wt_mdma;
[345]	178
[396]	179	VciSimpleRam<vci_param_ext>* xram;
[345]	180
[436]	181	VciSimpleRom<vci_param_int>* brom;
[345]	182
[396]	183	VciDspinTargetWrapper<vci_param_int,
	184	dspin_cmd_width,
	185	dspin_rsp_width>* wt_brom;
[345]	186
[396]	187	VciMultiTty<vci_param_int>* mtty;
	188
	189	VciDspinTargetWrapper<vci_param_int,
	190	dspin_cmd_width,
	191	dspin_rsp_width>* wt_mtty;
	192
[547]	193	VciSimhelper<vci_param_int>* simhelper;
	194
	195	VciDspinTargetWrapper<vci_param_int,
	196	dspin_cmd_width,
	197	dspin_rsp_width>* wt_simhelper;
	198
	199
[396]	200	VciFrameBuffer<vci_param_int>* fbuf;
	201
	202	VciDspinTargetWrapper<vci_param_int,
	203	dspin_cmd_width,
	204	dspin_rsp_width>* wt_fbuf;
	205
[548]	206	VciMultiNic<vci_param_int>* mnic;
[396]	207
	208	VciDspinTargetWrapper<vci_param_int,
	209	dspin_cmd_width,
	210	dspin_rsp_width>* wt_mnic;
	211
[475]	212	VciChbufDma<vci_param_int>* chbuf;
	213
	214	VciDspinTargetWrapper<vci_param_int,
	215	dspin_cmd_width,
	216	dspin_rsp_width>* wt_chbuf;
	217
	218	VciDspinInitiatorWrapper<vci_param_int,
	219	dspin_cmd_width,
	220	dspin_rsp_width>* wi_chbuf;
	221
[396]	222	VciBlockDeviceTsar<vci_param_int>* bdev;
	223
	224	VciDspinInitiatorWrapper<vci_param_int,
	225	dspin_cmd_width,
	226	dspin_rsp_width>* wi_bdev;
	227
	228	VciDspinTargetWrapper<vci_param_int,
	229	dspin_cmd_width,
	230	dspin_rsp_width>* wt_bdev;
	231
	232	DspinLocalCrossbar<dspin_cmd_width>* xbar_cmd_d;
	233	DspinLocalCrossbar<dspin_rsp_width>* xbar_rsp_d;
	234	DspinLocalCrossbar<dspin_cmd_width>* xbar_m2p_c;
	235	DspinLocalCrossbar<dspin_rsp_width>* xbar_p2m_c;
[468]	236	DspinLocalCrossbar<dspin_cmd_width>* xbar_clack_c;
[396]	237
	238	VirtualDspinRouter<dspin_cmd_width>* router_cmd;
	239	VirtualDspinRouter<dspin_rsp_width>* router_rsp;
	240
[428]	241	TsarXbarCluster( sc_module_name insname,
	242	size_t nb_procs, // processors
	243	size_t nb_ttys, // TTY terminals
	244	size_t nb_dmas, // DMA channels
[345]	245	size_t x, // x coordinate
	246	size_t y, // y coordinate
	247	size_t cluster, // y + ymax*x
[396]	248	const soclib::common::MappingTable &mtd, // internal
	249	const soclib::common::MappingTable &mtx, // external
[428]	250	size_t x_width, // x field bits
	251	size_t y_width, // y field bits
	252	size_t l_width, // l field bits
	253	size_t tgtid_memc,
	254	size_t tgtid_xicu,
[345]	255	size_t tgtid_mdma,
[389]	256	size_t tgtid_fbuf,
[345]	257	size_t tgtid_mtty,
	258	size_t tgtid_brom,
	259	size_t tgtid_mnic,
[475]	260	size_t tgtid_chbuf,
[345]	261	size_t tgtid_bdev,
[547]	262	size_t tgtid_simh,
[345]	263	size_t memc_ways,
	264	size_t memc_sets,
	265	size_t l1_i_ways,
[428]	266	size_t l1_i_sets,
[345]	267	size_t l1_d_ways,
[428]	268	size_t l1_d_sets,
	269	size_t xram_latency, // external ram
	270	bool io, // I/O cluster
[396]	271	size_t xfb, // fbf pixels
	272	size_t yfb, // fbf lines
[428]	273	char* disk_name, // virtual disk
	274	size_t block_size, // block size
[396]	275	size_t nic_channels, // number channels
[428]	276	char* nic_rx_name, // filename rx
	277	char* nic_tx_name, // filename tx
	278	uint32_t nic_timeout, // cycles
[485]	279	size_t chbufdma_channels, // number channels
[428]	280	const Loader &loader,
	281	uint32_t frozen_cycles,
[345]	282	uint32_t start_debug_cycle,
[428]	283	bool memc_debug_ok,
	284	bool proc_debug_ok);
[345]	285
[508]	286	~TsarXbarCluster();
	287
[345]	288	};
	289	}}
	290
	291	#endif

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