////////////////////////////////////////////////////////////////////////////// // File: tsarv4_cluster_mmu.h // Author: Alain Greiner // Copyright: UPMC/LIP6 // Date : march 2011 // This program is released under the GNU public license ////////////////////////////////////////////////////////////////////////////// #ifndef SOCLIB_CABA_TSAR_CLUSTER_V4_MMU_H #define SOCLIB_CABA_TSAR_CLUSTER_V4_MMU_H #include #include #include #include #include #include #include "gdbserver.h" #include "mapping_table.h" #include "mips32.h" #include "vci_simple_ram.h" #include "vci_xicu.h" #include "vci_local_crossbar.h" #include "virtual_dspin_router.h" #include "vci_vdspin_target_wrapper.h" #include "vci_vdspin_initiator_wrapper.h" #include "vci_multi_tty.h" #include "vci_multi_nic.h" #include "vci_block_device_tsar_v4.h" #include "vci_framebuffer.h" #include "vci_multi_dma.h" #include "vci_mem_cache_v4.h" #include "vci_cc_vcache_wrapper_v4.h" namespace soclib { namespace caba { /////////////////////////////////////////////////////////////////////////// template class TsarV4ClusterMmu /////////////////////////////////////////////////////////////////////////// : public soclib::caba::BaseModule { public: // Ports sc_in p_clk; sc_in p_resetn; soclib::caba::DspinOutput **p_cmd_out; soclib::caba::DspinInput **p_cmd_in; soclib::caba::DspinOutput **p_rsp_out; soclib::caba::DspinInput **p_rsp_in; // interrupt signals sc_signal signal_false; sc_signal signal_proc_it[8]; sc_signal signal_irq_mdma[8]; sc_signal signal_irq_mtty[23]; sc_signal signal_irq_mnic_rx[8]; // unused sc_signal signal_irq_mnic_tx[8]; // unused sc_signal signal_irq_bdev; // DSPIN signals between DSPIN routers and VCI/DSPIN wrappers DspinSignals signal_dspin_cmd_l2g_d; DspinSignals signal_dspin_cmd_g2l_d; DspinSignals signal_dspin_cmd_l2g_c; DspinSignals signal_dspin_cmd_g2l_c; DspinSignals signal_dspin_rsp_l2g_d; DspinSignals signal_dspin_rsp_g2l_d; DspinSignals signal_dspin_rsp_l2g_c; DspinSignals signal_dspin_rsp_g2l_c; // VCI signals between VCI/DSPIN wrappers and local crossbars VciSignals signal_vci_l2g_d; VciSignals signal_vci_g2l_d; VciSignals signal_vci_l2g_c; VciSignals signal_vci_g2l_c; // Direct VCI signals VciSignals signal_vci_ini_d_proc[4]; VciSignals signal_vci_ini_d_bdev; VciSignals signal_vci_ini_d_mdma; VciSignals signal_vci_tgt_d_memc; VciSignals signal_vci_tgt_d_mtty; VciSignals signal_vci_tgt_d_xicu; VciSignals signal_vci_tgt_d_bdev; VciSignals signal_vci_tgt_d_mdma; VciSignals signal_vci_tgt_d_brom; VciSignals signal_vci_tgt_d_fbuf; VciSignals signal_vci_tgt_d_mnic; // Coherence VCi signals VciSignals signal_vci_ini_c_proc[4]; VciSignals signal_vci_tgt_c_proc[4]; VciSignals signal_vci_ini_c_memc; VciSignals signal_vci_tgt_c_memc; // external RAM VCI signal VciSignals signal_vci_xram; // Components VciCcVCacheWrapperV4* proc[8]; VciMemCacheV4* memc; VciXicu* xicu; VciLocalCrossbar* xbard; VciLocalCrossbar* xbarc; VciVdspinTargetWrapper* tgtwrapperd; VciVdspinInitiatorWrapper* iniwrapperd; VciVdspinTargetWrapper* tgtwrapperc; VciVdspinInitiatorWrapper* iniwrapperc; VirtualDspinRouter* cmdrouter; VirtualDspinRouter* rsprouter; VciSimpleRam* brom; VciMultiTty* mtty; VciFrameBuffer* fbuf; VciMultiNic* mnic; VciBlockDeviceTsarV4* bdev; VciMultiDma* mdma; VciSimpleRam* xram; TsarV4ClusterMmu(sc_module_name insname, size_t nb_procs, // number of processors size_t nb_ttys, // number of TTY terminals size_t nb_dmas, // number of DMA channels size_t x, // x coordinate size_t y, // y coordinate size_t cluster, // y + ymax*x const soclib::common::MappingTable &mtd, // direct mapping table const soclib::common::MappingTable &mtc, // coherence mapping table const soclib::common::MappingTable &mtx, // xram mapping table size_t x_width, // x field number of bits size_t y_width, // y field number of bits size_t tgtid_memc, size_t tgtid_xicu, size_t tgtid_mdma, size_t tgtid_fbuf, size_t tgtid_mtty, size_t tgtid_brom, size_t tgtid_mnic, size_t tgtid_bdev, size_t memc_ways, size_t memc_sets, size_t l1_i_ways, size_t l1_i_sets, size_t l1_d_ways, size_t l1_d_sets, size_t xram_latency, // external ram latency bool io, // I/O cluster if true size_t xfb, // frame buffer pixels size_t yfb, // frame buffer lines char* disk_name, // virtual disk name for BDEV size_t block_size, // block size for BDEV size_t nic_channels, // number of channels char* nic_rx_name, // file name rx packets char* nic_tx_name, // file name tx packets uint32_t nic_timeout, // number of cycles const Loader &loader, // loader for BROM uint32_t frozen_cycles, // max frozen cycles uint32_t start_debug_cycle, bool memc_debug_ok, bool proc_debug_ok); ~TsarV4ClusterMmu(); }; }} #endif