source: trunk/softs/tsar_boot/conf/platform_fpga_de2-115/platform_fpga.dts @ 292

Last change on this file since 292 was 292, checked in by cfuguet, 11 years ago

Changing directory structure of the TSAR boot loader.
A README.txt file has been included to explain the new structure
and the MAKEFILE parameters.

Erasing the heap segment for the boot elf loader. All the work space
is allocated in the stack.

The stack size is defined in the include/defs.h.

Important modification in the reset.S file. The non-boot
processors (processor id != 0) wait in a low comsumption energy
mode to be wake up by processor 0 using an IPI. Each processor
has a private mailbox in the local XICU. The value written in
the mailbox will be used as address to jump by the processors.

The waking up of non-boot processors is not done in this boot loader
so it must be done in the application loaded.

The boot_loader_elf function loads into memory an executable .elf file
which must be placed in the BOOT_LOADER_LBA block of the disk. This
constant can be defined in the include/defs.h file.

File size: 4.3 KB
Line 
1/dts-v1/;
2
3/ {
4    #address-cells = <0x1>;
5    #size-cells = <0x1>;
6
7    cpus {
8        #address-cells = <0x1>;
9        #size-cells = <0x0>;
10
11        Mips,32@0 {
12            device_type = "cpu";
13            icudev_type = "cpu:mips";
14            name = "Mips,32";
15            reg = <0x00000000>;
16        };
17
18        Mips,32@1 {
19            device_type = "cpu";
20            icudev_type = "cpu:mips";
21            name = "Mips,32";
22            reg = <0x00000001>;
23        };
24
25        Mips,32@2 {
26            device_type = "cpu";
27            icudev_type = "cpu:mips";
28            name = "Mips,32";
29            reg = <0x00000002>;
30        };
31
32        Mips,32@3 {
33            device_type = "cpu";
34            icudev_type = "cpu:mips";
35            name = "Mips,32";
36            reg = <0x00000003>;
37        };
38    };
39
40    memory@0x00000000 {
41        cached = <0x1>;
42        device_type = "memory";
43        reg = <0x00000000 0x07e00000>;
44    };
45
46    memory@0xbfc00000 {
47        cached = <0x1>;
48        device_type = "rom";
49        reg = <0xbfc00000 0x00400000>;
50    };
51
52    tty@0xfc000000 {
53        device_type = "vci:tty";
54        irq = <&{/xicu@0xfd000000} 0x0>;
55        reg = <0xfc000000 0x00000010>;
56        tty_count = <0x1>;
57    };
58
59    blockdevice@0xfb000000 {
60        device_type = "vci:ioc";
61        irq = <&{/xicu@0xfd000000} 0x1>;
62        reg = <0xfb000000 0x00000020>;
63    };
64
65    fb@0x07e00000 {
66        device_type = "vci:vga";
67        reg = <0x07e00000 0x200000
68               0xFA000000 0x001000>;
69        mode = <16>;
70        width = <640>;
71        height = <480>;
72    };
73
74    xicu@0xfd000000 {
75        device_type = "soclib:xicu:root";
76        input_lines = <0x2>;
77        ipis = <0x4>;
78        reg = <0xfd000000 0x00001000>;
79        timers = <0x4>;
80
81        out@0 {
82            device_type = "soclib:xicu:filter";
83            irq = <&{/cpus/Mips,32@0} 0x0>;
84            output_line = <0x0>;
85            parent = <&{/xicu@0xfd000000}>;
86        };
87
88        out@1 {
89            device_type = "soclib:xicu:filter";
90            irq = <&{/cpus/Mips,32@0} 0x1>;
91            output_line = <0x1>;
92            parent = <&{/xicu@0xfd000000}>;
93        };
94
95        out@2 {
96            device_type = "soclib:xicu:filter";
97            irq = <&{/cpus/Mips,32@0} 0x2>;
98            output_line = <0x2>;
99            parent = <&{/xicu@0xfd000000}>;
100        };
101
102        out@3 {
103            device_type = "soclib:xicu:filter";
104            irq = <&{/cpus/Mips,32@1} 0x0>;
105            output_line = <0x3>;
106            parent = <&{/xicu@0xfd000000}>;
107        };
108
109        out@4 {
110            device_type = "soclib:xicu:filter";
111            irq = <&{/cpus/Mips,32@1} 0x1>;
112            output_line = <0x4>;
113            parent = <&{/xicu@0xfd000000}>;
114        };
115
116        out@5 {
117            device_type = "soclib:xicu:filter";
118            irq = <&{/cpus/Mips,32@1} 0x2>;
119            output_line = <0x5>;
120            parent = <&{/xicu@0xfd000000}>;
121        };
122
123        out@6 {
124            device_type = "soclib:xicu:filter";
125            irq = <&{/cpus/Mips,32@2} 0x0>;
126            output_line = <0x6>;
127            parent = <&{/xicu@0xfd000000}>;
128        };
129
130        out@7 {
131            device_type = "soclib:xicu:filter";
132            irq = <&{/cpus/Mips,32@2} 0x1>;
133            output_line = <0x7>;
134            parent = <&{/xicu@0xfd000000}>;
135        };
136
137        out@8 {
138            device_type = "soclib:xicu:filter";
139            irq = <&{/cpus/Mips,32@2} 0x2>;
140            output_line = <0x8>;
141            parent = <&{/xicu@0xfd000000}>;
142        };
143
144        out@9 {
145            device_type = "soclib:xicu:filter";
146            irq = <&{/cpus/Mips,32@3} 0x0>;
147            output_line = <0x9>;
148            parent = <&{/xicu@0xfd000000}>;
149        };
150        out@10 {
151            device_type = "soclib:xicu:filter";
152            irq = <&{/cpus/Mips,32@3} 0x1>;
153            output_line = <0xa>;
154            parent = <&{/xicu@0xfd000000}>;
155        };
156
157        out@11 {
158            device_type = "soclib:xicu:filter";
159            irq = <&{/cpus/Mips,32@3} 0x2>;
160            output_line = <0xb>;
161            parent = <&{/xicu@0xfd000000}>;
162        };
163
164    };
165  topology {
166    #address-cells = <2>;
167    #size-cells = <0>;
168    cluster@0,0 {
169        reg = <0 0>;
170        devices = <&{/cpus/Mips,32@0} &{/cpus/Mips,32@1} &{/cpus/Mips,32@2} &{/cpus/Mips,32@3} &{/xicu@0xfd000000} &{/tty@0xfc000000} &{/blockdevice@0xfb000000} &{/fb@0x07e00000} >;
171    };
172  };
173};
Note: See TracBrowser for help on using the repository browser.