|
Last change
on this file since 570 was
570,
checked in by cfuguet, 10 years ago
|
|
Modifications in tsar_boot:
- Aligning the boot loader block buffer to a cache line. This is
required by the memory cache invalidation mechanism.
- Introducing a new platform in the configuration directory:
tsar_generic_iob
|
|
File size:
360 bytes
|
| Line | |
|---|
| 1 | #define NB_PROCS 1 |
|---|
| 2 | #define NB_CLUSTERS 4 |
|---|
| 3 | |
|---|
| 4 | #define IRQ_PER_PROC 1 |
|---|
| 5 | |
|---|
| 6 | #define USE_IOB 1 |
|---|
| 7 | #define CACHE_COHERENCE 1 |
|---|
| 8 | #define CACHE_LINE_SIZE 64//bytes |
|---|
| 9 | |
|---|
| 10 | #define BOOT_DEBUG 1 |
|---|
| 11 | #define BOOT_DEBUG_IOC 0 |
|---|
| 12 | |
|---|
| 13 | #define ICU_BASE 0xB0000000 |
|---|
| 14 | #define MCC_BASE 0xB2000000 |
|---|
| 15 | #define IOC_BASE 0xB3000000 |
|---|
| 16 | #define TTY_BASE 0xB4000000 |
|---|
Note: See
TracBrowser
for help on using the repository browser.
