source: trunk/softs/tsar_boot/conf/platform_vgsb_xicu_mmu/platform_soclib.dts @ 347

Last change on this file since 347 was 347, checked in by cfuguet, 11 years ago

Introducing dcache line invalidation mechanism in the boot_ioc_read
function, when using platform without cache coherency.

Introducing two parameters in the defs_platform.h file:

CACHE_COHERENCE

Equals to 0 when no cache coherency

CACHE_LINE_SIZE

Number of bytes in a cache line

  • TODO: Use the config register of the cache models to get

this size

Adding new platform configuration file for the

caba_vgsb_xicu_mmu SOCLIB platform.
File size: 0 bytes

(The file is empty)

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