Changeset 1002 for trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
- Timestamp:
- Jul 2, 2015, 3:17:14 PM (9 years ago)
- File:
-
- 1 edited
Legend:
- Unmodified
- Added
- Removed
-
trunk/platforms/tsar_generic_iob/tsar_iob_cluster/caba/source/src/tsar_iob_cluster.cpp
r972 r1002 97 97 98 98 // Vectors of DSPIN ports for inter-cluster communications 99 p_dspin_int_cmd_in = alloc_elems<DspinInput<dspin_int_cmd_width> >("p_int_cmd_in", 4, 3); 100 p_dspin_int_cmd_out = alloc_elems<DspinOutput<dspin_int_cmd_width> >("p_int_cmd_out", 4, 3); 101 p_dspin_int_rsp_in = alloc_elems<DspinInput<dspin_int_rsp_width> >("p_int_rsp_in", 4, 2); 102 p_dspin_int_rsp_out = alloc_elems<DspinOutput<dspin_int_rsp_width> >("p_int_rsp_out", 4, 2); 99 p_dspin_int_cmd_in = alloc_elems<DspinInput<dspin_int_cmd_width> >("p_int_cmd_in", 4); 100 p_dspin_int_cmd_out = alloc_elems<DspinOutput<dspin_int_cmd_width> >("p_int_cmd_out", 4); 101 102 p_dspin_int_rsp_in = alloc_elems<DspinInput<dspin_int_rsp_width> >("p_int_rsp_in", 4); 103 p_dspin_int_rsp_out = alloc_elems<DspinOutput<dspin_int_rsp_width> >("p_int_rsp_out", 4); 104 105 p_dspin_int_m2p_in = alloc_elems<DspinInput<dspin_int_cmd_width> >("p_int_m2p_in", 4); 106 p_dspin_int_m2p_out = alloc_elems<DspinOutput<dspin_int_cmd_width> >("p_int_m2p_out", 4); 107 108 p_dspin_int_p2m_in = alloc_elems<DspinInput<dspin_int_rsp_width> >("p_int_p2m_in", 4); 109 p_dspin_int_p2m_out = alloc_elems<DspinOutput<dspin_int_rsp_width> >("p_int_p2m_out", 4); 110 111 p_dspin_int_cla_in = alloc_elems<DspinInput<dspin_int_cmd_width> >("p_int_cla_in", 4); 112 p_dspin_int_cla_out = alloc_elems<DspinOutput<dspin_int_cmd_width> >("p_int_cla_out", 4); 103 113 104 114 p_dspin_ram_cmd_in = alloc_elems<DspinInput<dspin_ram_cmd_width> >("p_ext_cmd_in", 4); 105 115 p_dspin_ram_cmd_out = alloc_elems<DspinOutput<dspin_ram_cmd_width> >("p_ext_cmd_out", 4); 116 106 117 p_dspin_ram_rsp_in = alloc_elems<DspinInput<dspin_ram_rsp_width> >("p_ext_rsp_in", 4); 107 118 p_dspin_ram_rsp_out = alloc_elems<DspinOutput<dspin_ram_rsp_width> >("p_ext_rsp_out", 4); … … 114 125 } 115 126 116 ///////////////////////////////////////////////////////////////////////////// 127 ////////////////////////////////////////////////////////////////////////////////// 117 128 // Hardware components 118 ///////////////////////////////////////////////////////////////////////////// 119 120 //////////// PROCS 129 ////////////////////////////////////////////////////////////////////////////////// 130 131 //////////// PROCS ///////////////////////////////////////////////////////////// 121 132 for (size_t p = 0; p < nb_procs; p++) 122 133 { … … 147 158 } 148 159 149 /////////// MEMC160 //////////// MEMC ///////////////////////////////////////////////////////////// 150 161 std::ostringstream s_memc; 151 162 s_memc << "memc_" << x_id << "_" << y_id; … … 178 189 x_width + y_width + l_width); 179 190 180 /////////// XICU 191 /////////// XICU ////////////////////////////////////////////////////////////// 181 192 std::ostringstream s_xicu; 182 193 s_xicu << "xicu_" << x_id << "_" << y_id; … … 190 201 xcu_nb_out); // number of output IRQs 191 202 192 //////////// MWMR controller and coprocessor203 //////////// MWMR controller and COPROC //////////////////////////////////////// 193 204 std::ostringstream s_mwmr; 194 205 std::ostringstream s_copro; … … 244 255 } 245 256 246 /////////// Direct LOCAL_XBAR(S)257 /////////// VCI INT_CMD/RSP LOCAL_XBAR ////////////////////////////////////// 247 258 size_t nb_direct_initiators = is_io ? nb_procs + 2 : nb_procs + 1; 248 259 size_t nb_direct_targets = is_io ? 4 : 3; … … 276 287 x_width + y_width + l_width); 277 288 278 //////////// Coherence LOCAL_XBAR(S)289 //////////// DSPIN INT_M2P LOCAL_XBAR //////////////////////////////////////// 279 290 std::ostringstream s_int_xbar_m2p_c; 280 291 s_int_xbar_m2p_c << "int_xbar_m2p_c_" << x_id << "_" << y_id; … … 291 302 true ); // broacast 292 303 304 //////////// DSPIN INT_P2M LOCAL_XBAR //////////////////////////////////////// 293 305 std::ostringstream s_int_xbar_p2m_c; 294 306 s_int_xbar_p2m_c << "int_xbar_p2m_c_" << x_id << "_" << y_id; … … 305 317 false ); // no broacast 306 318 319 //////////// DSPIN INT_CLA LOCAL_XBAR //////////////////////////////////////// 307 320 std::ostringstream s_int_xbar_clack_c; 308 321 s_int_xbar_clack_c << "int_xbar_clack_c_" << x_id << "_" << y_id; … … 319 332 false); // broadcast 320 333 321 //////////// // INT ROUTER(S)334 //////////// DSPIN INT_CMD ROUTER //////////////////////////////////////////// 322 335 std::ostringstream s_int_router_cmd; 323 s_int_router_cmd << " router_cmd_" << x_id << "_" << y_id;324 int_router_cmd = new VirtualDspinRouter<dspin_int_cmd_width>(336 s_int_router_cmd << "int_router_cmd_" << x_id << "_" << y_id; 337 int_router_cmd = new DspinRouter<dspin_int_cmd_width>( 325 338 s_int_router_cmd.str().c_str(), 326 339 x_id,y_id, // coordinate in the mesh 327 340 x_width, y_width, // x & y fields width 328 3, // nb virtual channels329 341 4,4); // input & output fifo depths 330 342 343 //////////// DSPIN INT_RSP ROUTER //////////////////////////////////////////// 331 344 std::ostringstream s_int_router_rsp; 332 s_int_router_rsp << " router_rsp_" << x_id << "_" << y_id;333 int_router_rsp = new VirtualDspinRouter<dspin_int_rsp_width>(345 s_int_router_rsp << "int_router_rsp_" << x_id << "_" << y_id; 346 int_router_rsp = new DspinRouter<dspin_int_rsp_width>( 334 347 s_int_router_rsp.str().c_str(), 335 x_id,y_id, // routercoordinates in mesh348 x_id,y_id, // coordinates in mesh 336 349 x_width, y_width, // x & y fields width 337 2, // nb virtual channels338 350 4,4); // input & output fifo depths 339 351 340 ////////////// XRAM 352 //////////// DSPIN INT_M2P ROUTER //////////////////////////////////////////// 353 std::ostringstream s_int_router_m2p; 354 s_int_router_m2p << "int_router_m2p_" << x_id << "_" << y_id; 355 int_router_m2p = new DspinRouter<dspin_int_cmd_width>( 356 s_int_router_m2p.str().c_str(), 357 x_id,y_id, // coordinate in the mesh 358 x_width, y_width, // x & y fields width 359 4,4, // input & output fifo depths 360 true); // broadcast supported 361 362 //////////// DSPIN INT_P2M ROUTER //////////////////////////////////////////// 363 std::ostringstream s_int_router_p2m; 364 s_int_router_p2m << "int_router_p2m_" << x_id << "_" << y_id; 365 int_router_p2m = new DspinRouter<dspin_int_rsp_width>( 366 s_int_router_p2m.str().c_str(), 367 x_id,y_id, // coordinates in mesh 368 x_width, y_width, // x & y fields width 369 4,4); // input & output fifo depths 370 371 //////////// DSPIN INT_CLA ROUTER //////////////////////////////////////////// 372 std::ostringstream s_int_router_cla; 373 s_int_router_cla << "int_router_cla_" << x_id << "_" << y_id; 374 int_router_cla = new DspinRouter<dspin_int_cmd_width>( 375 s_int_router_cla.str().c_str(), 376 x_id,y_id, // coordinate in the mesh 377 x_width, y_width, // x & y fields width 378 4,4); // input & output fifo depths 379 380 ////////////// XRAM ///////////////////////////////////////////////////////// 341 381 std::ostringstream s_xram; 342 382 s_xram << "xram_" << x_id << "_" << y_id; … … 356 396 x_width + y_width + l_width); 357 397 358 //////////// / RAM ROUTER(S)398 //////////// DSPIN RAM_CMD ROUTER /////////////////////////////////////////// 359 399 std::ostringstream s_ram_router_cmd; 360 400 s_ram_router_cmd << "ram_router_cmd_" << x_id << "_" << y_id; … … 366 406 4, 4); // input & output fifo depths 367 407 408 //////////// DSPIN RAM_RSP ROUTER /////////////////////////////////////////// 368 409 std::ostringstream s_ram_router_rsp; 369 410 s_ram_router_rsp << "ram_router_rsp_" << x_id << "_" << y_id; … … 376 417 377 418 378 ////////////////////// I/O CLUSTER ONLY /////////////////////// 419 ////////////////////// I/O CLUSTER ONLY /////////////////////////////////// 379 420 if ( is_io ) 380 421 { 381 /////////// IO_BRIDGE 422 /////////// IO_BRIDGE //////////////////////////////////////////////////// 382 423 std::ostringstream s_iob; 383 424 s_iob << "iob_" << x_id << "_" << y_id; … … 406 447 vci_param_int::S); 407 448 449 //////////// DSPIN RAM_CMD LOCAL_XBAR /////////////////////////////////// 408 450 std::ostringstream s_ram_xbar_cmd; 409 451 s_ram_xbar_cmd << "s_ram_xbar_cmd_" << x_id << "_" << y_id; … … 419 461 false); // support broadcast ? 420 462 463 //////////// DSPIN RAM_RSP LOCAL_XBAR /////////////////////////////////// 421 464 std::ostringstream s_ram_xbar_rsp; 422 465 s_ram_xbar_rsp << "s_ram_xbar_rsp_" << x_id << "_" << y_id; … … 431 474 true, // use routing table ? 432 475 false); // support broadcast ? 476 433 477 } // end if IO 434 478 … … 440 484 // : local srcid[memc] = nb_procs 441 485 442 //////////////////////// internal CMD & RSP routers443 int_router_cmd->p_clk (this->p_clk);444 int_router_cmd->p_resetn (this->p_resetn);445 int_router_rsp->p_clk (this->p_clk);446 int_router_rsp->p_resetn (this->p_resetn);447 448 for (int i = 0; i < 4; i++)449 {450 for(int k = 0; k < 3; k++)451 {452 int_router_cmd->p_out[i][k] (this->p_dspin_int_cmd_out[i][k]);453 int_router_cmd->p_in[i][k] (this->p_dspin_int_cmd_in[i][k]);454 }455 456 for(int k = 0; k < 2; k++)457 {458 int_router_rsp->p_out[i][k] (this->p_dspin_int_rsp_out[i][k]);459 int_router_rsp->p_in[i][k] (this->p_dspin_int_rsp_in[i][k]);460 }461 }462 463 // local ports464 int_router_cmd->p_out[4][0] (signal_int_dspin_cmd_g2l_d);465 int_router_cmd->p_out[4][1] (signal_int_dspin_m2p_g2l_c);466 int_router_cmd->p_out[4][2] (signal_int_dspin_clack_g2l_c);467 int_router_cmd->p_in[4][0] (signal_int_dspin_cmd_l2g_d);468 int_router_cmd->p_in[4][1] (signal_int_dspin_m2p_l2g_c);469 int_router_cmd->p_in[4][2] (signal_int_dspin_clack_l2g_c);470 471 int_router_rsp->p_out[4][0] (signal_int_dspin_rsp_g2l_d);472 int_router_rsp->p_out[4][1] (signal_int_dspin_p2m_g2l_c);473 int_router_rsp->p_in[4][0] (signal_int_dspin_rsp_l2g_d);474 int_router_rsp->p_in[4][1] (signal_int_dspin_p2m_l2g_c);475 476 ///////////////////// CMD DSPIN local crossbar direct477 int_xbar_d->p_clk (this->p_clk);478 int_xbar_d->p_resetn (this->p_resetn);479 int_xbar_d->p_initiator_to_up (signal_int_vci_l2g);480 int_xbar_d->p_target_to_up (signal_int_vci_g2l);481 482 int_xbar_d->p_to_target[int_memc_tgt_id] (signal_int_vci_tgt_memc);483 int_xbar_d->p_to_target[int_xicu_tgt_id] (signal_int_vci_tgt_xicu);484 int_xbar_d->p_to_target[int_mwmr_tgt_id] (signal_int_vci_tgt_mwmr);485 int_xbar_d->p_to_initiator[int_mwmr_ini_id] (signal_int_vci_ini_mwmr);486 for (size_t p = 0; p < nb_procs; p++)487 int_xbar_d->p_to_initiator[int_proc_ini_id + p] (signal_int_vci_ini_proc[p]);488 489 if ( is_io )490 {491 int_xbar_d->p_to_target[int_iobx_tgt_id] (signal_int_vci_tgt_iobx);492 int_xbar_d->p_to_initiator[int_iobx_ini_id] (signal_int_vci_ini_iobx);493 }494 495 int_wi_gate_d->p_clk (this->p_clk);496 int_wi_gate_d->p_resetn (this->p_resetn);497 int_wi_gate_d->p_vci (signal_int_vci_l2g);498 int_wi_gate_d->p_dspin_cmd (signal_int_dspin_cmd_l2g_d);499 int_wi_gate_d->p_dspin_rsp (signal_int_dspin_rsp_g2l_d);500 501 int_wt_gate_d->p_clk (this->p_clk);502 int_wt_gate_d->p_resetn (this->p_resetn);503 int_wt_gate_d->p_vci (signal_int_vci_g2l);504 int_wt_gate_d->p_dspin_cmd (signal_int_dspin_cmd_g2l_d);505 int_wt_gate_d->p_dspin_rsp (signal_int_dspin_rsp_l2g_d);506 507 ////////////////////// M2P DSPIN local crossbar coherence508 int_xbar_m2p_c->p_clk (this->p_clk);509 int_xbar_m2p_c->p_resetn (this->p_resetn);510 int_xbar_m2p_c->p_global_out (signal_int_dspin_m2p_l2g_c);511 int_xbar_m2p_c->p_global_in (signal_int_dspin_m2p_g2l_c);512 int_xbar_m2p_c->p_local_in[0] (signal_int_dspin_m2p_memc);513 for (size_t p = 0; p < nb_procs; p++)514 int_xbar_m2p_c->p_local_out[p] (signal_int_dspin_m2p_proc[p]);515 516 ////////////////////////// P2M DSPIN local crossbar coherence517 int_xbar_p2m_c->p_clk (this->p_clk);518 int_xbar_p2m_c->p_resetn (this->p_resetn);519 int_xbar_p2m_c->p_global_out (signal_int_dspin_p2m_l2g_c);520 int_xbar_p2m_c->p_global_in (signal_int_dspin_p2m_g2l_c);521 int_xbar_p2m_c->p_local_out[0] (signal_int_dspin_p2m_memc);522 for (size_t p = 0; p < nb_procs; p++)523 int_xbar_p2m_c->p_local_in[p] (signal_int_dspin_p2m_proc[p]);524 525 ////////////////////// CLACK DSPIN local crossbar coherence526 int_xbar_clack_c->p_clk (this->p_clk);527 int_xbar_clack_c->p_resetn (this->p_resetn);528 int_xbar_clack_c->p_global_out (signal_int_dspin_clack_l2g_c);529 int_xbar_clack_c->p_global_in (signal_int_dspin_clack_g2l_c);530 int_xbar_clack_c->p_local_in[0] (signal_int_dspin_clack_memc);531 for (size_t p = 0; p < nb_procs; p++)532 int_xbar_clack_c->p_local_out[p] (signal_int_dspin_clack_proc[p]);533 534 486 //////////////////////////////////// Processors 535 487 for (size_t p = 0; p < nb_procs; p++) … … 537 489 proc[p]->p_clk (this->p_clk); 538 490 proc[p]->p_resetn (this->p_resetn); 491 539 492 proc[p]->p_vci (signal_int_vci_ini_proc[p]); 540 493 proc[p]->p_dspin_m2p (signal_int_dspin_m2p_proc[p]); 541 494 proc[p]->p_dspin_p2m (signal_int_dspin_p2m_proc[p]); 542 proc[p]->p_dspin_clack (signal_int_dspin_cla ck_proc[p]);495 proc[p]->p_dspin_clack (signal_int_dspin_cla_proc[p]); 543 496 544 497 for ( size_t j = 0 ; j < 6 ; j++) … … 549 502 } 550 503 504 std::cout << " - processors connected" << std::endl; 505 551 506 ///////////////////////////////////// XICU 552 507 xicu->p_clk (this->p_clk); … … 563 518 else xicu->p_hwi[i] (signal_false); 564 519 } 520 521 std::cout << " - xcu connected" << std::endl; 565 522 566 523 ///////////////////////////////////// MEMC … … 571 528 memc->p_dspin_p2m (signal_int_dspin_p2m_memc); 572 529 memc->p_dspin_m2p (signal_int_dspin_m2p_memc); 573 memc->p_dspin_clack (signal_int_dspin_cla ck_memc);530 memc->p_dspin_clack (signal_int_dspin_cla_memc); 574 531 memc->p_irq (signal_irq_memc); 575 532 … … 581 538 memc_ram_wi->p_vci (signal_ram_vci_ini_memc); 582 539 540 std::cout << " - memc connected" << std::endl; 541 583 542 //////////////////////////////////// XRAM 584 543 xram->p_clk (this->p_clk); … … 592 551 xram_ram_wt->p_dspin_rsp (signal_ram_dspin_rsp_xram_t); 593 552 xram_ram_wt->p_vci (signal_ram_vci_tgt_xram); 553 554 std::cout << " - xram connected" << std::endl; 594 555 595 556 /////////////////////////////////// GCD coprocessor … … 633 594 } 634 595 596 std::cout << " - coproc connected" << std::endl; 597 635 598 /////////////////////////////////// CPY coprocessor 636 599 if ( coproc_type == MWR_COPROC_CPY ) … … 652 615 } 653 616 654 //////////////////////////// RAM network CMD & RSP routers617 //////////////////////////// RAM NETWORK ROUTERS 655 618 ram_router_cmd->p_clk (this->p_clk); 656 619 ram_router_cmd->p_resetn (this->p_resetn); 657 620 ram_router_rsp->p_clk (this->p_clk); 658 621 ram_router_rsp->p_resetn (this->p_resetn); 622 659 623 for( size_t n=0 ; n<4 ; n++) 660 624 { … … 678 642 ram_router_rsp->p_out[4] (signal_ram_dspin_rsp_memc_i); 679 643 } 644 645 ///////////////////////////// INT NETWORK ROUTERS 646 int_router_cmd->p_clk (this->p_clk); 647 int_router_cmd->p_resetn (this->p_resetn); 648 int_router_rsp->p_clk (this->p_clk); 649 int_router_rsp->p_resetn (this->p_resetn); 650 int_router_m2p->p_clk (this->p_clk); 651 int_router_m2p->p_resetn (this->p_resetn); 652 int_router_p2m->p_clk (this->p_clk); 653 int_router_p2m->p_resetn (this->p_resetn); 654 int_router_cla->p_clk (this->p_clk); 655 int_router_cla->p_resetn (this->p_resetn); 656 657 // loop on N/S/E/W ports 658 for (size_t i = 0; i < 4; i++) 659 { 660 int_router_cmd->p_out[i] (this->p_dspin_int_cmd_out[i]); 661 int_router_cmd->p_in[i] (this->p_dspin_int_cmd_in[i]); 662 663 int_router_rsp->p_out[i] (this->p_dspin_int_rsp_out[i]); 664 int_router_rsp->p_in[i] (this->p_dspin_int_rsp_in[i]); 665 666 int_router_m2p->p_out[i] (this->p_dspin_int_m2p_out[i]); 667 int_router_m2p->p_in[i] (this->p_dspin_int_m2p_in[i]); 668 669 int_router_p2m->p_out[i] (this->p_dspin_int_p2m_out[i]); 670 int_router_p2m->p_in[i] (this->p_dspin_int_p2m_in[i]); 671 672 int_router_cla->p_out[i] (this->p_dspin_int_cla_out[i]); 673 int_router_cla->p_in[i] (this->p_dspin_int_cla_in[i]); 674 } 675 676 int_router_cmd->p_out[4] (signal_int_dspin_cmd_g2l_d); 677 int_router_cmd->p_in[4] (signal_int_dspin_cmd_l2g_d); 678 679 int_router_rsp->p_out[4] (signal_int_dspin_rsp_g2l_d); 680 int_router_rsp->p_in[4] (signal_int_dspin_rsp_l2g_d); 681 682 int_router_m2p->p_out[4] (signal_int_dspin_m2p_g2l_c); 683 int_router_m2p->p_in[4] (signal_int_dspin_m2p_l2g_c); 684 685 int_router_p2m->p_out[4] (signal_int_dspin_p2m_g2l_c); 686 int_router_p2m->p_in[4] (signal_int_dspin_p2m_l2g_c); 687 688 int_router_cla->p_out[4] (signal_int_dspin_cla_g2l_c); 689 int_router_cla->p_in[4] (signal_int_dspin_cla_l2g_c); 690 691 std::cout << " - internal routers connected" << std::endl; 692 693 694 ///////////////////// CMD DSPIN local crossbar direct 695 int_xbar_d->p_clk (this->p_clk); 696 int_xbar_d->p_resetn (this->p_resetn); 697 int_xbar_d->p_initiator_to_up (signal_int_vci_l2g); 698 int_xbar_d->p_target_to_up (signal_int_vci_g2l); 699 700 int_xbar_d->p_to_target[int_memc_tgt_id] (signal_int_vci_tgt_memc); 701 int_xbar_d->p_to_target[int_xicu_tgt_id] (signal_int_vci_tgt_xicu); 702 int_xbar_d->p_to_target[int_mwmr_tgt_id] (signal_int_vci_tgt_mwmr); 703 int_xbar_d->p_to_initiator[int_mwmr_ini_id] (signal_int_vci_ini_mwmr); 704 for (size_t p = 0; p < nb_procs; p++) 705 int_xbar_d->p_to_initiator[int_proc_ini_id + p] (signal_int_vci_ini_proc[p]); 706 707 if ( is_io ) 708 { 709 int_xbar_d->p_to_target[int_iobx_tgt_id] (signal_int_vci_tgt_iobx); 710 int_xbar_d->p_to_initiator[int_iobx_ini_id] (signal_int_vci_ini_iobx); 711 } 712 713 int_wi_gate_d->p_clk (this->p_clk); 714 int_wi_gate_d->p_resetn (this->p_resetn); 715 int_wi_gate_d->p_vci (signal_int_vci_l2g); 716 int_wi_gate_d->p_dspin_cmd (signal_int_dspin_cmd_l2g_d); 717 int_wi_gate_d->p_dspin_rsp (signal_int_dspin_rsp_g2l_d); 718 719 int_wt_gate_d->p_clk (this->p_clk); 720 int_wt_gate_d->p_resetn (this->p_resetn); 721 int_wt_gate_d->p_vci (signal_int_vci_g2l); 722 int_wt_gate_d->p_dspin_cmd (signal_int_dspin_cmd_g2l_d); 723 int_wt_gate_d->p_dspin_rsp (signal_int_dspin_rsp_l2g_d); 724 725 ////////////////////// M2P DSPIN local crossbar coherence 726 int_xbar_m2p_c->p_clk (this->p_clk); 727 int_xbar_m2p_c->p_resetn (this->p_resetn); 728 int_xbar_m2p_c->p_global_out (signal_int_dspin_m2p_l2g_c); 729 int_xbar_m2p_c->p_global_in (signal_int_dspin_m2p_g2l_c); 730 int_xbar_m2p_c->p_local_in[0] (signal_int_dspin_m2p_memc); 731 for (size_t p = 0; p < nb_procs; p++) 732 int_xbar_m2p_c->p_local_out[p] (signal_int_dspin_m2p_proc[p]); 733 734 ////////////////////////// P2M DSPIN local crossbar coherence 735 int_xbar_p2m_c->p_clk (this->p_clk); 736 int_xbar_p2m_c->p_resetn (this->p_resetn); 737 int_xbar_p2m_c->p_global_out (signal_int_dspin_p2m_l2g_c); 738 int_xbar_p2m_c->p_global_in (signal_int_dspin_p2m_g2l_c); 739 int_xbar_p2m_c->p_local_out[0] (signal_int_dspin_p2m_memc); 740 for (size_t p = 0; p < nb_procs; p++) 741 int_xbar_p2m_c->p_local_in[p] (signal_int_dspin_p2m_proc[p]); 742 743 ////////////////////// CLACK DSPIN local crossbar coherence 744 int_xbar_clack_c->p_clk (this->p_clk); 745 int_xbar_clack_c->p_resetn (this->p_resetn); 746 int_xbar_clack_c->p_global_out (signal_int_dspin_cla_l2g_c); 747 int_xbar_clack_c->p_global_in (signal_int_dspin_cla_g2l_c); 748 int_xbar_clack_c->p_local_in[0] (signal_int_dspin_cla_memc); 749 for (size_t p = 0; p < nb_procs; p++) 750 int_xbar_clack_c->p_local_out[p] (signal_int_dspin_cla_proc[p]); 751 680 752 681 753 ///////////////////////// IOB exists only in cluster_iob0 & cluster_iob1.
Note: See TracChangeset
for help on using the changeset viewer.
