Changeset 1058


Ignore:
Timestamp:
Jun 19, 2018, 5:01:20 PM (6 years ago)
Author:
alain
Message:

bloup

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/platforms/tsar_generic_leti/arch_info.py

    r1057 r1058  
    1717#  The constructor prototype format is imposed by the genarch.py application,
    1818#  and should not be modified.
    19 #  The default argument values are for the TSARLET prototype.
    20 #
    21 #  The "tsar_generic_leti" architecture  includes 6 external peripherals located
    22 #  in cluster[x_size-1][y_size-1]: TTY, IOC, FBF, NIC, CMA, PIC.
    23 #  It does not use the IOB component.
     19#  The default argument values are for the TSARLET 16 cores prototype.
     20#
     21#  The "tsar_generic_leti" architecture  includes 5 external peripherals located
     22#  in cluster[x_size-1][y_size-1]: TTY, IOC, FBF, NIC, PIC.
     23#  The upper row (y = y_size-1) does not contain processors or memory.
     24#  The "tsar_generic_leti" does not use the IOB component.
    2425#  It does not use an external ROM, as the preloader code is (pre)loaded
    2526#  at address 0x0, in the physical memory of cluster[0][0].
    2627#
    27 #  The upper row (y = y_size-1) does not contain processors or memory.
     28#  Two backup peripherals one (one TXT_TTY and one IOC_BDV) are connected
     29#  on local interconnect in cluster 0.
    2830#
    2931#  The "constructor" parameters (defined in Makefile) are:
     
    170172                              srcdev = mmc )
    171173
    172                 ### TTY backup
     174                ### TTY and IOC backup
    173175                if ( x==0 ) and ( y==0 ):
    174176                    tty_bak = archi.addDevice( ptype    = 'TXT_TTY',
     
    178180
    179181                    archi.addIrq( dstdev  = xcu,
    180                                   port    = 10,
     182                                  port    = TODO
    181183                                  srcdev  = tty_bak,
    182184                                  channel = 0,
    183185                                  is_rx   = False )
     186
     187                    ioc_bak = archi.addDevice( ptype    = 'IOC_BDV',
     188                                               base     = ioc_base + offset,
     189                                               size     = ioc_size )
     190
     191                    archi.addIrq( dstdev  = xcu,
     192                                  port    = TODO
     193                                  srcdev  = ioc_bak )
    184194
    185195                for p in xrange ( nb_cores ):
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