Changeset 123
- Timestamp:
- Jan 7, 2011, 1:50:18 PM (13 years ago)
- Location:
- trunk/modules/vci_synthetic_initator/caba/sources
- Files:
-
- 2 edited
-
include/vci_synthetic_initiator.h (modified) (7 diffs)
-
src/vci_synthetic_initiator.cpp (modified) (14 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/modules/vci_synthetic_initator/caba/sources/include/vci_synthetic_initiator.h
r122 r123 4 4 * Copyright : UPMC / LIP6 5 5 * Authors : Christophe Choichillon 6 * 6 * Version : 2.0 7 * 7 8 * SOCLIB_LGPL_HEADER_BEGIN 8 9 * … … 27 28 * Maintainers: christophe.choichillon@lip6.fr 28 29 */ 29 /*30 TODO : Adding the broadcast latency31 */32 30 33 31 #ifndef SOCLIB_CABA_SYNTHETIC_INITIATOR_H … … 43 41 #include "mapping_table.h" 44 42 #include "arithmetics.h" 43 //#include <cmath> 45 44 46 45 namespace soclib { namespace caba { … … 63 62 VCI_IDLE, 64 63 VCI_SINGLE_SEND, 65 VCI_SINGLE_RECEIVE,66 64 VCI_BC_SEND, 67 VCI_BC_RECEIVE68 65 }; 69 // enum gen_fsm_state_e{ 70 // A_IDLE, 71 // A_DATA 72 // }; 66 67 enum bc_rsp_fsm_state_e{ 68 BC_RSP_IDLE, 69 BC_RSP_WAIT_RSP 70 }; 71 73 72 74 73 uint64_t m_cpt_cycles; // Counter of cycles … … 90 89 const uint32_t length, // Packet length (flit numbers) 91 90 const uint32_t rho, // Packets ratio on the network 92 //const float rho, // Packets ratio on the network93 91 const uint32_t depth, // Fifo depth 94 92 const uint32_t xmesh, … … 137 135 uint64_t m_latency1; // Average latency wanted 138 136 uint64_t m_latency2; // Average latency 139 size_t m_bc_nrsp; // Expected number of responses for a broadcast command140 137 addr_t m_address_to_send; // Address to send the write command 141 138 uint32_t m_local_seed; 139 int m_id_to_send; 142 140 143 141 uint64_t m_start_latency_bc; … … 145 143 uint64_t m_nb_bc; 146 144 145 static const int tab_size = 1 << vci_param::T; 147 146 // Fifo transmitting date to the VCI FSM 148 GenericFifo<uint32_t> m_date_fifo;147 GenericFifo<uint32_t> m_date_fifo; 149 148 150 //sc_signal<int> r_cmd_fsm; 151 sc_signal<int> r_vci_fsm; 149 sc_signal<int> r_cmd_fsm; 152 150 153 sc_signal<int> r_bc_rsp_fsm;151 sc_signal<int> r_bc_rsp_fsm; 154 152 155 sc_signal<size_t> r_index;153 sc_signal<size_t> r_index; 156 154 157 sc_signal<bool> r_broadcast_req; 155 sc_signal<bool> r_broadcast_req; 156 157 sc_signal<bool> r_broadcast_rsp; 158 159 sc_signal<uint32_t> r_bc_nrsp; // Expected number of responses for a broadcast command 160 161 sc_signal<uint64_t> **r_req_id; 158 162 159 163 -
trunk/modules/vci_synthetic_initator/caba/sources/src/vci_synthetic_initiator.cpp
r122 r123 1 1 2 /* -*- c++ -*- 2 * File : vci_ traffic_generator.cpp3 * Date : 2 6/08/20103 * File : vci_synthetic_initiator.cpp 4 * Date : 23/12/2010 4 5 * Copyright : UPMC / LIP6 5 6 * Authors : Christophe Choichillon 7 * Version : 2.0 6 8 * 7 9 * SOCLIB_LGPL_HEADER_BEGIN … … 82 84 m_date_fifo("m_date_fifo", depth), 83 85 m_local_seed(m_srcid), 84 r_ vci_fsm("r_vci_fsm")86 r_cmd_fsm("r_cmd_fsm") 85 87 { 86 88 89 r_req_id = new sc_signal<uint64_t>*[tab_size]; 90 for(int i = 0; i < tab_size ; i++){ 91 r_req_id[i] = new sc_signal<uint64_t>[2]; 92 } 87 93 88 94 SC_METHOD(transition); … … 123 129 ////////////////////////////////// 124 130 { 125 const char* state_str[] = { "IDLE", 126 "SINGLE_SEND", 127 "SINGLE_RECEIVE", 128 "BC_SEND", 129 "BC_RECEIVE" }; 131 const char* state_cmd_str[] = { "IDLE", 132 "SINGLE_SEND", 133 "BC_SEND"}; 134 135 const char* state_bc_rsp_str[] = {"IDLE", 136 "WAIT_RSP"}; 130 137 131 138 std::cout << "Vci_Synthetic_Initiator " << name() 132 139 << " : " << std::dec << m_cpt_cycles << " cycles " 133 << " : state = " << state_str[r_vci_fsm] 140 << " : state_cmd_fsm = " << state_cmd_str[r_cmd_fsm] 141 << " : state_rsp_fsm = " << state_bc_rsp_str[r_bc_rsp_fsm] 134 142 << " Adresse to send : " << std::hex << m_address_to_send 135 << " Number of broadcast to receive : " << std::dec << m_bc_nrsp << std::endl; 143 << " Number of broadcast to receive : " << std::dec << r_bc_nrsp.read() 144 << " Number of packets sent : " << std::dec << m_npackets << m_id_to_send << std::endl; 145 for(int i = 0; i < (1<<vci_param::T) ; i++){ 146 std::cout << "ID : " << i << " " << r_req_id[i][0].read() << " " << r_req_id[i][0].read() << std::endl; 147 } 136 148 } 137 149 … … 158 170 159 171 // Initializing FSMs 160 r_vci_fsm = VCI_IDLE; 172 r_cmd_fsm = VCI_IDLE; 173 174 r_bc_rsp_fsm = BC_RSP_IDLE; 161 175 162 176 // Initializing FIFOs … … 173 187 m_latency_bc = 0; 174 188 m_nb_bc = 0; 189 m_id_to_send = -1; 175 190 176 191 r_broadcast_req = false; 192 193 r_broadcast_rsp = false; 194 195 r_bc_nrsp = 0; 196 197 for(int i = 0; i < tab_size; i++){ 198 r_req_id[i][0] = 0; 199 r_req_id[i][1] = 0; 200 //std::cout << name() << " bla bla " << i << std::endl; 201 } 177 202 178 203 return; … … 184 209 185 210 186 switch ( r_vci_fsm.read() ) { 187 188 std::cout << m_cpt_cycles << " cycles, " << m_npackets << " packets sent" << std::endl; 189 //printStats(); 211 // FSM controling effective requests send 212 switch ( r_cmd_fsm.read() ) { 190 213 ////////////////// 191 214 case VCI_IDLE: 192 215 { 193 216 if (m_date_fifo.rok()){ 194 if (r_broadcast_req.read() ){217 if (r_broadcast_req.read() && !r_broadcast_rsp.read()){ 195 218 m_address_to_send = 0x3 | (0x7c1f << vci_param::N-20) ; 196 r_ vci_fsm = VCI_BC_SEND ;219 r_cmd_fsm = VCI_BC_SEND ; 197 220 } else { 198 r_vci_fsm = VCI_SINGLE_SEND ; 221 for(int i = 0; i < tab_size; i++){ 222 if(r_req_id[i][0] == 0){ 223 m_id_to_send = i; 224 break; 225 }else{ 226 m_id_to_send = -1; 227 } 228 } 229 if(m_id_to_send == -1){ 230 r_cmd_fsm = VCI_IDLE ; 231 break; 232 } else { 233 r_cmd_fsm = VCI_SINGLE_SEND ; 234 } 199 235 #ifdef DETERMINISTIC 200 236 m_address_to_send = destAdress(&m_local_seed) << (vci_param::N)-(soclib::common::uint32_log2((uint32_t)m_xmesh)+soclib::common::uint32_log2((uint32_t)m_ymesh)); … … 212 248 if (p_vci.cmdack.read()){ 213 249 if (m_count == m_length-1) { 214 m_start_latency1 = m_date_fifo.read(); 215 m_start_latency2 = m_cpt_cycles; 216 r_vci_fsm = VCI_SINGLE_RECEIVE ; 250 r_req_id[(int)m_id_to_send][0] = m_date_fifo.read(); 251 r_req_id[m_id_to_send][1] = m_cpt_cycles; 252 date_fifo_get = true; 253 r_cmd_fsm = VCI_IDLE ; 217 254 } else { 218 r_ vci_fsm = VCI_SINGLE_SEND ;255 r_cmd_fsm = VCI_SINGLE_SEND ; 219 256 m_count++; 220 257 } … … 222 259 break; 223 260 } 224 //////////////////////225 case VCI_ SINGLE_RECEIVE:261 /////////////////// 262 case VCI_BC_SEND: 226 263 { 227 264 if (p_vci.rspval.read()) { 228 m_latency1 = m_latency1 + (m_cpt_cycles - m_start_latency1); 229 m_latency2 = m_latency2 + (m_cpt_cycles - m_start_latency2); 230 m_npackets++; 265 r_bc_nrsp = (m_xmax - m_xmin) * (m_ymax - m_ymin) ; 266 m_start_latency_bc = m_cpt_cycles; 231 267 date_fifo_get = true; 232 m_address_to_send = 0; 233 r_vci_fsm = VCI_IDLE ; 234 } 235 break; 236 } 237 /////////////////// 238 case VCI_BC_SEND: 239 { 240 if (p_vci.cmdack.read()) { 241 m_bc_nrsp = (m_xmax - m_xmin) * (m_ymax - m_ymin) ; 242 m_start_latency_bc = m_cpt_cycles; 243 r_vci_fsm = VCI_BC_RECEIVE; 268 r_broadcast_rsp = true; 269 r_bc_rsp_fsm = VCI_IDLE; 244 270 break; 245 271 } 246 272 } 247 //////////////////// 248 case VCI_BC_RECEIVE: 249 { 250 if (p_vci.rspval.read()){ 251 if (m_bc_nrsp == 1) { 273 274 } // end switch vci_fsm 275 276 switch(r_bc_rsp_fsm.read()){ 277 /////////////////// 278 case BC_RSP_IDLE: 279 { 280 if (p_vci.rspval.read() && r_broadcast_rsp.read()) { 281 r_bc_rsp_fsm = BC_RSP_WAIT_RSP; 282 break; 283 } 284 } 285 //////////////////// 286 case BC_RSP_WAIT_RSP: 287 { 288 if (p_vci.rspval.read() && (p_vci.rpktid.read() == 1)){ 289 if (r_bc_nrsp == 1) { 252 290 r_broadcast_req = false; 291 r_broadcast_rsp = false; 253 292 m_address_to_send = 0; 254 date_fifo_get = true;255 293 m_latency_bc = m_latency_bc + (m_cpt_cycles - m_start_latency_bc); 256 294 m_nb_bc++; 257 r_ vci_fsm = VCI_IDLE ;295 r_bc_rsp_fsm = BC_RSP_IDLE ; 258 296 } else { 259 m_bc_nrsp--;260 r_ vci_fsm = VCI_BC_RECEIVE;297 r_bc_nrsp = r_bc_nrsp.read() - 1;; 298 r_bc_rsp_fsm = BC_RSP_WAIT_RSP ; 261 299 } 262 300 } 263 301 break; 264 } 265 } // end switch vci_fsm 266 302 } 303 } 304 305 if(p_vci.rspval.read()){ 306 if((int)(p_vci.pktid.read()) == 0){ 307 m_latency1 = m_latency1 + (m_cpt_cycles - r_req_id[(int)(p_vci.trdid.read())][0]); 308 m_latency2 = m_latency2 + (m_cpt_cycles - r_req_id[(int)(p_vci.trdid.read())][1]); 309 m_npackets++; 310 r_req_id[(int)(p_vci.trdid.read())][0] = 0; 311 r_req_id[(int)(p_vci.trdid.read())][1] = 0; 312 } 313 } 267 314 268 315 /////////////////// Filling fifo … … 305 352 p_vci.cmd = vci_param::CMD_WRITE; 306 353 p_vci.be = 0xF; 354 p_vci.srcid = m_srcid; 307 355 p_vci.pktid = 0; 308 p_vci.srcid = m_srcid;309 356 p_vci.cons = false; 310 357 p_vci.wrap = false; … … 312 359 p_vci.clen = 0; 313 360 p_vci.cfixed = false; 314 315 316 switch ( r_vci_fsm.read() ) { 361 p_vci.rspack = true; 362 363 364 switch ( r_cmd_fsm.read() ) { 317 365 318 366 ////////////////// … … 325 373 p_vci.trdid = 0; 326 374 p_vci.eop = false; 327 p_vci.rspack = false;328 375 break; 329 376 } … … 335 382 p_vci.plen = m_length*4; 336 383 p_vci.wdata = 0; 337 p_vci.trdid = 0;384 p_vci.trdid = m_id_to_send; 338 385 if (m_count == m_length - 1 ) { 339 386 p_vci.eop = true; … … 341 388 p_vci.eop = false; 342 389 } 343 p_vci.rspack = false; 344 break; 345 } 346 ////////////////////// 347 case VCI_SINGLE_RECEIVE: 348 { 349 p_vci.cmdval = false; 350 p_vci.address = 0; 351 p_vci.plen = 0; 352 p_vci.wdata = 0; 353 p_vci.trdid = 0; 354 p_vci.eop = false; 355 p_vci.rspack = true; 356 break; 390 break; 357 391 } 358 392 /////////////////// … … 363 397 p_vci.plen = 4; 364 398 p_vci.wdata = 0; 399 p_vci.pktid = 1; 365 400 p_vci.trdid = 0; 366 401 p_vci.eop = true; 367 p_vci.rspack = false; 368 break; 369 } 370 //////////////////// 371 case VCI_BC_RECEIVE: 372 { 373 p_vci.cmdval = false; 374 p_vci.address = 0; 375 p_vci.plen = 0; 376 p_vci.wdata = 0; 377 p_vci.trdid = 0; 378 p_vci.eop = false; 379 p_vci.rspack = true; 380 break; 381 } 382 } // end switch vci_fsm 402 break; 403 } 404 } // end switch vci_cmd_fsm 383 405 384 406 } // end genMoore()
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