Index: trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
===================================================================
--- trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 395)
+++ trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp	(revision 403)
@@ -84,4 +84,5 @@
   "CC_RECEIVE_IDLE",
   "CC_RECEIVE_CLEANUP",
+  "CC_RECEIVE_CLEANUP_EOP",
   "CC_RECEIVE_MULTI_ACK"
 };
@@ -1097,18 +1098,14 @@
   switch(r_multi_ack_fsm.read())
   {
+    ///////////////////
     case MULTI_ACK_IDLE:
       {
         bool multi_ack_fifo_rok = m_cc_receive_to_multi_ack_fifo.rok();
 
-        // None Multicast Acknowledgement received and
-        // none WRITE FSM UPT decrement request
-        if( not multi_ack_fifo_rok and
-            not r_write_to_multi_ack_req.read())
-        {
-          break;
-        }
-
-        // WRITE FSM request to decrement update table response counter
-        // Priority to Multicast Acknowledgement priority
+        // No CC_RECEIVE FSM request and no WRITE FSM request
+        if( not multi_ack_fifo_rok and not r_write_to_multi_ack_req.read()) break;
+
+        // handling WRITE FSM request to decrement update table response counter
+        // if no CC_RECEIVE FSM request
         if(not multi_ack_fifo_rok)
         {
@@ -1120,5 +1117,5 @@
         }
 
-        // Multicast Acknowledgement received 
+        // Handling CC_RECEIVE FSM request 
         uint64_t flit = m_cc_receive_to_multi_ack_fifo.read();
 
@@ -1126,31 +1123,6 @@
           DspinDhccpParam::dspin_get(flit, DspinDhccpParam::MULTI_ACK_UPDT_INDEX);
 
-        bool eop =
-          (DspinDhccpParam::dspin_get(flit, DspinDhccpParam::FROM_L1_EOP) == 0x1);
-
-        if(updt_index >= m_upt.size())
-        {
-          std::cout
-            << "VCI_MEM_CACHE ERROR " << name()
-            << " MULTI_ACK_IDLE state" << std::endl
-            << "index too large for UPT: "
-            << std::dec
-            << " / UPT index = " << updt_index
-            << " / UPT size = "  << m_upt.size()
-            << std::endl;
-
-          exit(0);
-        }
-
-        if(not eop)
-        {
-          std::cout
-            << "VCI_MEM_CACHE ERROR " << name()
-            << " MULTI_ACK_IDLE state" << std::endl
-            << "A Multicast Acknowledgement must be an one flit packet"
-            << std::endl;
-
-          exit(0);
-        }
+        assert( (updt_index < m_upt.size()) and
+        "VCI_MEM_CACHE ERROR in MULTI_ACK_IDLE : index too large for UPT");
 
         cc_receive_to_multi_ack_fifo_get = true;
@@ -1171,4 +1143,5 @@
       }
 
+    ////////////////////////
     case MULTI_ACK_UPT_LOCK:
       {
@@ -1214,4 +1187,5 @@
       }
 
+    /////////////////////////
     case MULTI_ACK_UPT_CLEAR:
       {
@@ -1258,4 +1232,5 @@
       }
 
+    /////////////////////////
     case MULTI_ACK_WRITE_RSP:
       {
@@ -3751,7 +3726,7 @@
   switch(r_cleanup_fsm.read())
   {
-    case CLEANUP_IDLE:
-    {
-      // Get first DSPIN flit of the CLEANUP command
+    //////////////////
+    case CLEANUP_IDLE:     // Get first DSPIN flit of the CLEANUP command
+    {
       if(not m_cc_receive_to_cleanup_fifo.rok()) break;
 
@@ -3776,6 +3751,5 @@
         DspinDhccpParam::dspin_get(
             flit,
-            DspinDhccpParam::CLEANUP_NLINE_MSB) 
-        << 32;
+            DspinDhccpParam::CLEANUP_NLINE_MSB) << 32;
 
       r_cleanup_inst  = (type == DspinDhccpParam::TYPE_CLEANUP_INST);
@@ -3794,5 +3768,5 @@
       m_cpt_cleanup++;
       cc_receive_to_cleanup_fifo_get = true;
-      r_cleanup_fsm                 = CLEANUP_GET_NLINE;
+      r_cleanup_fsm                  = CLEANUP_GET_NLINE;
 
 #if DEBUG_MEMC_CLEANUP
@@ -3810,26 +3784,17 @@
     }
 
-    case CLEANUP_GET_NLINE:
-    {
-      // Get second flit of cleanup command
+    ///////////////////////
+    case CLEANUP_GET_NLINE:  // GET second DSPIN flit of the cleanup command
+    {
       if(not m_cc_receive_to_cleanup_fifo.rok()) break;
 
       uint64_t flit = m_cc_receive_to_cleanup_fifo.read();
 
-      addr_t nline =
-        r_cleanup_nline.read() |
+      addr_t nline = r_cleanup_nline.read() |
         DspinDhccpParam::dspin_get(flit, DspinDhccpParam::CLEANUP_NLINE_LSB);
 
-      bool eop =
-        DspinDhccpParam::dspin_get(flit, DspinDhccpParam::FROM_L1_EOP) == 0x1;
-
-      assert(
-          eop &&
-          "VCI_MEM_CACHE ERROR: "
-          "CLEANUP command must have exactly two flits");
-
       cc_receive_to_cleanup_fifo_get = true;
-      r_cleanup_nline               = nline;
-      r_cleanup_fsm                 = CLEANUP_DIR_REQ;
+      r_cleanup_nline                = nline;
+      r_cleanup_fsm                  = CLEANUP_DIR_REQ;
 
 #if DEBUG_MEMC_CLEANUP
@@ -3847,4 +3812,5 @@
     }
 
+    /////////////////////
     case CLEANUP_DIR_REQ:
     {
@@ -3865,4 +3831,5 @@
     }
 
+    //////////////////////
     case CLEANUP_DIR_LOCK:
     {
@@ -3946,4 +3913,5 @@
     }
 
+    ///////////////////////
     case CLEANUP_DIR_WRITE:
     {
@@ -4020,4 +3988,5 @@
     }
 
+    //////////////////////
     case CLEANUP_HEAP_REQ:
     {
@@ -4039,4 +4008,5 @@
     }
 
+    //////////////////////
     case CLEANUP_HEAP_LOCK:
     {
@@ -4198,4 +4168,5 @@
     }
 
+    ////////////////////////
     case CLEANUP_HEAP_SEARCH:
     {
@@ -5969,4 +5940,5 @@
   switch(r_cc_receive_fsm.read())
   {
+    /////////////////////
     case CC_RECEIVE_IDLE:
       {
@@ -5993,54 +5965,47 @@
         assert(
             false && 
-            "VCI_MEM_CACHE ERROR: Incorrect type in coherence request from "
-            "L1 Cache");
+            "VCI_MEM_CACHE ERROR: Illegal type in coherence request");
         
         break;
       }
-    case CC_RECEIVE_CLEANUP:
-      {
-        // wait for a valid cleanup flit
-        // wait for a WOK in the CC_RECEIVE to CLEANUP fifo
+    ////////////////////////
+    case CC_RECEIVE_CLEANUP:  // write first CLEANUP flit in CC_RECEIVE to CLEANUP fifo
+      {
         if(not p_dspin_in.write or not m_cc_receive_to_cleanup_fifo.wok()) break;
 
-        bool eop = (
-            DspinDhccpParam::dspin_get(
-              p_dspin_in.data.read(),
-              DspinDhccpParam::FROM_L1_EOP)
-            == 0x1);
+        assert( not p_dspin_in.eop.read() and
+        "VCI_MEM_CACHE ERROR in CC_RECEIVE : CLEANUP command must have two flits");
 
         cc_receive_to_cleanup_fifo_put = true;
-        if(eop)
-        {
-          r_cc_receive_fsm = CC_RECEIVE_IDLE;
-        }
+        r_cc_receive_fsm               = CC_RECEIVE_CLEANUP_EOP;
 
         break;
       }
+    ////////////////////////////
+    case CC_RECEIVE_CLEANUP_EOP:  // write second CLEANUP flit in CC_RECEIVE to CLEANUP fifo
+      {
+        if(not p_dspin_in.write or not m_cc_receive_to_cleanup_fifo.wok()) break;
+
+        assert( p_dspin_in.eop.read() and
+        "VCI_MEM_CACHE ERROR in CC_RECEIVE : CLEANUP command must have two flits");
+
+        cc_receive_to_cleanup_fifo_put = true;
+        r_cc_receive_fsm               = CC_RECEIVE_IDLE;
+
+        break;
+      }
+
+    //////////////////////////
     case CC_RECEIVE_MULTI_ACK:
       {
-        // wait for a valid multicast acknowledgement flit
         // wait for a WOK in the CC_RECEIVE to MULTI_ACK fifo
         if(not p_dspin_in.write or not m_cc_receive_to_multi_ack_fifo.wok()) break;
 
-        bool eop = (
-            DspinDhccpParam::dspin_get(
-              p_dspin_in.data.read(),
-              DspinDhccpParam::FROM_L1_EOP) 
-            == 0x1);
+        assert( p_dspin_in.eop.read() and
+        "VCI_MEM_CACHE ERROR in CC_RECEIVE : MULTI_ACK command must have one flit");
 
         cc_receive_to_multi_ack_fifo_put  = true;
-        if(eop)
-        {
-          r_cc_receive_fsm = CC_RECEIVE_IDLE;
-        }
-
+        r_cc_receive_fsm                  = CC_RECEIVE_IDLE;
         break;
-      }
-    default:
-      {
-        assert(
-            false &&
-            "VCI_MEM_CACHE ERROR: Invalid state in CC_RECEIVE FSM");
       }
   }
@@ -7398,13 +7363,14 @@
 
   ////////////////////////////////////////////////////////////////////
-  // Initiator command signals on the p_dspin_out port (CC_SEND FSM)
+  //  p_dspin_out port (CC_SEND FSM)
   ////////////////////////////////////////////////////////////////////
 
   p_dspin_out.write = false;
+  p_dspin_out.eop   = false;
   p_dspin_out.data  = 0;
 
   switch(r_cc_send_fsm.read())
   {
-  
+    ///////////////////////////
     case CC_SEND_XRAM_RSP_IDLE:
     case CC_SEND_WRITE_IDLE:
@@ -7413,4 +7379,5 @@
         break;
 
+    ////////////////////////
     case CC_SEND_CLEANUP_ACK:
       {
@@ -7432,9 +7399,4 @@
         DspinDhccpParam::dspin_set(
             flit,
-            1ULL,
-            DspinDhccpParam::FROM_MC_EOP);
-
-        DspinDhccpParam::dspin_set(
-            flit,
             dest,
             DspinDhccpParam::CLEANUP_ACK_DEST);
@@ -7455,4 +7417,5 @@
             DspinDhccpParam::FROM_MC_TYPE);
 
+        p_dspin_out.eop   = true;
         p_dspin_out.write = true;
         p_dspin_out.data  = flit;
@@ -7461,4 +7424,5 @@
       }
 
+    ///////////////////////////////////
     case CC_SEND_XRAM_RSP_INVAL_HEADER:
       {
@@ -7506,12 +7470,8 @@
       }
 
+    //////////////////////////////////
     case CC_SEND_XRAM_RSP_INVAL_NLINE:
       {
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            1ULL,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7521,4 +7481,5 @@
         
 
+        p_dspin_out.eop   = true;
         p_dspin_out.write = true;
         p_dspin_out.data  = flit;
@@ -7527,4 +7488,5 @@
       }
 
+    /////////////////////////////////////
     case CC_SEND_XRAM_RSP_BRDCAST_HEADER:
     case CC_SEND_WRITE_BRDCAST_HEADER:
@@ -7553,13 +7515,8 @@
         break;
       }
-
+    ////////////////////////////////////
     case CC_SEND_XRAM_RSP_BRDCAST_NLINE:
       {
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            1ULL,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7569,17 +7526,13 @@
 
         p_dspin_out.write = true;
+        p_dspin_out.eop   = true;
         p_dspin_out.data  = flit;
 
         break;
       }
-
+    /////////////////////////////////
     case CC_SEND_WRITE_BRDCAST_NLINE:
       {
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            1ULL,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7589,17 +7542,13 @@
 
         p_dspin_out.write = true;
+        p_dspin_out.eop   = true;
         p_dspin_out.data  = flit;
 
         break;
       }
-
+    ///////////////////////////////
     case CC_SEND_CAS_BRDCAST_NLINE:
       {
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            1ULL,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7609,9 +7558,10 @@
 
         p_dspin_out.write = true;
+        p_dspin_out.eop   = true;
         p_dspin_out.data  = flit;
 
         break;
       }
-
+    ///////////////////////////////
     case CC_SEND_WRITE_UPDT_HEADER:
       {
@@ -7658,5 +7608,5 @@
         break;
       }
-
+    //////////////////////////////
     case CC_SEND_WRITE_UPDT_NLINE:
       {
@@ -7678,17 +7628,7 @@
         break;
       }
-
+    /////////////////////////////
     case CC_SEND_WRITE_UPDT_DATA:
       {
-        uint8_t multi_updt_eop;
-        if(  r_cc_send_cpt.read() ==
-            (r_write_to_cc_send_count.read()-1))
-        {
-          multi_updt_eop = 1;
-        }
-        else
-        {
-          multi_updt_eop = 0;
-        }
 
         uint8_t multi_updt_cpt  = 
@@ -7699,9 +7639,4 @@
 
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            (uint64_t)multi_updt_eop,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7716,9 +7651,10 @@
 
         p_dspin_out.write = true;
+        p_dspin_out.eop   = (r_cc_send_cpt.read() == (r_write_to_cc_send_count.read()-1));
         p_dspin_out.data  = flit;
 
         break;
       }
-
+    ////////////////////////////
     case CC_SEND_CAS_UPDT_HEADER:
       {
@@ -7765,5 +7701,5 @@
         break;
       }
-
+    ////////////////////////////
     case CC_SEND_CAS_UPDT_NLINE:
       {
@@ -7785,23 +7721,8 @@
         break;
       }
-
+    ///////////////////////////
     case CC_SEND_CAS_UPDT_DATA:
       {
-        uint8_t multi_updt_eop;
-        if(not r_cas_to_cc_send_is_long.read())
-        {
-          multi_updt_eop = 1;
-        }
-        else
-        {
-          multi_updt_eop = 0;
-        }
-
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            (uint64_t)multi_updt_eop,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7816,17 +7737,13 @@
 
         p_dspin_out.write = true;
+        p_dspin_out.eop   = not r_cas_to_cc_send_is_long.read();
         p_dspin_out.data  = flit;
 
         break;
       }
-
+    ////////////////////////////////
     case CC_SEND_CAS_UPDT_DATA_HIGH:
       {
         uint64_t flit = 0;
-
-        DspinDhccpParam::dspin_set(
-            flit,
-            1ULL,
-            DspinDhccpParam::FROM_MC_EOP);
 
         DspinDhccpParam::dspin_set(
@@ -7841,4 +7758,5 @@
 
         p_dspin_out.write = true;
+        p_dspin_out.eop   = true;
         p_dspin_out.data  = flit;
 
@@ -7848,5 +7766,5 @@
 
   ///////////////////////////////////////////////////////////////////
-  // Target command signals from the p_dspin_in port (CC_RECEIVE FSM)
+  //  p_dspin_in port (CC_RECEIVE FSM)
   ///////////////////////////////////////////////////////////////////
   p_dspin_in.read = false;
@@ -7858,4 +7776,5 @@
       }
     case CC_RECEIVE_CLEANUP:
+    case CC_RECEIVE_CLEANUP_EOP:
       {
         p_dspin_in.read = m_cc_receive_to_cleanup_fifo.wok();
