Changeset 430


Ignore:
Timestamp:
Jul 1, 2013, 4:20:05 PM (11 years ago)
Author:
cfuguet
Message:

Modifications in vci_mem_cache:

  • Adding error treatment for segmentation violation in memory cache. The assert was replaced by a VCI error response to the faulty commmand initiator.

To do so, a communication buffer have been introduced between the
TGT_CMD FSM and the TGT_RSP FSM. The TGT_CMD FSM makes the
segmentation violation verification and if one is detected, the
TGT_CMD FSM makes a request to the TGT_RSP FSM.

Location:
trunk/modules/vci_mem_cache/caba/source
Files:
2 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h

    r403 r430  
    7979      enum tgt_cmd_fsm_state_e{
    8080        TGT_CMD_IDLE,
     81        TGT_CMD_ERROR,
    8182        TGT_CMD_READ,
    8283        TGT_CMD_WRITE,
     
    8788      enum tgt_rsp_fsm_state_e
    8889      {
     90        TGT_RSP_TGT_CMD_IDLE,
    8991        TGT_RSP_READ_IDLE,
    9092        TGT_RSP_WRITE_IDLE,
    9193        TGT_RSP_CAS_IDLE,
    9294        TGT_RSP_XRAM_IDLE,
    93         TGT_RSP_INIT_IDLE,
     95        TGT_RSP_MULTI_ACK_IDLE,
    9496        TGT_RSP_CLEANUP_IDLE,
     97        TGT_RSP_TGT_CMD,
    9598        TGT_RSP_READ,
    9699        TGT_RSP_WRITE,
    97100        TGT_RSP_CAS,
    98101        TGT_RSP_XRAM,
    99         TGT_RSP_INIT,
     102        TGT_RSP_MULTI_ACK,
    100103        TGT_RSP_CLEANUP
    101104      };
     
    473476      //////////////////////////////////////////////////
    474477
     478      sc_signal<int>         r_tgt_cmd_fsm;
     479
    475480      // Fifo between TGT_CMD fsm and READ fsm
    476481      GenericFifo<addr_t>    m_cmd_read_addr_fifo;
     
    503508      GenericFifo<uint64_t>  m_cc_receive_to_multi_ack_fifo;
    504509
    505       sc_signal<int>         r_tgt_cmd_fsm;
     510      // Buffer between TGT_CMD fsm and TGT_RSP fsm
     511      // (segmentation violation response request)
     512      sc_signal<bool>     r_tgt_cmd_to_tgt_rsp_req;
     513      sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_srcid;
     514      sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_trdid;
     515      sc_signal<size_t>   r_tgt_cmd_to_tgt_rsp_pktid;
    506516
    507517      ///////////////////////////////////////////////////////
  • trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp

    r429 r430  
    6161{
    6262  "TGT_CMD_IDLE",
     63  "TGT_CMD_ERROR",
    6364  "TGT_CMD_READ",
    6465  "TGT_CMD_WRITE",
     
    6768const char *tgt_rsp_fsm_str[] =
    6869{
     70  "TGT_RSP_TGT_CMD_IDLE",
    6971  "TGT_RSP_READ_IDLE",
    7072  "TGT_RSP_WRITE_IDLE",
    7173  "TGT_RSP_CAS_IDLE",
    7274  "TGT_RSP_XRAM_IDLE",
    73   "TGT_RSP_INIT_IDLE",
     75  "TGT_RSP_MULTI_ACK_IDLE",
    7476  "TGT_RSP_CLEANUP_IDLE",
     77  "TGT_RSP_TGT_CMD",
    7578  "TGT_RSP_READ",
    7679  "TGT_RSP_WRITE",
    7780  "TGT_RSP_CAS",
    7881  "TGT_RSP_XRAM",
    79   "TGT_RSP_INIT",
     82  "TGT_RSP_MULTI_ACK",
    8083  "TGT_RSP_CLEANUP"
    8184};
     
    342345    m_broadcast_boundaries(0x7C1F),
    343346
     347    r_tgt_cmd_fsm("r_tgt_cmd_fsm"),
     348
    344349    //  FIFOs
    345350    m_cmd_read_addr_fifo("m_cmd_read_addr_fifo", 4),
     
    366371    m_cc_receive_to_cleanup_fifo("m_cc_receive_to_cleanup_fifo", 4),
    367372    m_cc_receive_to_multi_ack_fifo("m_cc_receive_to_multi_ack_fifo", 4),
    368 
    369     r_tgt_cmd_fsm("r_tgt_cmd_fsm"),
    370373
    371374    r_read_fsm("r_read_fsm"),
     
    628631    // Initializing FSMs
    629632    r_tgt_cmd_fsm    = TGT_CMD_IDLE;
    630     r_tgt_rsp_fsm    = TGT_RSP_READ_IDLE;
     633    r_tgt_rsp_fsm    = TGT_RSP_TGT_CMD_IDLE;
    631634    r_cc_send_fsm    = CC_SEND_XRAM_RSP_IDLE;
    632635    r_cc_receive_fsm = CC_RECEIVE_IDLE;
     
    686689    m_cmd_cas_wdata_fifo.init() ;
    687690    m_cmd_cas_eop_fifo.init()   ;
     691
     692    r_tgt_cmd_to_tgt_rsp_req = false;
    688693
    689694    r_read_to_tgt_rsp_req = false;
     
    898903          }
    899904        }
     905
    900906        if(not found)
    901907        {
    902           std::cout << "VCI_MEM_CACHE ERROR " << name() << std::endl;
    903           std::cout
    904               << "Out of segment VCI address in TGT_CMD_IDLE state (address = "
    905               << std::hex << address << ", srcid = " << p_vci_tgt.srcid.read()
    906               << std::dec << ", cycle = " << m_cpt_cycles << ")" << std::endl;
    907           exit(0);
    908         }
    909 
    910         if(p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)
     908          r_tgt_cmd_fsm = TGT_CMD_ERROR;
     909        }
     910        else if(p_vci_tgt.cmd.read() == vci_param_int::CMD_READ)
    911911        {
    912912          // check that the pktid is either :
     
    963963        }
    964964      }
     965      break;
     966
     967    case TGT_CMD_ERROR:
     968      // A segmentation violation has been detected, thus a response with error
     969      // must be sent
     970
     971      // wait if pending TGT_CMD request to TGT_RSP FSM
     972      if(r_tgt_cmd_to_tgt_rsp_req.read()) break;
     973
     974      // consume all the command packet flits and set new request to the
     975      // TGT_RSP FSM
     976      if(p_vci_tgt.cmdval and p_vci_tgt.eop)
     977      {
     978        r_tgt_cmd_to_tgt_rsp_req   = true;
     979        r_tgt_cmd_to_tgt_rsp_srcid = p_vci_tgt.srcid.read();
     980        r_tgt_cmd_to_tgt_rsp_trdid = p_vci_tgt.trdid.read();
     981        r_tgt_cmd_to_tgt_rsp_pktid = p_vci_tgt.pktid.read();
     982
     983        r_tgt_cmd_fsm = TGT_CMD_IDLE;
     984
     985#if DEBUG_MEMC_TGT_CMD
     986if(m_debug_tgt_cmd_fsm)
     987  std::cout << "  <MEMC " << name()
     988    << " TGT_CMD_ERROR> Segmentation violation:"
     989    << " address = " << std::hex << p_vci_tgt.address.read()
     990    << " / srcid = " << p_vci_tgt.srcid.read()
     991    << " / trdid = " << p_vci_tgt.trdid.read()
     992    << " / pktid = " << p_vci_tgt.pktid.read()
     993    << " / plen = " << std::dec << p_vci_tgt.plen.read() << std::endl;
     994#endif
     995      }
     996
    965997      break;
    966998
     
    59956027  /////////////////////////////////////////////////////////////////////
    59966028  // The TGT_RSP fsm sends the responses on the VCI target port
    5997   // with a round robin priority between six requests :
     6029  // with a round robin priority between seven requests :
     6030  // - r_tgt_cmd_to_tgt_rsp_req
    59986031  // - r_read_to_tgt_rsp_req
    59996032  // - r_write_to_tgt_rsp_req
     
    60026035  // - r_xram_rsp_to_tgt_rsp_req
    60036036  // - r_multi_ack_to_tgt_rsp_req
    6004   // The  ordering is :  read > write > cas > xram > init > cleanup
     6037  //
     6038  // The ordering is :
     6039  //   tgt_cmd > read > write > cas > xram > multi_ack > cleanup
    60056040  /////////////////////////////////////////////////////////////////////
    60066041
    60076042  switch(r_tgt_rsp_fsm.read())
    60086043  {
    6009     case TGT_RSP_READ_IDLE:
    6010     {
    6011       // write requests have the highest priority
    6012       if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
    6013       else if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS  ;
    6014       else if(r_xram_rsp_to_tgt_rsp_req)
    6015       {
    6016         r_tgt_rsp_fsm = TGT_RSP_XRAM;
    6017         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
    6018       }
    6019       else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_INIT   ;
    6020       else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
    6021       else if(r_read_to_tgt_rsp_req)
    6022       {
    6023         r_tgt_rsp_fsm = TGT_RSP_READ;
    6024         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
    6025       }
    6026       break;
    6027     }
    6028     ////////////////////////
    6029     case TGT_RSP_WRITE_IDLE:  // cas requests have the highest priority
    6030     {
    6031       if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS;
    6032       else if(r_xram_rsp_to_tgt_rsp_req)
    6033       {
    6034         r_tgt_rsp_fsm = TGT_RSP_XRAM;
    6035         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
    6036       }
    6037       else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_INIT   ;
    6038       else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
    6039       else if(r_read_to_tgt_rsp_req)
    6040       {
    6041         r_tgt_rsp_fsm = TGT_RSP_READ;
    6042         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
    6043       }
    6044 
    6045       else if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
    6046       break;
    6047     }
    6048     ///////////////////////
    6049     case TGT_RSP_CAS_IDLE:   // xram_rsp requests have the highest priority
    6050     {
    6051       if(r_xram_rsp_to_tgt_rsp_req)
    6052       {
    6053         r_tgt_rsp_fsm = TGT_RSP_XRAM;
    6054         r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
    6055       }
    6056       else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_INIT   ;
    6057       else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
    6058       else if(r_read_to_tgt_rsp_req)
    6059       {
    6060         r_tgt_rsp_fsm = TGT_RSP_READ;
    6061         r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
    6062       }
    6063       else if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
    6064       else if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS  ;
    6065       break;
    6066     }
    6067     ///////////////////////
    6068     case TGT_RSP_XRAM_IDLE:   // init requests have the highest priority
    6069     {
    6070 
    6071       if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_INIT   ;
    6072       else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
    6073       else if(r_read_to_tgt_rsp_req)
     6044    case TGT_RSP_TGT_CMD_IDLE: // read requests have the highest priority
     6045    {
     6046      if(r_read_to_tgt_rsp_req)
    60746047      {
    60756048        r_tgt_rsp_fsm = TGT_RSP_READ;
     
    60836056        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
    60846057      }
     6058      else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
     6059      else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6060      else if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
    60856061      break;
    60866062    }
    60876063    ///////////////////////
    6088     case TGT_RSP_INIT_IDLE:   // cleanup requests have the highest priority
    6089     {
    6090       if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6064    case TGT_RSP_READ_IDLE: // write requests have the highest priority
     6065    {
     6066      if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
     6067      else if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS;
     6068      else if(r_xram_rsp_to_tgt_rsp_req)
     6069      {
     6070        r_tgt_rsp_fsm = TGT_RSP_XRAM;
     6071        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
     6072      }
     6073      else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
     6074      else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6075      else if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
     6076      else if(r_read_to_tgt_rsp_req)
     6077      {
     6078        r_tgt_rsp_fsm = TGT_RSP_READ;
     6079        r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
     6080      }
     6081      break;
     6082    }
     6083    ////////////////////////
     6084    case TGT_RSP_WRITE_IDLE: // cas requests have the highest priority
     6085    {
     6086      if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS;
     6087      else if(r_xram_rsp_to_tgt_rsp_req)
     6088      {
     6089        r_tgt_rsp_fsm = TGT_RSP_XRAM;
     6090        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
     6091      }
     6092      else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
     6093      else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6094      else if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
     6095      else if(r_read_to_tgt_rsp_req)
     6096      {
     6097        r_tgt_rsp_fsm = TGT_RSP_READ;
     6098        r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
     6099      }
     6100
     6101      else if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
     6102      break;
     6103    }
     6104    ///////////////////////
     6105    case TGT_RSP_CAS_IDLE: // xram_rsp requests have the highest priority
     6106    {
     6107      if(r_xram_rsp_to_tgt_rsp_req)
     6108      {
     6109        r_tgt_rsp_fsm = TGT_RSP_XRAM;
     6110        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
     6111      }
     6112      else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK   ;
     6113      else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6114      else if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
     6115      else if(r_read_to_tgt_rsp_req)
     6116      {
     6117        r_tgt_rsp_fsm = TGT_RSP_READ;
     6118        r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
     6119      }
     6120      else if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
     6121      else if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS  ;
     6122      break;
     6123    }
     6124    ///////////////////////
     6125    case TGT_RSP_XRAM_IDLE: // multi ack requests have the highest priority
     6126    {
     6127
     6128      if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK   ;
     6129      else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6130      else if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
    60916131      else if(r_read_to_tgt_rsp_req)
    60926132      {
     
    61016141        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
    61026142      }
    6103       else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_INIT;
    61046143      break;
    61056144    }
    61066145    ///////////////////////
    6107     case TGT_RSP_CLEANUP_IDLE:    // read requests have the highest priority
    6108     {
    6109       if(r_read_to_tgt_rsp_req)
     6146    case TGT_RSP_MULTI_ACK_IDLE: // cleanup requests have the highest priority
     6147    {
     6148      if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
     6149      else if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
     6150      else if(r_read_to_tgt_rsp_req)
    61106151      {
    61116152        r_tgt_rsp_fsm = TGT_RSP_READ;
     
    61196160        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
    61206161      }
    6121       else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_INIT   ;
     6162      else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK;
     6163      break;
     6164    }
     6165    ///////////////////////
     6166    case TGT_RSP_CLEANUP_IDLE: // tgt cmd requests have the highest priority
     6167    {
     6168      if(r_tgt_cmd_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_TGT_CMD;
     6169      else if(r_read_to_tgt_rsp_req)
     6170      {
     6171        r_tgt_rsp_fsm = TGT_RSP_READ;
     6172        r_tgt_rsp_cpt = r_read_to_tgt_rsp_word.read();
     6173      }
     6174      else if(r_write_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_WRITE;
     6175      else if(r_cas_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CAS  ;
     6176      else if(r_xram_rsp_to_tgt_rsp_req)
     6177      {
     6178        r_tgt_rsp_fsm = TGT_RSP_XRAM;
     6179        r_tgt_rsp_cpt = r_xram_rsp_to_tgt_rsp_word.read();
     6180      }
     6181      else if(r_multi_ack_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK   ;
    61226182      else if(r_cleanup_to_tgt_rsp_req) r_tgt_rsp_fsm = TGT_RSP_CLEANUP;
    61236183      break;
    61246184    }
     6185    /////////////////////
     6186    case TGT_RSP_TGT_CMD: // send the response after a segmentation violation
     6187    {
     6188      if ( p_vci_tgt.rspack )
     6189      {
     6190        r_tgt_cmd_to_tgt_rsp_req = false;
     6191
     6192#if DEBUG_MEMC_TGT_RSP
     6193if( m_debug_tgt_rsp_fsm )
     6194{
     6195  std::cout
     6196    << "  <MEMC " << name()
     6197    << " TGT_RSP_TGT_CMD> Segmentation violation from TGT_CMD response"
     6198    << " / rsrcid = " << std::hex << r_tgt_cmd_to_tgt_rsp_srcid.read()
     6199    << " / rtrdid = " << r_tgt_cmd_to_tgt_rsp_trdid.read()
     6200    << " / rpktid = " << r_tgt_cmd_to_tgt_rsp_pktid.read()
     6201    << std::endl;
     6202}
     6203#endif
     6204      }
     6205    }
     6206    break;
     6207
    61256208    //////////////////
    61266209    case TGT_RSP_READ:    // send the response to a read
     
    62686351    }
    62696352    //////////////////
    6270     case TGT_RSP_INIT:    // send the write response after coherence transaction
     6353    case TGT_RSP_MULTI_ACK:    // send the write response after coherence transaction
    62716354    {
    62726355      if(p_vci_tgt.rspack)
     
    62756358#if DEBUG_MEMC_TGT_RSP
    62766359if(m_debug_tgt_rsp_fsm)
    6277 std::cout << "  <MEMC " << name() << " TGT_RSP_INIT> Write response after coherence transaction"
     6360std::cout << "  <MEMC " << name() << " TGT_RSP_MULTI_ACK> Write response after coherence transaction"
    62786361          << " / rsrcid = " << std::hex << r_multi_ack_to_tgt_rsp_srcid.read()
    62796362          << " / rtrdid = " << r_multi_ack_to_tgt_rsp_trdid.read()
    62806363          << " / rpktid = " << r_multi_ack_to_tgt_rsp_pktid.read() << std::endl;
    62816364#endif
    6282         r_tgt_rsp_fsm = TGT_RSP_INIT_IDLE;
     6365        r_tgt_rsp_fsm = TGT_RSP_MULTI_ACK_IDLE;
    62836366        r_multi_ack_to_tgt_rsp_req = false;
    62846367      }
     
    71967279  {
    71977280    case TGT_CMD_IDLE:
    7198       p_vci_tgt.cmdack  = false;
     7281      p_vci_tgt.cmdack = false;
     7282      break;
     7283
     7284    case TGT_CMD_ERROR:
     7285      p_vci_tgt.cmdack = not r_tgt_cmd_to_tgt_rsp_req.read();
    71997286      break;
    72007287
    72017288    case TGT_CMD_READ:
    7202       p_vci_tgt.cmdack  = m_cmd_read_addr_fifo.wok();
     7289      p_vci_tgt.cmdack = m_cmd_read_addr_fifo.wok();
    72037290      break;
    72047291
    72057292    case TGT_CMD_WRITE:
    7206       p_vci_tgt.cmdack  = m_cmd_write_addr_fifo.wok();
     7293      p_vci_tgt.cmdack = m_cmd_write_addr_fifo.wok();
    72077294      break;
    72087295
    72097296    case TGT_CMD_CAS:
    7210       p_vci_tgt.cmdack  = m_cmd_cas_addr_fifo.wok();
     7297      p_vci_tgt.cmdack = m_cmd_cas_addr_fifo.wok();
    72117298      break;
    72127299
    72137300    default:
    7214       p_vci_tgt.cmdack  = false;
     7301      p_vci_tgt.cmdack = false;
    72157302      break;
    72167303  }
     
    72227309  switch(r_tgt_rsp_fsm.read())
    72237310  {
     7311    case TGT_RSP_TGT_CMD_IDLE:
    72247312    case TGT_RSP_READ_IDLE:
    72257313    case TGT_RSP_WRITE_IDLE:
    72267314    case TGT_RSP_CAS_IDLE:
    72277315    case TGT_RSP_XRAM_IDLE:
    7228     case TGT_RSP_INIT_IDLE:
     7316    case TGT_RSP_MULTI_ACK_IDLE:
    72297317    case TGT_RSP_CLEANUP_IDLE:
    72307318      p_vci_tgt.rspval  = false;
     
    72367324      p_vci_tgt.reop    = false;
    72377325      break;
     7326
     7327    case TGT_RSP_TGT_CMD:
     7328    {
     7329      p_vci_tgt.rspval  = true;
     7330      p_vci_tgt.rdata   = 0;
     7331      p_vci_tgt.rsrcid  = r_tgt_cmd_to_tgt_rsp_srcid.read();
     7332      p_vci_tgt.rtrdid  = r_tgt_cmd_to_tgt_rsp_trdid.read();
     7333      p_vci_tgt.rpktid  = r_tgt_cmd_to_tgt_rsp_pktid.read();
     7334      p_vci_tgt.rerror  = 0x1;
     7335      p_vci_tgt.reop    = true;
     7336
     7337      break;
     7338    }
    72387339
    72397340    case TGT_RSP_READ:
     
    73247425    }
    73257426
    7326     case TGT_RSP_INIT:
     7427    case TGT_RSP_MULTI_ACK:
    73277428      p_vci_tgt.rspval   = true;
    73287429      p_vci_tgt.rdata    = 0; // Can be a CAS or SC rsp
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