Changeset 460 for branches/ODCCP/modules/vci_mem_cache

Timestamp:

Jul 19, 2013, 2:34:03 PM (11 years ago)

Author:

devigne

Message:

Introducing merged components between the last trunk TSAR version
and the ODCCP modifications

Location:

branches/ODCCP/modules/vci_mem_cache

Files:

• . (copied) (copied from trunk/modules/vci_mem_cache)
• caba/source/include/mem_cache_directory.h (modified) (5 diffs)
• caba/source/include/vci_mem_cache.h (modified) (9 diffs)
• caba/source/include/xram_transaction.h (modified) (1 diff)
• caba/source/src/vci_mem_cache.cpp (modified) (104 diffs)

branches/ODCCP/modules/vci_mem_cache/caba/source/include/mem_cache_directory.h

@@ -99 +99 @@
     bool    dirty;                  // entry dirty
     bool    lock;                   // entry locked
+    bool    coherent;               // entry coherent or not
     tag_t   tag;                    // tag of the entry
     size_t  count;                  // number of copies
@@ -110 +111 @@
       dirty         = false;
       lock          = false;
+      coherent      = true;
       tag           = 0;
       count         = 0;
@@ -126 +128 @@
       dirty         = source.dirty;
       lock          = source.lock;
+      coherent      = source.coherent;
       tag           = source.tag;
       count         = source.count;
@@ -141 +144 @@
       dirty     = false;
       lock      = false;
+      coherent  = true;
       count     = 0;
     }
@@ -153 +157 @@
       dirty         = source.dirty;
       lock          = source.lock;
+      coherent  = source.coherent;
       tag           = source.tag;
       count     = source.count;

branches/ODCCP/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h

@@ -254 +254 @@
         IXR_CMD_CAS_IDLE,
         IXR_CMD_XRAM_IDLE,
+        IXR_CMD_CLEANUP_IDLE,
         IXR_CMD_READ,
         IXR_CMD_WRITE,
         IXR_CMD_CAS,
-        IXR_CMD_XRAM
+        IXR_CMD_XRAM,
+        IXR_CMD_CLEANUP_DATA
       };
 
@@ -291 +293 @@
         CLEANUP_IDLE,
         CLEANUP_GET_NLINE,
+        CLEANUP_GET_DATA,
         CLEANUP_DIR_REQ,
         CLEANUP_DIR_LOCK,
@@ -304 +307 @@
         CLEANUP_WRITE_RSP,
         CLEANUP_CONFIG_ACK,
+        CLEANUP_IXR_REQ,
+        CLEANUP_WAIT,
         CLEANUP_SEND_CLACK
       };
@@ -326 +331 @@
         ALLOC_TRT_CAS,
         ALLOC_TRT_XRAM_RSP,
-        ALLOC_TRT_IXR_RSP
+        ALLOC_TRT_IXR_RSP,
+        ALLOC_TRT_CLEANUP
       };
 
@@ -425 +431 @@
       uint32_t     m_cpt_inval_brdcast; // Number of BROADCAST INVAL
       uint32_t     m_cpt_cleanup;       // Number of CLEANUP transactions
+      uint32_t     m_cpt_cleanup_data;  // Number of CLEANUP WITH DATA transactions
       uint32_t     m_cpt_ll;            // Number of LL transactions
       uint32_t     m_cpt_sc;            // Number of SC transactions
       uint32_t     m_cpt_cas;           // Number of CAS transactions
+      
+      uint32_t     m_cpt_read_fsm_dir_lock;        // wait DIR LOCK
+      uint32_t     m_cpt_read_fsm_n_dir_lock;      // NB DIR LOCK
+      uint32_t     m_cpt_write_fsm_dir_lock;       // wait DIR LOCK
+      uint32_t     m_cpt_write_fsm_n_dir_lock;     // NB DIR LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_dir_lock;    // wait DIR LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_n_dir_lock;  // NB DIR LOCK
+      uint32_t     m_cpt_cas_fsm_dir_lock;         // wait DIR LOCK
+      uint32_t     m_cpt_cas_fsm_n_dir_lock;       // NB DIR LOCK
+      uint32_t     m_cpt_cleanup_fsm_dir_lock;     // wait DIR LOCK
+      uint32_t     m_cpt_cleanup_fsm_n_dir_lock;   // NB DIR LOCK
+      
+      uint32_t     m_cpt_dir_unused;            // NB cycles DIR LOCK unused
+      uint32_t     m_cpt_read_fsm_dir_used;     // NB cycles DIR LOCK used
+      uint32_t     m_cpt_write_fsm_dir_used;    // NB cycles DIR LOCK used
+      uint32_t     m_cpt_cas_fsm_dir_used;      // NB cycles DIR LOCK used
+      uint32_t     m_cpt_xram_rsp_fsm_dir_used; // NB cycles DIR LOCK used
+      uint32_t     m_cpt_cleanup_fsm_dir_used;  // NB cycles DIR LOCK used
+
+      uint32_t     m_cpt_read_fsm_trt_lock;      // wait TRT LOCK
+      uint32_t     m_cpt_write_fsm_trt_lock;     // wait TRT LOCK
+      uint32_t     m_cpt_cas_fsm_trt_lock;       // wait TRT LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_trt_lock;  // wait TRT LOCK
+      uint32_t     m_cpt_ixr_fsm_trt_lock;       // wait TRT LOCK
+      
+      uint32_t     m_cpt_read_fsm_n_trt_lock;      // NB TRT LOCK
+      uint32_t     m_cpt_write_fsm_n_trt_lock;     // NB TRT LOCK
+      uint32_t     m_cpt_cas_fsm_n_trt_lock;       // NB TRT LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_n_trt_lock;  // NB TRT LOCK
+      uint32_t     m_cpt_ixr_fsm_n_trt_lock;       // NB TRT LOCK
+
+      uint32_t     m_cpt_read_fsm_trt_used;      // NB cycles TRT LOCK used
+      uint32_t     m_cpt_write_fsm_trt_used;     // NB cycles TRT LOCK used
+      uint32_t     m_cpt_cas_fsm_trt_used;       // NB cycles TRT LOCK used
+      uint32_t     m_cpt_xram_rsp_fsm_trt_used;  // NB cycles TRT LOCK used
+      uint32_t     m_cpt_ixr_fsm_trt_used;       // NB cycles TRT LOCK used
+      
+      uint32_t     m_cpt_trt_unused;            // NB cycles TRT LOCK unused
+
+      uint32_t     m_cpt_write_fsm_upt_lock;     // wait UPT LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_upt_lock;  // wait UPT LOCK
+      uint32_t     m_cpt_multi_ack_fsm_upt_lock; // wait UPT LOCK
+      uint32_t     m_cpt_cleanup_fsm_upt_lock;   // wait UPT LOCK
+      uint32_t     m_cpt_cas_fsm_upt_lock;       // wait UPT LOCK
+      
+      uint32_t     m_cpt_write_fsm_n_upt_lock;     // NB UPT LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_n_upt_lock;  // NB UPT LOCK
+      uint32_t     m_cpt_multi_ack_fsm_n_upt_lock; // NB UPT LOCK
+      uint32_t     m_cpt_cleanup_fsm_n_upt_lock;   // NB UPT LOCK
+      uint32_t     m_cpt_cas_fsm_n_upt_lock;       // NB UPT LOCK
+      
+      uint32_t     m_cpt_write_fsm_upt_used;     // NB cycles UPT LOCK used
+      uint32_t     m_cpt_xram_rsp_fsm_upt_used;  // NB cycles UPT LOCK used
+      uint32_t     m_cpt_multi_ack_fsm_upt_used; // NB cycles UPT LOCK used
+      uint32_t     m_cpt_cleanup_fsm_upt_used;   // NB cycles UPT LOCK used
+      uint32_t     m_cpt_cas_fsm_upt_used;       // NB cycles UPT LOCK used
+      
+      uint32_t     m_cpt_upt_unused;            // NB cycles UPT LOCK unused
+
+      uint32_t     m_cpt_read_fsm_heap_lock;     // wait HEAP LOCK
+      uint32_t     m_cpt_write_fsm_heap_lock;    // wait HEAP LOCK
+      uint32_t     m_cpt_cas_fsm_heap_lock;      // wait HEAP LOCK
+      uint32_t     m_cpt_cleanup_fsm_heap_lock;  // wait HEAP LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_heap_lock; // wait HEAP LOCK
+      
+      uint32_t     m_cpt_read_fsm_n_heap_lock;     // NB HEAP LOCK
+      uint32_t     m_cpt_write_fsm_n_heap_lock;    // NB HEAP LOCK
+      uint32_t     m_cpt_cas_fsm_n_heap_lock;      // NB HEAP LOCK
+      uint32_t     m_cpt_cleanup_fsm_n_heap_lock;  // NB HEAP LOCK
+      uint32_t     m_cpt_xram_rsp_fsm_n_heap_lock; // NB HEAP LOCK
+      
+      uint32_t     m_cpt_read_fsm_heap_used;     // NB cycles HEAP LOCK used
+      uint32_t     m_cpt_write_fsm_heap_used;    // NB cycles HEAP LOCK used
+      uint32_t     m_cpt_cas_fsm_heap_used;      // NB cycles HEAP LOCK used
+      uint32_t     m_cpt_cleanup_fsm_heap_used;  // NB cycles HEAP LOCK used
+      uint32_t     m_cpt_xram_rsp_fsm_heap_used; // NB cycles HEAP LOCK used
+      
+      uint32_t     m_cpt_heap_unused;            // NB cycles HEAP LOCK unused
 
       uint32_t     m_cpt_cleanup_cost;  // Number of (flits * distance) for CLEANUPs
@@ -473 +558 @@
       ~VciMemCache();
 
+      void clear_stats();
       void print_stats();
       void print_trace();
@@ -852 +938 @@
       // Buffer between IXR_RSP fsm and XRAM_RSP fsm  (response from the XRAM)
       sc_signal<bool>   * r_ixr_rsp_to_xram_rsp_rok; // A xram response is ready
+      sc_signal<bool>   * r_ixr_rsp_to_xram_rsp_no_coherent; // A xram response is ready and no coherent (ODCCP)
 
       ////////////////////////////////////////////////////
@@ -861 +948 @@
       TransactionTabEntry r_xram_rsp_trt_buf;           // TRT entry local buffer
       sc_signal<bool>     r_xram_rsp_victim_inval;      // victim line invalidate
+      sc_signal<bool>     r_xram_rsp_victim_coherent;   // victim line coherent
       sc_signal<bool>     r_xram_rsp_victim_is_cnt;     // victim line inst bit
       sc_signal<bool>     r_xram_rsp_victim_dirty;      // victim line dirty bit
@@ -958 +1046 @@
       sc_signal<int>      r_alloc_heap_fsm;
       sc_signal<unsigned> r_alloc_heap_reset_cpt;
+
+
+      ////////////////////////////////////////////////////
+      // REGISTERS FOR ODCCP
+      ////////////////////////////////////////////////////
+
+      sc_signal<uint32_t>  r_cleanup_data_index;
+      sc_signal<uint32_t>  r_cleanup_trdid;
+      sc_signal<uint32_t>  r_cleanup_pktid;
+      sc_signal<data_t>    *r_cleanup_data;          // buffer for saving data from cleanup
+      sc_signal<bool>      r_cleanup_contains_data;
+      sc_signal<bool>      r_cleanup_ncc;
+      
+      sc_signal<bool>      r_xram_rsp_to_ixr_cmd_inval_ncc_pending;
+      
+      sc_signal<bool>      r_cleanup_to_ixr_cmd_req;
+      sc_signal<data_t>    *r_cleanup_to_ixr_cmd_data;
+      sc_signal<uint32_t>  r_cleanup_to_ixr_cmd_srcid;
+      sc_signal<bool>      r_cleanup_to_ixr_cmd_l1_dirty_ncc; // this cleanup was dirty in L1
+      sc_signal<uint32_t>  r_cleanup_to_ixr_cmd_trdid;
+      sc_signal<uint32_t>  r_cleanup_to_ixr_cmd_pktid;
+      sc_signal<addr_t>    r_cleanup_to_ixr_cmd_nline;
     }; // end class VciMemCache
 

branches/ODCCP/modules/vci_mem_cache/caba/source/include/xram_transaction.h

@@ -293 +293 @@
         return false;
     }
+    
+    ///////////////////////////////////////////////////////////////////////
+    // The hit_write() function looks if an XRAM write transaction exists 
+    // for a given line.
+    // Arguments :
+    // - nline : the index (zy) of the requested line
+    // The function returns true if a write request has already been sent
+    ///////////////////////////////////////////////////////////////////////
+    bool hit_write(const addr_t nline, size_t *index)
+    {
+        for(size_t i=0; i<size_tab; i++){
+            if(tab[i].valid && (nline==tab[i].nline) && !(tab[i].xram_read)) {
+                *index = i;
+                return true;    
+            }
+        }
+        return false;
+    }
 
     /////////////////////////////////////////////////////////////////////

branches/ODCCP/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp

@@ -217 +217 @@
   "IXR_CMD_CAS_IDLE",
   "IXR_CMD_XRAM_IDLE",
+  "IXR_CMD_CLEANUP_IDLE",
   "IXR_CMD_READ",
   "IXR_CMD_WRITE",
   "IXR_CMD_CAS",
-  "IXR_CMD_XRAM"
+  "IXR_CMD_XRAM",
+  "IXR_CMD_CLEANUP_DATA"
 };
 const char *cas_fsm_str[] =
@@ -250 +252 @@
   "CLEANUP_IDLE",
   "CLEANUP_GET_NLINE",
+  "CLEANUP_GET_DATA",
   "CLEANUP_DIR_REQ",
   "CLEANUP_DIR_LOCK",
@@ -263 +266 @@
   "CLEANUP_WRITE_RSP",
   "CLEANUP_CONFIG_ACK",
+  "CLEANUP_IXR_REQ",
+  "CLEANUP_WAIT",
   "CLEANUP_SEND_CLACK"
 };
@@ -280 +285 @@
   "ALLOC_TRT_CAS",
   "ALLOC_TRT_XRAM_RSP",
-  "ALLOC_TRT_IXR_RSP"
+  "ALLOC_TRT_IXR_RSP",
+  "ALLOC_TRT_CLEANUP"
 };
 const char *alloc_upt_fsm_str[] =
@@ -333 +339 @@
   : soclib::caba::BaseModule(name),
 
+    m_monitor_ok(false),
+    
     p_clk( "p_clk" ),
     p_resetn( "p_resetn" ),
@@ -496 +504 @@
     // Allocation for IXR_RSP FSM
     r_ixr_rsp_to_xram_rsp_rok  = new sc_signal<bool>[m_trt_lines];
+    //r_ixr_rsp_to_xram_rsp_no_coherent  = new sc_signal<bool>[m_trt_lines];
 
     // Allocation for XRAM_RSP FSM
@@ -517 +526 @@
     r_cas_data                 = new sc_signal<data_t>[nwords];
     r_cas_rdata                = new sc_signal<data_t>[2];
+
+    // Allocation for ODCCP
+    r_cleanup_data             = new sc_signal<data_t>[nwords];
+    r_cleanup_to_ixr_cmd_data  = new sc_signal<data_t>[nwords];
 
     // Allocation for debug
@@ -631 +644 @@
 
 /////////////////////////////////////////
+tmpl(void) ::clear_stats()
+/////////////////////////////////////////
+{
+    m_cpt_cycles                  = 0;
+    m_cpt_read                    = 0;
+    m_cpt_read_miss               = 0;
+    m_cpt_write                   = 0;
+    m_cpt_write_miss              = 0;
+    m_cpt_write_cells             = 0;
+    m_cpt_write_dirty             = 0;
+    m_cpt_update                  = 0;
+    m_cpt_update_mult             = 0;
+    m_cpt_inval_brdcast           = 0;
+    m_cpt_inval                   = 0;
+    m_cpt_inval_mult              = 0;
+    m_cpt_cleanup                 = 0;
+    m_cpt_cleanup_data            = 0;
+    m_cpt_ll                      = 0;
+    m_cpt_sc                      = 0;
+    m_cpt_cas                     = 0;
+    m_cpt_trt_full                = 0;
+    m_cpt_trt_rb                  = 0;
+    m_cpt_dir_unused              = 0;
+    m_cpt_upt_unused              = 0;
+    m_cpt_heap_unused             = 0;
+    m_cpt_trt_unused              = 0;
+    m_cpt_read_fsm_n_dir_lock     = 0;
+    m_cpt_read_fsm_dir_lock       = 0;
+    m_cpt_read_fsm_dir_used       = 0;
+    m_cpt_read_fsm_trt_lock       = 0;
+    m_cpt_read_fsm_heap_lock      = 0;
+    m_cpt_write_fsm_dir_lock      = 0;
+    m_cpt_write_fsm_n_dir_lock    = 0;
+    m_cpt_write_fsm_upt_lock      = 0;
+    m_cpt_write_fsm_heap_lock     = 0;
+    m_cpt_write_fsm_dir_used      = 0;
+    m_cpt_write_fsm_trt_lock      = 0;
+    m_cpt_cas_fsm_n_dir_lock      = 0;
+    m_cpt_cas_fsm_dir_lock        = 0;
+    m_cpt_cas_fsm_upt_lock        = 0;
+    m_cpt_cas_fsm_heap_lock       = 0;
+    m_cpt_cas_fsm_trt_lock        = 0;
+    m_cpt_cas_fsm_dir_used        = 0;
+    m_cpt_xram_rsp_fsm_n_dir_lock = 0;
+    m_cpt_xram_rsp_fsm_dir_lock   = 0;
+    m_cpt_xram_rsp_fsm_trt_lock   = 0;
+    m_cpt_xram_rsp_fsm_upt_lock   = 0;
+    m_cpt_xram_rsp_fsm_heap_lock  = 0;
+    m_cpt_xram_rsp_fsm_dir_used   = 0;
+    m_cpt_cleanup_fsm_dir_lock    = 0;
+    m_cpt_cleanup_fsm_n_dir_lock  = 0;
+    m_cpt_cleanup_fsm_heap_lock   = 0;
+    m_cpt_cleanup_fsm_upt_lock    = 0;
+    m_cpt_cleanup_fsm_dir_used    = 0;
+    m_cpt_ixr_fsm_trt_lock        = 0;
+    m_cpt_multi_ack_fsm_upt_lock  = 0;
+}
+/////////////////////////////////////////
 tmpl(void) ::print_stats()
 /////////////////////////////////////////
@@ -637 +708 @@
   std::cout
       << "MEM_CACHE " << name() << " / Time = " << m_cpt_cycles << std::endl
-      << "- READ RATE            = " << (double) m_cpt_read/m_cpt_cycles << std::endl
-      << "- READ TOTAL           = " << m_cpt_read << std::endl
-      << "- READ MISS RATE       = " << (double) m_cpt_read_miss/m_cpt_read << std::endl
-      << "- WRITE RATE           = " << (double) m_cpt_write/m_cpt_cycles << std::endl
-      << "- WRITE TOTAL          = " << m_cpt_write << std::endl
-      << "- WRITE MISS RATE      = " << (double) m_cpt_write_miss/m_cpt_write << std::endl
-      << "- WRITE BURST LENGTH   = " << (double) m_cpt_write_cells/m_cpt_write << std::endl
-      << "- WRITE BURST TOTAL    = " << m_cpt_write_cells << std::endl
-      << "- REQUESTS TRT FULL    = " << m_cpt_trt_full << std::endl
-      << "- READ TRT BLOKED HIT  = " << m_cpt_trt_rb << std::endl
-      << "- UPDATE RATE          = " << (double) m_cpt_update/m_cpt_cycles << std::endl
-      << "- UPDATE ARITY         = " << (double) m_cpt_update_mult/m_cpt_update << std::endl
-      << "- INVAL MULTICAST RATE = " << (double)(m_cpt_inval-m_cpt_inval_brdcast) /m_cpt_cycles << std::endl
-      << "- INVAL MULTICAST ARITY= " << (double) m_cpt_inval_mult/ (m_cpt_inval-m_cpt_inval_brdcast) << std::endl
-      << "- INVAL BROADCAST RATE = " << (double) m_cpt_inval_brdcast/m_cpt_cycles << std::endl
-      << "- SAVE DIRTY RATE      = " << (double) m_cpt_write_dirty/m_cpt_cycles << std::endl
-      << "- CLEANUP RATE         = " << (double) m_cpt_cleanup/m_cpt_cycles << std::endl
-      << "- LL RATE              = " << (double) m_cpt_ll/m_cpt_cycles << std::endl
-      << "- SC RATE              = " << (double) m_cpt_sc/m_cpt_cycles << std::endl
-      << "- CAS RATE             = " << (double) m_cpt_cas/m_cpt_cycles << std::endl;
+      << "- READ RATE                              = " << (double) m_cpt_read/m_cpt_cycles << std::endl
+      << "- READ TOTAL                             = " << m_cpt_read << std::endl
+      << "- READ MISS RATE                         = " << (double) m_cpt_read_miss/m_cpt_read << std::endl
+      << "- WRITE RATE                             = " << (double) m_cpt_write/m_cpt_cycles << std::endl
+      << "- WRITE TOTAL                            = " << m_cpt_write << std::endl
+      << "- WRITE MISS RATE                        = " << (double) m_cpt_write_miss/m_cpt_write << std::endl
+      << "- WRITE BURST LENGTH                     = " << (double) m_cpt_write_cells/m_cpt_write << std::endl
+      << "- WRITE BURST TOTAL                      = " << m_cpt_write_cells << std::endl
+      << "- REQUESTS TRT FULL                      = " << m_cpt_trt_full << std::endl
+      << "- READ TRT BLOKED HIT                    = " << m_cpt_trt_rb << std::endl
+      << "- UPDATE RATE                            = " << (double) m_cpt_update/m_cpt_cycles << std::endl
+      << "- UPDATE ARITY                           = " << (double) m_cpt_update_mult/m_cpt_update << std::endl
+      << "- INVAL MULTICAST RATE                   = " << (double)(m_cpt_inval-m_cpt_inval_brdcast) /m_cpt_cycles << std::endl
+      << "- INVAL MULTICAST ARITY                  = " << (double) m_cpt_inval_mult/ (m_cpt_inval-m_cpt_inval_brdcast) << std::endl
+      << "- INVAL BROADCAST RATE                   = " << (double) m_cpt_inval_brdcast/m_cpt_cycles << std::endl
+      << "- SAVE DIRTY RATE                        = " << (double) m_cpt_write_dirty/m_cpt_cycles << std::endl
+      << "- CLEANUP RATE                           = " << (double) m_cpt_cleanup/m_cpt_cycles << std::endl
+      << "- CLEANUP TOTAL                          = " << (double) m_cpt_cleanup << std::endl
+      << "- CLEANUP WITH DATA RATE                 = " << (double) m_cpt_cleanup_data/m_cpt_cycles << std::endl
+      << "- CLEANUP WITH DATA TOTAL                = " << (double) m_cpt_cleanup_data << std::endl
+      << "- LL RATE                                = " << (double) m_cpt_ll/m_cpt_cycles << std::endl
+      << "- SC RATE                                = " << (double) m_cpt_sc/m_cpt_cycles << std::endl
+      << "- CAS RATE                               = " << (double) m_cpt_cas/m_cpt_cycles << std::endl << std::endl;
+
+     /* << "- WAIT DIR LOCK in READ_FSM              = " << (double) m_cpt_read_fsm_dir_lock/m_cpt_read_fsm_n_dir_lock << std::endl
+      << "- NB CYCLES IN DIR LOCK in READ_FSM      = " << (double) m_cpt_read_fsm_dir_used/m_cpt_read_fsm_n_dir_lock << std::endl
+      << "- WAIT DIR LOCK in WRITE_FSM             = " << (double) m_cpt_write_fsm_dir_lock/m_cpt_write_fsm_n_dir_lock << std::endl
+      << "- NB CYCLES IN DIR LOCK in WRITE_FSM     = " << (double) m_cpt_write_fsm_dir_used/m_cpt_write_fsm_n_dir_lock << std::endl
+      << "- WAIT DIR LOCK in XRAM_FSM              = " << (double) m_cpt_xram_rsp_fsm_dir_lock/m_cpt_xram_rsp_fsm_n_dir_lock << std::endl
+      << "- NB CYCLES IN DIR LOCK in XRAM_FSM      = " << (double) m_cpt_xram_rsp_fsm_dir_used/m_cpt_xram_rsp_fsm_n_dir_lock << std::endl
+      << "- WAIT DIR LOCK in CLEANUP_FSM           = " << (double) m_cpt_cleanup_fsm_dir_lock/m_cpt_cleanup_fsm_n_dir_lock << std::endl
+      << "- NB CYCLES IN DIR LOCK in CLEANUP_FSM   = " << (double) m_cpt_cleanup_fsm_dir_used/m_cpt_cleanup_fsm_n_dir_lock << std::endl
+      << "- WAIT DIR LOCK in CAS_FSM               = " << (double) m_cpt_cas_fsm_dir_lock/m_cpt_cas_fsm_n_dir_lock << std::endl
+      << "- NB CYCLES IN LOCK in CAS_FSM           = " << (double) m_cpt_cas_fsm_dir_used/m_cpt_cas_fsm_n_dir_lock << std::endl
+      << "- DIR UNUSED RATE                        = " << (double) m_cpt_dir_unused/m_cpt_cycles << std::endl << std::endl
+      
+      << "- WAIT TRT LOCK in READ_FSM              = " << (double) m_cpt_read_fsm_trt_lock/m_cpt_read_fsm_n_trt_lock << std::endl
+      << "- NB CYCLES IN TRT LOCK in READ_FSM      = " << (double) m_cpt_read_fsm_trt_used/m_cpt_read_fsm_n_trt_lock << std::endl
+      << "- WAIT TRT LOCK in WRITE_FSM             = " << (double) m_cpt_write_fsm_trt_lock/m_cpt_write_fsm_n_trt_lock << std::endl
+      << "- NB CYCLES IN TRT LOCK in WRITE_FSM     = " << (double) m_cpt_write_fsm_trt_used/m_cpt_write_fsm_n_trt_lock << std::endl
+      << "- WAIT TRT LOCK in CAS_FSM               = " << (double) m_cpt_cas_fsm_trt_lock/m_cpt_cas_fsm_n_trt_lock << std::endl
+      << "- NB CYCLES IN TRT LOCK in CAS_FSM       = " << (double) m_cpt_cas_fsm_trt_used/m_cpt_cas_fsm_n_trt_lock << std::endl
+      << "- WAIT TRT LOCK in XRAM_FSM              = " << (double) m_cpt_xram_rsp_fsm_trt_lock/m_cpt_xram_rsp_fsm_n_trt_lock << std::endl
+      << "- NB CYCLES IN TRT LOCK in XRAM_FSM      = " << (double) m_cpt_xram_rsp_fsm_trt_used/m_cpt_xram_rsp_fsm_n_trt_lock << std::endl
+      << "- WAIT TRT LOCK in IXR_FSM               = " << (double) m_cpt_ixr_fsm_trt_lock/m_cpt_ixr_fsm_n_trt_lock << std::endl
+      << "- NB CYCLES IN TRT LOCK in IXR_FSM       = " << (double) m_cpt_ixr_fsm_trt_used/m_cpt_ixr_fsm_n_trt_lock << std::endl
+      << "- TRT UNUSED RATE                        = " << (double) m_cpt_trt_unused/m_cpt_cycles << std::endl << std::endl
+      
+      << "- WAIT UPT LOCK in WRITE_FSM             = " << (double) m_cpt_write_fsm_upt_lock/m_cpt_write_fsm_n_upt_lock << std::endl
+      << "- NB CYCLES IN UPT LOCK in WRITE_FSM     = " << (double) m_cpt_write_fsm_upt_used/m_cpt_write_fsm_n_upt_lock << std::endl
+      << "- WAIT UPT LOCK in XRAM_FSM              = " << (double) m_cpt_xram_rsp_fsm_upt_lock/m_cpt_xram_rsp_fsm_n_upt_lock << std::endl
+      << "- NB CYCLES IN UPT LOCK in XRAM_FSM      = " << (double) m_cpt_xram_rsp_fsm_upt_used/m_cpt_xram_rsp_fsm_n_upt_lock << std::endl
+      << "- WAIT UPT LOCK in MULTIACK_FSM          = " << (double) m_cpt_multi_ack_fsm_upt_lock/m_cpt_multi_ack_fsm_n_upt_lock << std::endl
+      << "- NB CYCLES IN UPT LOCK in MULTIACK_FSM  = " << (double) m_cpt_multi_ack_fsm_upt_used/m_cpt_multi_ack_fsm_n_upt_lock << std::endl
+      << "- WAIT UPT LOCK in CLEANUP_FSM           = " << (double) m_cpt_cleanup_fsm_upt_lock/m_cpt_cleanup_fsm_n_upt_lock << std::endl
+      << "- NB CYCLES IN UPT LOCK in CLEANUP_FSM   = " << (double) m_cpt_cleanup_fsm_upt_used/m_cpt_cleanup_fsm_n_upt_lock << std::endl
+      << "- WAIT UPT LOCK in CAS_FSM               = " << (double) m_cpt_cas_fsm_upt_lock/m_cpt_cas_fsm_n_upt_lock << std::endl
+      << "- NB CYCLES IN UPT LOCK in CAS_FSM       = " << (double) m_cpt_cas_fsm_upt_used/m_cpt_cas_fsm_n_upt_lock << std::endl
+      << "- UPT UNUSED RATE                        = " << (double) m_cpt_upt_unused/m_cpt_cycles << std::endl << std::endl
+      
+      << "- WAIT HEAP LOCK in READ_FSM             = " << (double) m_cpt_read_fsm_heap_lock/m_cpt_read_fsm_n_heap_lock << std::endl
+      << "- NB CYCLES IN HEAP LOCK in READ_FSM     = " << (double) m_cpt_read_fsm_heap_used/m_cpt_read_fsm_n_heap_lock << std::endl
+      << "- WAIT HEAP LOCK in WRITE_FSM            = " << (double) m_cpt_write_fsm_heap_lock/m_cpt_write_fsm_n_heap_lock << std::endl
+      << "- NB CYCLES IN HEAP LOCK in WRITE_FSM    = " << (double) m_cpt_write_fsm_heap_used/m_cpt_write_fsm_n_heap_lock << std::endl
+      << "- WAIT HEAP LOCK in XRAM_FSM             = " << (double) m_cpt_xram_rsp_fsm_heap_lock/m_cpt_xram_rsp_fsm_n_heap_lock << std::endl
+      << "- NB CYCLES IN HEAP LOCK in XRAM_FSM     = " << (double) m_cpt_xram_rsp_fsm_heap_used/m_cpt_xram_rsp_fsm_n_heap_lock << std::endl
+      << "- WAIT HEAP LOCK in CLEANUP_FSM          = " << (double) m_cpt_cleanup_fsm_heap_lock/m_cpt_cleanup_fsm_n_heap_lock << std::endl
+      << "- NB CYCLES IN HEAP LOCK in CLEANUP_FSM  = " << (double) m_cpt_cleanup_fsm_heap_used/m_cpt_cleanup_fsm_n_heap_lock << std::endl
+      << "- WAIT HEAP LOCK in CAS_FSM              = " << (double) m_cpt_cas_fsm_heap_lock/m_cpt_cas_fsm_n_heap_lock << std::endl
+      << "- NB CYCLES IN HEAP LOCK in CAS_FSM      = " << (double) m_cpt_cas_fsm_heap_used/m_cpt_cas_fsm_n_heap_lock << std::endl
+      << "- HEAP UNUSED RATE                       = " << (double) m_cpt_heap_unused/m_cpt_cycles << std::endl;*/
 }
 
@@ -664 +786 @@
 {
   delete [] r_ixr_rsp_to_xram_rsp_rok;
+  //delete [] r_ixr_rsp_to_xram_rsp_no_coherent;
 
   delete [] r_xram_rsp_victim_data;
@@ -675 +798 @@
   delete [] r_write_be;
   delete [] r_write_to_cc_send_data;
+
+  delete [] r_cleanup_data;
+  delete [] r_cleanup_to_ixr_cmd_data;
 }
 
@@ -788 +914 @@
     {
       r_ixr_rsp_to_xram_rsp_rok[i] = false;
+      //r_ixr_rsp_to_xram_rsp_no_coherent[i] = false;
     }
 
@@ -808 +935 @@
     r_tgt_rsp_key_sent  = false;
 
+    // ODCCP
+    r_cleanup_data_index       = 0;
+    r_cleanup_trdid            = 0;
+    r_cleanup_pktid            = 0;
+    r_cleanup_contains_data    = false;
+    r_cleanup_to_ixr_cmd_req   = false;
+    r_cleanup_to_ixr_cmd_l1_dirty_ncc = false;
+    r_xram_rsp_to_ixr_cmd_inval_ncc_pending = false;
+    r_cleanup_to_ixr_cmd_srcid = 0;
+    r_cleanup_to_ixr_cmd_trdid = 0;
+    r_cleanup_to_ixr_cmd_pktid = 0;
+    r_cleanup_to_ixr_cmd_nline = 0;
+    for (size_t word = 0; word < m_words; word ++)
+    {
+      r_cleanup_to_ixr_cmd_data[word] = 0;
+      r_cleanup_data[word] = 0;
+    }
+
+
     // Activity counters
-    m_cpt_cycles        = 0;
-    m_cpt_read          = 0;
-    m_cpt_read_miss     = 0;
-    m_cpt_write         = 0;
-    m_cpt_write_miss    = 0;
-    m_cpt_write_cells   = 0;
-    m_cpt_write_dirty   = 0;
-    m_cpt_update        = 0;
-    m_cpt_update_mult   = 0;
-    m_cpt_inval_brdcast = 0;
-    m_cpt_inval         = 0;
-    m_cpt_inval_mult    = 0;
-    m_cpt_cleanup       = 0;
-    m_cpt_ll            = 0;
-    m_cpt_sc            = 0;
-    m_cpt_cas           = 0;
-    m_cpt_trt_full      = 0;
-    m_cpt_trt_rb        = 0;
+    m_cpt_cycles                  = 0;
+    m_cpt_read                    = 0;
+    m_cpt_read_miss               = 0;
+    m_cpt_write                   = 0;
+    m_cpt_write_miss              = 0;
+    m_cpt_write_cells             = 0;
+    m_cpt_write_dirty             = 0;
+    m_cpt_update                  = 0;
+    m_cpt_update_mult             = 0;
+    m_cpt_inval_brdcast           = 0;
+    m_cpt_inval                   = 0;
+    m_cpt_inval_mult              = 0;
+    m_cpt_cleanup                 = 0;
+    m_cpt_cleanup_data            = 0;
+    m_cpt_ll                      = 0;
+    m_cpt_sc                      = 0;
+    m_cpt_cas                     = 0;
+    m_cpt_trt_full                = 0;
+    m_cpt_trt_rb                  = 0;
+    m_cpt_dir_unused              = 0;
+    m_cpt_upt_unused              = 0;
+    m_cpt_heap_unused             = 0;
+    m_cpt_trt_unused              = 0;
+    m_cpt_read_fsm_n_dir_lock     = 0;
+    m_cpt_read_fsm_dir_lock       = 0;
+    m_cpt_read_fsm_dir_used       = 0;
+    m_cpt_read_fsm_trt_lock       = 0;
+    m_cpt_read_fsm_heap_lock      = 0;
+    m_cpt_write_fsm_dir_lock      = 0;
+    m_cpt_write_fsm_n_dir_lock    = 0;
+    m_cpt_write_fsm_upt_lock      = 0;
+    m_cpt_write_fsm_heap_lock     = 0;
+    m_cpt_write_fsm_dir_used      = 0;
+    m_cpt_write_fsm_trt_lock      = 0;
+    m_cpt_cas_fsm_n_dir_lock      = 0;
+    m_cpt_cas_fsm_dir_lock        = 0;
+    m_cpt_cas_fsm_upt_lock        = 0;
+    m_cpt_cas_fsm_heap_lock       = 0;
+    m_cpt_cas_fsm_trt_lock        = 0;
+    m_cpt_cas_fsm_dir_used        = 0;
+    m_cpt_xram_rsp_fsm_n_dir_lock = 0;
+    m_cpt_xram_rsp_fsm_dir_lock   = 0;
+    m_cpt_xram_rsp_fsm_trt_lock   = 0;
+    m_cpt_xram_rsp_fsm_upt_lock   = 0;
+    m_cpt_xram_rsp_fsm_heap_lock  = 0;
+    m_cpt_xram_rsp_fsm_dir_used   = 0;
+    m_cpt_cleanup_fsm_dir_lock    = 0;
+    m_cpt_cleanup_fsm_n_dir_lock  = 0;
+    m_cpt_cleanup_fsm_heap_lock   = 0;
+    m_cpt_cleanup_fsm_upt_lock    = 0;
+    m_cpt_cleanup_fsm_dir_used    = 0;
+    m_cpt_ixr_fsm_trt_lock        = 0;
+    m_cpt_multi_ack_fsm_upt_lock  = 0;
 
     return;
@@ -1319 +1500 @@
     case MULTI_ACK_UPT_LOCK:
     {
+        m_cpt_multi_ack_fsm_upt_lock++;
         // get lock to the UPDATE table
-        if(r_alloc_upt_fsm.read() != ALLOC_UPT_MULTI_ACK) break;
+        if(r_alloc_upt_fsm.read() != ALLOC_UPT_MULTI_ACK)  break;
 
         // decrement the number of expected responses
         size_t count = 0;
         bool valid   = m_upt.decrement(r_multi_ack_upt_index.read(), count);
+
 
         if(not valid)
@@ -1349 +1532 @@
           << " entry = "       << r_multi_ack_upt_index.read()
           << " / rsp_count = " << std::dec << count << std::endl;
+        m_cpt_multi_ack_fsm_n_upt_lock++;
 #endif
         break;
@@ -1874 +2058 @@
       {
         r_read_fsm = READ_DIR_LOCK;
+        m_cpt_read_fsm_n_dir_lock++;
       }
 
@@ -1880 +2065 @@
 std::cout << "  <MEMC " << name() << " READ_DIR_REQ> Requesting DIR lock " << std::endl;
 #endif
+
+      m_cpt_read_fsm_dir_lock++;
+
       break;
     }
@@ -1981 +2169 @@
             if(m_monitor_ok) check_monitor( m_cmd_read_addr_fifo.read(), r_read_data[0], true);
 
-            // update the cache directory
-            DirectoryEntry entry;
-            entry.valid   = true;
-            entry.is_cnt  = is_cnt;
-            entry.dirty   = r_read_dirty.read();
-            entry.tag     = r_read_tag.read();
-            entry.lock    = r_read_lock.read();
-            entry.ptr     = r_read_ptr.read();
-
-            if(cached_read)   // Cached read => we must update the copies
-            {
-                if(!is_cnt)  // Not counter mode
-                {
-                    entry.owner.srcid    = m_cmd_read_srcid_fifo.read();
+        // update the cache directory
+        DirectoryEntry entry;
+        entry.valid    = true;
+        entry.is_cnt   = is_cnt;
+        entry.dirty    = r_read_dirty.read();
+        entry.tag      = r_read_tag.read();
+        entry.lock     = r_read_lock.read();
+        entry.ptr      = r_read_ptr.read();
+
+        /*ODCCP*/ // if pktid = 0x9 that means read on no coherent line
+        if(m_cmd_read_pktid_fifo.read() == 0x9){
+          entry.coherent = false;
+        }
+        else{
+          entry.coherent = true;
+        }
+        
+        if(cached_read)   // Cached read => we must update the copies
+        {
+          if(!is_cnt)  // Not counter mode
+          {
+            entry.owner.srcid    = m_cmd_read_srcid_fifo.read();
 #if L1_MULTI_CACHE
-                    entry.owner.cache_id = m_cmd_read_pktid_fifo.read();
-#endif
-                    entry.owner.inst     = inst_read;
-                    entry.count          = r_read_count.read() + 1;
-                }
-                else  // Counter mode
-                {
-                    entry.owner.srcid    = 0;
+            entry.owner.cache_id = m_cmd_read_pktid_fifo.read();
+#endif
+            entry.owner.inst     = inst_read;
+            entry.count          = r_read_count.read() + 1;
+          }
+          else  // Counter mode
+          {
+            entry.owner.srcid    = 0;
 #if L1_MULTI_CACHE
-                    entry.owner.cache_id = 0;
-#endif
-                    entry.owner.inst     = false;
-                    entry.count          = r_read_count.read() + 1;
-                }
-            }
-            else            // Uncached read
-            {
-                entry.owner.srcid     = r_read_copy.read();
+            entry.owner.cache_id = 0;
+#endif
+            entry.owner.inst     = false;
+            entry.count          = r_read_count.read() + 1;
+          }
+        }
+        else            // Uncached read
+        {
+          entry.owner.srcid     = r_read_copy.read();
 #if L1_MULTI_CACHE
-                entry.owner.cache_id  = r_read_copy_cache.read();
-#endif
-                entry.owner.inst      = r_read_copy_inst.read();
-                entry.count           = r_read_count.read();
-            }
+          entry.owner.cache_id  = r_read_copy_cache.read();
+#endif
+          entry.owner.inst      = r_read_copy_inst.read();
+          entry.count           = r_read_count.read();
+        }
 
 #if DEBUG_MEMC_READ
@@ -2033 +2229 @@
 #endif
 
-            m_cache_directory.write(set, way, entry);
-            r_read_fsm    = READ_RSP;
-        }
-        break;
+          if(m_monitor_ok)
+          {
+            char buf[80];
+            snprintf(buf, 80, "READ_DIR_HIT srcid %d, ins %d",
+                     (int)m_cmd_read_srcid_fifo.read(),
+                     (int)((m_cmd_read_pktid_fifo.read()&0x2)!=0));
+            check_monitor(m_cmd_read_addr_fifo.read(), r_read_data[0], true);
+          }
+        m_cache_directory.write(set, way, entry);
+        r_read_fsm    = READ_RSP;
+      }
+      break;
     }
     ///////////////////
@@ -2044 +2248 @@
       {
         r_read_fsm = READ_HEAP_LOCK;
+        m_cpt_read_fsm_n_heap_lock++;
       }
 
@@ -2051 +2256 @@
           << " Requesting HEAP lock " << std::endl;
 #endif
+
+      m_cpt_read_fsm_heap_lock++;
+
       break;
     }
@@ -2283 +2491 @@
       {
         size_t      index     = 0;
+        size_t      index_write = 0;
         addr_t      addr      = (addr_t) m_cmd_read_addr_fifo.read();
         bool        hit_read  = m_trt.hit_read(m_nline[addr], index);
-        bool        hit_write = m_trt.hit_write(m_nline[addr]);
+        bool        hit_write = m_trt.hit_write(m_nline[addr], &index_write);
         bool        wok       = !m_trt.full(index);
 
@@ -2306 +2515 @@
           << " hit_read = " << hit_read
           << " / hit_write = " << hit_write
+          << " / Index = " << index_write
           << " / full = " << !wok << std::endl;
-#endif
-      }
+        m_cpt_read_fsm_n_trt_lock++;
+#endif
+      }
+
+      m_cpt_read_fsm_trt_lock++;
+
       break;
     }
@@ -2533 +2747 @@
 
         r_write_fsm = WRITE_DIR_LOCK;
+        m_cpt_write_fsm_n_dir_lock++;
       }
 
@@ -2540 +2755 @@
           << std::endl;
 #endif
+
+      m_cpt_write_fsm_dir_lock++;
 
       break;
@@ -2792 +3009 @@
         if(wok) r_write_fsm = WRITE_UPT_HEAP_LOCK;
         else    r_write_fsm = WRITE_WAIT;
-      }
+        m_cpt_write_fsm_n_upt_lock++;
+      }
+
+      m_cpt_write_fsm_upt_lock++;
+
       break;
     }
@@ -2808 +3029 @@
 #endif
         r_write_fsm = WRITE_UPT_REQ;
-      }
+        m_cpt_write_fsm_n_heap_lock++;
+      }
+
+      m_cpt_write_fsm_heap_lock++;
+
       break;
     }
@@ -3093 +3318 @@
           m_cpt_trt_full++;
         }
-      }
+        m_cpt_write_fsm_n_trt_lock++;
+      }
+
+      m_cpt_write_fsm_trt_lock++;
+
       break;
     }
@@ -3212 +3441 @@
           << " : wok = " << wok << " / index = " << wok_index << std::endl;
 #endif
-      }
+        m_cpt_write_fsm_n_trt_lock++;
+      }
+
+      m_cpt_write_fsm_trt_lock++;
+
       break;
     }
@@ -3239 +3472 @@
                         nb_copies,
                         index);
-
 #if DEBUG_MEMC_WRITE
 if( m_debug and wok )
@@ -3249 +3481 @@
         if(wok) r_write_fsm = WRITE_BC_DIR_INVAL;
         else       r_write_fsm = WRITE_WAIT;
-      }
+        m_cpt_write_fsm_n_upt_lock++;
+      }
+
+      m_cpt_write_fsm_upt_lock++;
+
       break;
     }
@@ -3382 +3618 @@
     ////////////////////////
     case IXR_CMD_READ_IDLE:
-    {
       if     (r_write_to_ixr_cmd_req)    r_ixr_cmd_fsm = IXR_CMD_WRITE;
       else if(r_cas_to_ixr_cmd_req)      r_ixr_cmd_fsm = IXR_CMD_CAS;
       else if(r_xram_rsp_to_ixr_cmd_req) r_ixr_cmd_fsm = IXR_CMD_XRAM;
+      else if(r_cleanup_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_CLEANUP_DATA;
       else if(r_read_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_READ;
       break;
-    }
     ////////////////////////
     case IXR_CMD_WRITE_IDLE:
-    {
-      if     (r_cas_to_ixr_cmd_req)      r_ixr_cmd_fsm = IXR_CMD_CAS;
+      if(r_cas_to_ixr_cmd_req)           r_ixr_cmd_fsm = IXR_CMD_CAS;
       else if(r_xram_rsp_to_ixr_cmd_req) r_ixr_cmd_fsm = IXR_CMD_XRAM;
+      else if(r_cleanup_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_CLEANUP_DATA;
       else if(r_read_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_READ;
       else if(r_write_to_ixr_cmd_req)    r_ixr_cmd_fsm = IXR_CMD_WRITE;
       break;
-    }
     ////////////////////////
     case IXR_CMD_CAS_IDLE:
-    {
-      if     (r_xram_rsp_to_ixr_cmd_req) r_ixr_cmd_fsm = IXR_CMD_XRAM;
+      if(r_xram_rsp_to_ixr_cmd_req)      r_ixr_cmd_fsm = IXR_CMD_XRAM;
+      else if(r_cleanup_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_CLEANUP_DATA;
       else if(r_read_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_READ;
       else if(r_write_to_ixr_cmd_req)    r_ixr_cmd_fsm = IXR_CMD_WRITE;
       else if(r_cas_to_ixr_cmd_req)      r_ixr_cmd_fsm = IXR_CMD_CAS;
       break;
-    }
     ////////////////////////
     case IXR_CMD_XRAM_IDLE:
-    {
-      if     (r_read_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_READ;
-      else if(r_write_to_ixr_cmd_req)    r_ixr_cmd_fsm = IXR_CMD_WRITE;
+      if(r_cleanup_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_CLEANUP_DATA;
+      else if(r_read_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_READ;
+      else if(r_write_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_WRITE;
       else if(r_cas_to_ixr_cmd_req)      r_ixr_cmd_fsm = IXR_CMD_CAS;
       else if(r_xram_rsp_to_ixr_cmd_req) r_ixr_cmd_fsm = IXR_CMD_XRAM;
       break;
-    }
+      ////////////////////////
+    case IXR_CMD_CLEANUP_IDLE:
+      if(r_read_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_READ;
+      else if(r_write_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_WRITE;
+      else if(r_cas_to_ixr_cmd_req)      r_ixr_cmd_fsm = IXR_CMD_CAS;
+      else if(r_xram_rsp_to_ixr_cmd_req) r_ixr_cmd_fsm = IXR_CMD_XRAM;
+      else if(r_cleanup_to_ixr_cmd_req)     r_ixr_cmd_fsm = IXR_CMD_CLEANUP_DATA;
+      break;      
     //////////////////       // send a get from READ FSM
     case IXR_CMD_READ:
@@ -3541 +3781 @@
       break;
     }
+
+      ////////////////////////
+    case IXR_CMD_CLEANUP_DATA:     // send a put command to XRAM
+      if(p_vci_ixr.cmdack)
+      {
+        if(r_ixr_cmd_cpt.read() == (m_words - 2))
+        {
+          r_ixr_cmd_cpt = 0;
+          r_ixr_cmd_fsm = IXR_CMD_CLEANUP_IDLE;
+          r_cleanup_to_ixr_cmd_req = false;
+          r_xram_rsp_to_ixr_cmd_inval_ncc_pending = false;
+        }
+        else
+        {
+          r_ixr_cmd_cpt = r_ixr_cmd_cpt.read() + 2;
+        }
+
+#if DEBUG_MEMC_IXR_CMD
+        if(m_debug)
+        {
+          std::cout << "  <MEMC " << name() << ".IXR_CMD_CLEANUP_DATA> Send a put request to xram" << std::endl;
+        }
+#endif
+      }
+      break;
 
   } // end switch r_ixr_cmd_fsm
@@ -3619 +3884 @@
           << r_ixr_rsp_trt_index.read() << std::endl;
 #endif
-      }
+      m_cpt_ixr_fsm_n_trt_lock++;
+      }
+
+      m_cpt_ixr_fsm_trt_lock++;
+
       break;
     }
@@ -3645 +3914 @@
         {
           r_ixr_rsp_to_xram_rsp_rok[r_ixr_rsp_trt_index.read()]=true;
+          /*if(p_vci_ixr.rpktid.read()&0xF == 0x9)
+            r_ixr_rsp_to_xram_rsp_no_coherent[r_ixr_rsp_trt_index.read()] = true;
+          else
+            r_ixr_rsp_to_xram_rsp_no_coherent[r_ixr_rsp_trt_index.read()] = false;*/
           r_ixr_rsp_fsm = IXR_RSP_IDLE;
         }
@@ -3655 +3928 @@
           << " / data = " << std::hex << data << std::endl;
 #endif
-      }
+      m_cpt_ixr_fsm_n_trt_lock++;
+      }
+      m_cpt_ixr_fsm_trt_lock++;
       break;
     }
@@ -3728 +4003 @@
           << " Get access to DIR and TRT" << std::endl;
 #endif
-      }
+        m_cpt_xram_rsp_fsm_n_dir_lock++;
+        m_cpt_xram_rsp_fsm_n_trt_lock++;
+      }
+      m_cpt_xram_rsp_fsm_dir_lock++;
+      m_cpt_xram_rsp_fsm_trt_lock++;
       break;
     }
@@ -3754 +4033 @@
         r_xram_rsp_victim_copy_cache= victim.owner.cache_id;
 #endif
+        
+        r_xram_rsp_victim_coherent  = victim.coherent;
         r_xram_rsp_victim_copy_inst = victim.owner.inst;
         r_xram_rsp_victim_count     = victim.count;
@@ -3764 +4045 @@
         r_xram_rsp_victim_dirty     = victim.dirty;
 
+
         if(!r_xram_rsp_trt_buf.rerror)
         {
-          r_xram_rsp_fsm = XRAM_RSP_INVAL_LOCK;
+          /*ODCCP*/ //if victim is no coherent and there is an inval no coherent pending we wait
+          if(!victim.coherent and r_xram_rsp_to_ixr_cmd_inval_ncc_pending.read())
+          {
+            r_xram_rsp_fsm = XRAM_RSP_INVAL_WAIT;
+          }
+          else
+          {
+            r_xram_rsp_fsm = XRAM_RSP_INVAL_LOCK;
+          }
         }
         else
@@ -3829 +4119 @@
 #endif
         }
-      }
+        m_cpt_xram_rsp_fsm_n_upt_lock++;
+      }
+
+      m_cpt_xram_rsp_fsm_upt_lock++;
+
       break;
     }
@@ -3892 +4186 @@
         entry.owner.inst    = inst_read;
         entry.count         = 1;
+
       }
       else
@@ -3902 +4197 @@
         entry.count          = 0;
       }
+
+      /*ODCCP*/ //if pktid = 0x9 that means line no coherent
+      if(r_xram_rsp_trt_buf.pktid == 0x9){
+        entry.coherent = false;
+      }
+      else{
+        entry.coherent = true;
+      }
+
       m_cache_directory.write(set, way, entry);
 
@@ -3950 +4254 @@
 #endif
 
-      // If the victim is not dirty, we don't need another XRAM put transaction,
+      // If the victim is not dirty and coherent or victim's count egal 0 , we don't need another XRAM put transaction,
       // and we can erase the TRT entry
-      if(!r_xram_rsp_victim_dirty.read())  m_trt.erase(r_xram_rsp_trt_index.read());
+      if(!r_xram_rsp_victim_dirty.read() and (r_xram_rsp_victim_coherent.read() or (r_xram_rsp_victim_count.read() == 0)))  m_trt.erase(r_xram_rsp_trt_index.read());
 
       // Next state
-      if(r_xram_rsp_victim_dirty.read())       r_xram_rsp_fsm = XRAM_RSP_TRT_DIRTY;
+      if(r_xram_rsp_victim_dirty.read() or (!r_xram_rsp_victim_coherent.read() and (r_xram_rsp_victim_count.read() == 1)))       r_xram_rsp_fsm = XRAM_RSP_TRT_DIRTY;
       else if(r_xram_rsp_trt_buf.proc_read)    r_xram_rsp_fsm = XRAM_RSP_DIR_RSP;
       else if(r_xram_rsp_victim_inval.read())  r_xram_rsp_fsm = XRAM_RSP_INVAL;
@@ -3987 +4291 @@
         else if(r_xram_rsp_victim_inval.read())  r_xram_rsp_fsm = XRAM_RSP_INVAL;
         else                                     r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
-      }
+        m_cpt_xram_rsp_fsm_n_trt_lock++;
+      }
+
+      m_cpt_xram_rsp_fsm_trt_lock++;
+
       break;
     }
@@ -4009 +4317 @@
 
         if(r_xram_rsp_victim_inval)      r_xram_rsp_fsm = XRAM_RSP_INVAL;
-        else if(r_xram_rsp_victim_dirty) r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
+        else if(r_xram_rsp_victim_dirty or (!r_xram_rsp_victim_coherent.read() and (r_xram_rsp_victim_count.read() == 1))) r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
         else                             r_xram_rsp_fsm = XRAM_RSP_IDLE;
 
@@ -4045 +4353 @@
         r_xram_rsp_next_ptr                 = r_xram_rsp_victim_ptr.read();
 
-        if(r_xram_rsp_victim_dirty)  r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
+        if(r_xram_rsp_victim_dirty or (!r_xram_rsp_victim_coherent.read() and (r_xram_rsp_victim_count.read() == 1)))  r_xram_rsp_fsm = XRAM_RSP_WRITE_DIRTY;
         else if(not_last_multi_req)  r_xram_rsp_fsm = XRAM_RSP_HEAP_REQ;
         else                         r_xram_rsp_fsm = XRAM_RSP_IDLE;
@@ -4061 +4369 @@
     case XRAM_RSP_WRITE_DIRTY:  // send a write request to IXR_CMD FSM
     {
-      if(!r_xram_rsp_to_ixr_cmd_req.read())
-      {
+      if((!r_xram_rsp_to_ixr_cmd_req.read()) and (!r_xram_rsp_to_ixr_cmd_inval_ncc_pending.read()))
+      {
+
         r_xram_rsp_to_ixr_cmd_req = true;
         r_xram_rsp_to_ixr_cmd_nline = r_xram_rsp_victim_nline.read();
@@ -4071 +4380 @@
         }
         m_cpt_write_dirty++;
+        
+        // if victim is no coherent, we dont request a ixr command
+        if( (!r_xram_rsp_victim_coherent.read()) and (r_xram_rsp_victim_count.read() == 1) )
+        {
+          r_xram_rsp_to_ixr_cmd_inval_ncc_pending = true; // inval no coherent pending
+          r_xram_rsp_to_ixr_cmd_req = false;
+          r_xram_rsp_fsm = XRAM_RSP_IDLE;
+          break;
+        }
 
         bool multi_req = !r_xram_rsp_victim_is_cnt.read() and r_xram_rsp_victim_inval.read();
@@ -4093 +4411 @@
       {
         r_xram_rsp_fsm = XRAM_RSP_HEAP_ERASE;
+        m_cpt_xram_rsp_fsm_n_heap_lock++;
       }
 
@@ -4100 +4419 @@
           << " Requesting HEAP lock" << std::endl;
 #endif
+
+      m_cpt_xram_rsp_fsm_heap_lock++;
+
       break;
     }
@@ -4243 +4565 @@
 
       uint64_t flit = m_cc_receive_to_cleanup_fifo.read();
-
       uint32_t srcid =
         DspinDhccpParam::dspin_get(
@@ -4264 +4585 @@
             DspinDhccpParam::CLEANUP_NLINE_MSB) << 32;
 
+      /*ODCCP*/ // Cleanup on no coherent line if 1
+      r_cleanup_ncc = 
+        DspinDhccpParam::dspin_get(
+            flit, 
+            DspinDhccpParam::CLEANUP_NCC);
+
       r_cleanup_inst  = (type == DspinDhccpParam::TYPE_CLEANUP_INST);
       r_cleanup_srcid = srcid;
@@ -4295 +4622 @@
     {
       if(not m_cc_receive_to_cleanup_fifo.rok()) break;
+      
 
       uint64_t flit = m_cc_receive_to_cleanup_fifo.read();
@@ -4300 +4628 @@
       addr_t nline = r_cleanup_nline.read() |
         DspinDhccpParam::dspin_get(flit, DspinDhccpParam::CLEANUP_NLINE_LSB);
+      
+      bool eop = DspinDhccpParam::dspin_get(flit, DspinDhccpParam::FROM_L1_EOP);
+      
+      /*ODCCP*/ // if not eop (more than 2 flits) there is a cleanup no coherent with data
+      if (!eop)
+      {
+        r_cleanup_contains_data = true; // this cleanup contains data
+        r_cleanup_fsm = CLEANUP_GET_DATA;
+        r_cleanup_data_index = 0;
+      }
+      else
+      {
+        r_cleanup_contains_data = false;
+        r_cleanup_fsm = CLEANUP_DIR_REQ;
+      }
 
       cc_receive_to_cleanup_fifo_get = true;
-      r_cleanup_nline                = nline;
-      r_cleanup_fsm                  = CLEANUP_DIR_REQ;
+      r_cleanup_nline               = nline;
 
 #if DEBUG_MEMC_CLEANUP
@@ -4314 +4656 @@
     }
 
+    /*ODCCP*/ // We save the cleanup's data into a buffer
+    case CLEANUP_GET_DATA :
+    {
+      if(not m_cc_receive_to_cleanup_fifo.rok()) break;
+      
+      assert (r_cleanup_data_index.read() < m_words and "MEM_CACHE in CLEANUP_GET_DATA : too much flits in cleanup data updt");
+
+      uint64_t flit = m_cc_receive_to_cleanup_fifo.read();
+
+      uint32_t data = 
+        DspinDhccpParam::dspin_get (flit, DspinDhccpParam::CLEANUP_DATA_UPDT);
+
+      r_cleanup_data[r_cleanup_data_index.read()] = data;
+      r_cleanup_data_index = r_cleanup_data_index.read() + 1;
+      cc_receive_to_cleanup_fifo_get = true;
+      m_cpt_cleanup_data++;
+
+      if (r_cleanup_data_index.read() == m_words - 1) // last flit
+      {
+        r_cleanup_fsm = CLEANUP_DIR_REQ;
+      }
+      break;
+    }
     /////////////////////
     case CLEANUP_DIR_REQ:   // Get the lock to the directory
     {
+      m_cpt_cleanup_fsm_dir_lock++;
+      // Get the lock to the directory
       if(r_alloc_dir_fsm.read() != ALLOC_DIR_CLEANUP) break;
 
@@ -4325 +4692 @@
 std::cout << "  <MEMC " << name() << " CLEANUP_DIR_REQ> Requesting DIR lock" << std::endl;
 #endif
+
+      m_cpt_cleanup_fsm_n_dir_lock++;
+
       break;
     }
@@ -4341 +4711 @@
         exit(0);
       }
-
       // Read the directory
       size_t way = 0;
@@ -4362 +4731 @@
       if(entry.valid)      // hit : the copy must be cleared
       {
+        if(entry.count < 1)
+        {
+          std::cout << "assert on line " << std::hex <<r_cleanup_nline.read() << " | at cycle " << std::dec <<m_cpt_cycles << std::endl;
+          std::cout << "cleanup with data ? " << r_cleanup_contains_data.read() << " | at cycle " << m_cpt_cycles << std::endl;
+          std::cout << "cleanup_address = " << std::hex << (r_cleanup_nline.read()*m_words*4) << std::dec << std::endl;
+          std::cout << "srcid = " << r_cleanup_srcid.read() << std::endl;
+          std::cout << "inst = " << r_cleanup_inst.read() << std::endl;
+          std::cout << "inst = " << r_cleanup_inst.read() << std::endl;
+        }
         assert(
             (entry.count > 0) and
@@ -4445 +4823 @@
       entry.valid       = true;
       entry.is_cnt      = r_cleanup_is_cnt.read();
-      entry.dirty       = r_cleanup_dirty.read();
+      entry.dirty       = r_cleanup_dirty.read() or r_cleanup_contains_data.read();
       entry.tag         = r_cleanup_tag.read();
       entry.lock        = r_cleanup_lock.read();
@@ -4456 +4834 @@
       entry.owner.cache_id = 0;
 #endif
+      /*ODCCP*/ // if cleanup contains data we update the cache data
+      if (r_cleanup_contains_data.read())
+      {
+        for (size_t word = 0; word < m_words; word ++)
+        {
+          m_cache_data.write(way, set, word, r_cleanup_data[word].read(), 0xF);
+        }
+      }
+
 
       m_cache_directory.write(set, way, entry);
@@ -4484 +4871 @@
     {
       // get the lock to the HEAP directory
+      m_cpt_cleanup_fsm_heap_lock++;
       if(r_alloc_heap_fsm.read() != ALLOC_HEAP_CLEANUP) break;
 
@@ -4497 +4885 @@
       }
 #endif
+      m_cpt_cleanup_fsm_n_heap_lock++;
       break;
     }
@@ -4575 +4964 @@
           << " / r_cleanup_copy_inst = " << r_cleanup_copy_inst.read() << std::endl
           << "heap_entry.owner.srcid = " << heap_entry.owner.srcid
-          << " / heap_entry.owner.inst = " << heap_entry.owner.inst << std::endl;
+          << " / heap_entry.owner.inst = " << heap_entry.owner.inst << std::endl
+          << " / addr = " << std::hex << (r_cleanup_nline.read() *m_words*4) << std::dec << std::endl;
 /**/
 
@@ -4842 +5232 @@
                              // invalidate transaction matching the cleanup 
     {
+      m_cpt_cleanup_fsm_upt_lock++;
       if(r_alloc_upt_fsm.read() != ALLOC_UPT_CLEANUP) break;
 
@@ -4851 +5242 @@
       if ( not match_inval )     // no pending inval
       {
+        /*ODCCP*/ // If cleanup is on no coherent line we go to CLEANUP_IXR_REQ
+        if (r_cleanup_ncc.read())
+        {
+          r_cleanup_fsm = CLEANUP_IXR_REQ;
+        }
+        else
+        {
           r_cleanup_fsm = CLEANUP_SEND_CLACK;
+        }
 
 #if DEBUG_MEMC_CLEANUP
@@ -4862 +5261 @@
           << std::endl;
 #endif
-          break;
+      m_cpt_cleanup_fsm_n_upt_lock++;
+        break;
       }
 
@@ -4908 +5308 @@
       else             // multi inval transaction not completed
       {
-        r_cleanup_fsm = CLEANUP_SEND_CLACK ;
+        /*ODCCP*/ // If cleanup is on no coherent line we go to CLEANUP_IXR_REQ
+        if (r_cleanup_ncc.read())
+        {
+          r_cleanup_fsm = CLEANUP_IXR_REQ;
+        }
+        else
+        {
+          r_cleanup_fsm = CLEANUP_SEND_CLACK;
+        }
       }
 
@@ -4938 +5346 @@
       if      ( r_cleanup_need_rsp.read() ) r_cleanup_fsm = CLEANUP_WRITE_RSP;
       else if ( r_cleanup_need_ack.read() ) r_cleanup_fsm = CLEANUP_CONFIG_ACK;
+      else if ( r_cleanup_ncc.read()      ) r_cleanup_fsm = CLEANUP_IXR_REQ;
       else                                  r_cleanup_fsm = CLEANUP_SEND_CLACK;
 
@@ -4960 +5369 @@
       r_cleanup_to_tgt_rsp_pktid   = r_cleanup_write_pktid.read();
 
-      r_cleanup_fsm                = CLEANUP_SEND_CLACK;
+      /*ODCCP*/ // If cleanup is on no coherent line we go to CLEANUP_IXR_REQ
+      if (r_cleanup_ncc.read())
+      {
+        r_cleanup_fsm = CLEANUP_IXR_REQ;
+      }
+      else
+      {
+        r_cleanup_fsm = CLEANUP_SEND_CLACK;
+      }
 
 #if DEBUG_MEMC_CLEANUP
@@ -4977 +5394 @@
     {
       if ( r_cleanup_to_config_ack.read() ) break;
-
       r_cleanup_to_config_ack      = true;
       r_cleanup_fsm                = CLEANUP_SEND_CLACK;
@@ -4988 +5404 @@
       break;
     }
+
+    /*ODCCP*/ 
+    case CLEANUP_IXR_REQ:
+    {
+    
+      //Send a request to the ixr to write the data in the XRAM and set an entry in the TRT.
+      if (r_alloc_trt_fsm.read() == ALLOC_TRT_CLEANUP)
+      {
+        if(!r_cleanup_to_ixr_cmd_req.read())
+        {
+          size_t index = 0;
+          bool   hit   = m_trt.hit_write(r_cleanup_nline.read(), &index); // we save the index of the matching entry in TRT 
+          if (!hit)
+          {
+            std::cout << "assert on line " << r_cleanup_nline.read() << " | at cycle " << std::dec <<m_cpt_cycles << std::endl;
+            for (int i=0; i<4; i++) m_trt.print(i);
+          }
+          assert (hit and "CLEANUP_IXR_REQ found no matching entry in TRT");
+          
+          r_cleanup_to_ixr_cmd_req     = true;
+
+          for(size_t i = 0; i < m_words; i++){
+            r_cleanup_to_ixr_cmd_data[i]   = r_cleanup_data[i];
+          }
+
+          r_cleanup_to_ixr_cmd_srcid        = r_cleanup_srcid.read();
+          r_cleanup_to_ixr_cmd_trdid        = index;
+          r_cleanup_to_ixr_cmd_pktid        = r_cleanup_pktid.read();
+          r_cleanup_to_ixr_cmd_nline        = r_cleanup_nline.read();
+          r_cleanup_to_ixr_cmd_l1_dirty_ncc = r_cleanup_contains_data.read();
+          r_cleanup_fsm = CLEANUP_SEND_CLACK;
+#if DEBUG_MEMC_CLEANUP
+      if(m_debug)
+      {
+        std::cout
+            << "  <MEMC " << name()
+            << " CLEANUP_IXR_REQ> Send a put request to the ixr:"
+            << " contains data ? = " << std::dec << r_cleanup_contains_data.read()
+            << " srcid = "           << std::dec << r_cleanup_srcid.read()
+            << " pktid = "           << std::dec << r_cleanup_pktid.read()
+            << " trdid = "           << std::dec << index
+            << " nline = "           << std::hex << r_cleanup_nline.read() << std::dec
+            << std::endl;
+      }
+#endif
+        }
+        else
+        {
+            r_cleanup_fsm = CLEANUP_WAIT;
+        }
+      }
+      break;
+    }
+
+    case CLEANUP_WAIT :
+    {
+      r_cleanup_fsm = CLEANUP_IXR_REQ;
+      break;
+    }
+
     ////////////////////////
     case CLEANUP_SEND_CLACK:    // acknowledgement to a cleanup command
@@ -5094 +5570 @@
       {
         r_cas_fsm = CAS_DIR_LOCK;
+        m_cpt_cas_fsm_n_dir_lock++;
       }
 
@@ -5104 +5581 @@
       }
 #endif
+
+      m_cpt_cas_fsm_dir_lock++;
+
       break;
     }
@@ -5347 +5827 @@
           << " / count = " << nb_copies << std::endl;
 #endif
-      }
+        m_cpt_cas_fsm_n_upt_lock++;
+      }
+
+      m_cpt_cas_fsm_upt_lock++;
+
       break;
     }
@@ -5378 +5862 @@
 #endif
         r_cas_fsm = CAS_UPT_REQ;
-      }
+        m_cpt_cas_fsm_n_heap_lock++;
+      }
+
+      m_cpt_cas_fsm_heap_lock++;
+
       break;
     }
@@ -5518 +6006 @@
           r_cas_fsm = CAS_WAIT;
         }
-      }
+        m_cpt_cas_fsm_n_trt_lock++;
+      }
+
+      m_cpt_cas_fsm_trt_lock++;
+
       break;
     }
@@ -5583 +6075 @@
           r_cas_fsm = CAS_WAIT;
         }
-      }
+        m_cpt_cas_fsm_n_upt_lock++;
+      }
+
+      m_cpt_cas_fsm_upt_lock++;
+
       break;
     }
@@ -5761 +6257 @@
           r_cas_fsm       = CAS_MISS_TRT_SET;
         }
-      }
+        m_cpt_cas_fsm_n_trt_lock++;
+      }
+
+      m_cpt_cas_fsm_trt_lock++;
+
       break;
     }
@@ -6531 +7031 @@
     case CC_RECEIVE_CLEANUP_EOP:
       {
-        // write second CLEANUP flit in CC_RECEIVE to CLEANUP fifo
+        // write second CLEANUP flit in CC_RECEIVE to CLEANUP fifo or more in case of cleanup data (ODCCP)
 
         if(not p_dspin_in.write or not m_cc_receive_to_cleanup_fifo.wok())
           break;
 
-        assert(p_dspin_in.eop.read() and
+        /*assert(p_dspin_in.eop.read() and
             "VCI_MEM_CACHE ERROR in CC_RECEIVE : "
-            "CLEANUP command must have two flits");
+            "CLEANUP command must have two flits");*/
 
         cc_receive_to_cleanup_fifo_put = true;
-        r_cc_receive_fsm               = CC_RECEIVE_IDLE;
+        if(p_dspin_in.eop.read())
+          r_cc_receive_fsm               = CC_RECEIVE_IDLE;
 
         break;
@@ -7020 +7521 @@
                 (r_cas_fsm.read() == CAS_BC_UPT_LOCK))
           r_alloc_upt_fsm = ALLOC_UPT_CAS;
-
         else if(r_config_fsm.read() == CONFIG_DIR_UPT_LOCK) 
           r_alloc_upt_fsm = ALLOC_UPT_CONFIG;
-      }
+        else
+          m_cpt_upt_unused++;
+      }
+      else
+        m_cpt_multi_ack_fsm_upt_used++;
       break;
 
@@ -7046 +7550 @@
         else if(r_multi_ack_fsm.read() == MULTI_ACK_UPT_LOCK)
           r_alloc_upt_fsm = ALLOC_UPT_MULTI_ACK;
-      }
+
+        else
+          m_cpt_upt_unused++;
+      }
+      else
+        m_cpt_write_fsm_upt_used++;
       break;
 
@@ -7069 +7578 @@
                 (r_write_fsm.read() == WRITE_BC_UPT_LOCK))
           r_alloc_upt_fsm = ALLOC_UPT_WRITE;
-      }
+
+        else
+          m_cpt_upt_unused++;
+      }
+      else
+        m_cpt_xram_rsp_fsm_upt_used++;
       break;
 
@@ -7093 +7607 @@
         else if(r_xram_rsp_fsm.read() == XRAM_RSP_INVAL_LOCK)
           r_alloc_upt_fsm = ALLOC_UPT_XRAM_RSP;
-      }
+
+        else
+          m_cpt_upt_unused++;
+      }
+      else
+        m_cpt_cleanup_fsm_upt_used++;
       break;
 
@@ -7116 +7635 @@
         else if(r_cleanup_fsm.read() == CLEANUP_UPT_LOCK)
           r_alloc_upt_fsm = ALLOC_UPT_CLEANUP;
-      }
+
+        else
+          m_cpt_upt_unused++;
+      }
+      else
+        m_cpt_cas_fsm_upt_used++;
       break;
 
@@ -7189 +7713 @@
         else if(r_xram_rsp_fsm.read() == XRAM_RSP_DIR_LOCK)
           r_alloc_dir_fsm = ALLOC_DIR_XRAM_RSP;
-
+        
         else if(r_config_fsm.read() == CONFIG_DIR_REQ)
           r_alloc_dir_fsm = ALLOC_DIR_CONFIG;
-    }
-    break;
+        
+        else
+          m_cpt_dir_unused++;
+      }
+      else
+        m_cpt_read_fsm_dir_used++;
+      break;
 
     /////////////////////
@@ -7227 +7756 @@
         else if(r_read_fsm.read() == READ_DIR_REQ)
           r_alloc_dir_fsm = ALLOC_DIR_READ;
-    }
-    break;
+        
+        else
+          m_cpt_dir_unused++;
+      }
+      else
+        m_cpt_write_fsm_dir_used++;
+      break;
 
     ///////////////////
@@ -7263 +7797 @@
         else if(r_write_fsm.read() == WRITE_DIR_REQ)
           r_alloc_dir_fsm = ALLOC_DIR_WRITE;
-    }
+        
+        else
+          m_cpt_dir_unused++;
+      }
+      else
+        m_cpt_cas_fsm_dir_used++;
       break;
 
@@ -7287 +7826 @@
         else if(r_cas_fsm.read() == CAS_DIR_REQ)
           r_alloc_dir_fsm = ALLOC_DIR_CAS;
-    }
-    break;
+
+        else
+          m_cpt_dir_unused++;
+      }
+      else
+        m_cpt_cleanup_fsm_dir_used++;
+      break;
 
     ////////////////////////
@@ -7310 +7854 @@
         else if(r_cleanup_fsm.read() == CLEANUP_DIR_REQ)
           r_alloc_dir_fsm = ALLOC_DIR_CLEANUP;
-    }
-    break;
+
+        else
+          m_cpt_dir_unused++;
+      }
+      else
+        m_cpt_xram_rsp_fsm_dir_used++;
+      break;
 
   } // end switch alloc_dir_fsm
@@ -7345 +7894 @@
                 (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
           r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
-      }
+
+        else if (r_cleanup_fsm.read() == CLEANUP_IXR_REQ)
+          r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
+
+        else
+          m_cpt_trt_unused++;
+      }
+      else
+        m_cpt_read_fsm_trt_used++;
       break;
 
@@ -7365 +7922 @@
                 (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
           r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
+        
+        else if (r_cleanup_fsm.read() == CLEANUP_IXR_REQ)
+          r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
         else if(r_read_fsm.read() == READ_TRT_LOCK)
           r_alloc_trt_fsm = ALLOC_TRT_READ;
-      }
+
+        else
+          m_cpt_trt_unused++;
+      }
+      else
+        m_cpt_write_fsm_trt_used++;
       break;
 
@@ -7384 +7949 @@
                 (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
           r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
+        
+        else if (r_cleanup_fsm.read() == CLEANUP_IXR_REQ)
+          r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
         else if(r_read_fsm.read() == READ_TRT_LOCK)
@@ -7391 +7959 @@
                 (r_write_fsm.read() == WRITE_BC_TRT_LOCK))
           r_alloc_trt_fsm = ALLOC_TRT_WRITE;
-      }
+
+        else
+          m_cpt_trt_unused++;
+      }
+      else
+        m_cpt_cas_fsm_trt_used++;
       break;
 
@@ -7405 +7978 @@
             (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
           r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
+        
+        else if (r_cleanup_fsm.read() == CLEANUP_IXR_REQ)
+          r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
 
         else if(r_read_fsm.read() == READ_TRT_LOCK)
@@ -7416 +7992 @@
                 (r_cas_fsm.read() == CAS_BC_TRT_LOCK))
           r_alloc_trt_fsm = ALLOC_TRT_CAS;
-      }
+
+        else
+          m_cpt_trt_unused++;
+      }
+      else
+        m_cpt_xram_rsp_fsm_trt_used++;
       break;
 
@@ -7424 +8005 @@
           (r_ixr_rsp_fsm.read() != IXR_RSP_TRT_READ))
       {
+        
+        if (r_cleanup_fsm.read() == CLEANUP_IXR_REQ)
+          r_alloc_trt_fsm = ALLOC_TRT_CLEANUP;
+
+        else if(r_read_fsm.read() == READ_TRT_LOCK)
+          r_alloc_trt_fsm = ALLOC_TRT_READ;
+
+        else if((r_write_fsm.read() == WRITE_MISS_TRT_LOCK) ||
+                (r_write_fsm.read() == WRITE_BC_TRT_LOCK))
+          r_alloc_trt_fsm = ALLOC_TRT_WRITE;
+
+        else if((r_cas_fsm.read() == CAS_MISS_TRT_LOCK) ||
+                (r_cas_fsm.read() == CAS_BC_TRT_LOCK))
+          r_alloc_trt_fsm = ALLOC_TRT_CAS;
+
+        else if((r_xram_rsp_fsm.read()  == XRAM_RSP_DIR_LOCK) &&
+                (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
+          r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
+
+        else
+          m_cpt_trt_unused++;
+      }
+      else
+        m_cpt_ixr_fsm_trt_used++;
+      break;
+
+      ////////////////////////
+    case ALLOC_TRT_CLEANUP:
+      if(r_ixr_rsp_fsm.read() != CLEANUP_IXR_REQ)
+      {
         if(r_read_fsm.read() == READ_TRT_LOCK)
           r_alloc_trt_fsm = ALLOC_TRT_READ;
@@ -7438 +8049 @@
                 (r_alloc_dir_fsm.read() == ALLOC_DIR_XRAM_RSP))
           r_alloc_trt_fsm = ALLOC_TRT_XRAM_RSP;
+
+        else if((r_ixr_rsp_fsm.read() == IXR_RSP_TRT_ERASE) ||
+            (r_ixr_rsp_fsm.read() == IXR_RSP_TRT_READ))
+          r_alloc_trt_fsm = ALLOC_TRT_IXR_RSP;
       }
       break;
@@ -7488 +8103 @@
         else if(r_config_fsm.read() == CONFIG_HEAP_REQ)
           r_alloc_heap_fsm = ALLOC_HEAP_CONFIG;
-      }
+        else
+          m_cpt_heap_unused++;
+      }
+      else
+        m_cpt_read_fsm_heap_used++;
       break;
 
@@ -7511 +8130 @@
         else if(r_read_fsm.read() == READ_HEAP_REQ)
           r_alloc_heap_fsm = ALLOC_HEAP_READ;
-      }
+
+        else
+          m_cpt_heap_unused++;
+      }
+      else
+        m_cpt_write_fsm_heap_used++;
       break;
 
@@ -7534 +8158 @@
         else if(r_write_fsm.read() == WRITE_UPT_HEAP_LOCK)
           r_alloc_heap_fsm = ALLOC_HEAP_WRITE;
-      }
+
+        else
+          m_cpt_heap_unused++;
+      }
+      else
+        m_cpt_cas_fsm_heap_used++;
       break;
 
@@ -7558 +8187 @@
         else if(r_cas_fsm.read() == CAS_UPT_HEAP_LOCK)
           r_alloc_heap_fsm = ALLOC_HEAP_CAS;
-      }
+
+        else
+          m_cpt_heap_unused++;
+      }
+      else
+        m_cpt_cleanup_fsm_heap_used++;
       break;
 
@@ -7603 +8237 @@
         if(r_xram_rsp_fsm.read() == XRAM_RSP_HEAP_REQ)
           r_alloc_heap_fsm = ALLOC_HEAP_XRAM_RSP;
-      }
+        else
+          m_cpt_heap_unused++;
+      }
+      else
+        m_cpt_xram_rsp_fsm_heap_used++;
       break;
 
@@ -7663 +8301 @@
   ////////////////////////////////////////////////////////////////////////////////////
 
+/*
+  if(cc_receive_to_cleanup_fifo_put)
+  {
+    if(cc_receive_to_cleanup_fifo_get)
+    {
+      m_cc_receive_to_cleanup_fifo.put_and_get( ( (uint64_t)(p_dspin_in.eop.read() & 0x1 ) << 32 ) | p_dspin_in.data.read());
+    }
+    else // TODO PAS METTRE 32 en DUR !!!!
+    {
+      m_cc_receive_to_cleanup_fifo.simple_put( ( (uint64_t)(p_dspin_in.eop.read() & 0x1 ) << 32 ) | p_dspin_in.data.read());
+      //m_cc_receive_to_cleanup_fifo.simple_put(p_dspin_in.data.read());
+    }
+  }
+  else
+  {
+    if(cc_receive_to_cleanup_fifo_get)
+    {
+      m_cc_receive_to_cleanup_fifo.simple_get();
+    }
+  }
+*/
   m_cc_receive_to_cleanup_fifo.update( cc_receive_to_cleanup_fifo_get,
                                        cc_receive_to_cleanup_fifo_put, 
-                                       p_dspin_in.data.read() );
-
+                                       ( (uint64_t)(p_dspin_in.eop.read() & 0x1 ) << 32 ) | p_dspin_in.data.read() );
   ////////////////////////////////////////////////////////////////////////////////////
   //    CC_RECEIVE to MULTI_ACK FIFO
@@ -7814 +8472 @@
     p_vci_ixr.trdid     = r_xram_rsp_to_ixr_cmd_trdid.read();
     p_vci_ixr.eop       = (r_ixr_cmd_cpt == (m_words-2));
+  } 
+  /*ODCCP*/
+  else if (r_ixr_cmd_fsm.read() == IXR_CMD_CLEANUP_DATA)
+  {
+    p_vci_ixr.cmd     = vci_param_ext::CMD_WRITE;
+    p_vci_ixr.cmdval  = true;
+    p_vci_ixr.address = (addr_t)((r_cleanup_to_ixr_cmd_nline.read() * m_words + 
+                                    r_ixr_cmd_cpt.read()) * 4);
+    
+    if(r_cleanup_to_ixr_cmd_l1_dirty_ncc.read()) // if cleanup data contains data, we use cleanup_data buffer (cleanup dirty)
+    {
+      p_vci_ixr.wdata   = ((wide_data_t)(r_cleanup_to_ixr_cmd_data[r_ixr_cmd_cpt.read()].read()) | 
+          ((wide_data_t)(r_cleanup_to_ixr_cmd_data[r_ixr_cmd_cpt.read() + 1].read()) << 32));
+    }
+    else // if cleanup data doesnt contain data, we use xram_rsp_data buffer (cleanup not dirty)
+    {
+      p_vci_ixr.wdata   = ((wide_data_t)(r_xram_rsp_to_ixr_cmd_data[r_ixr_cmd_cpt.read()].read()) | 
+          ((wide_data_t)(r_xram_rsp_to_ixr_cmd_data[r_ixr_cmd_cpt.read() + 1].read()) << 32));
+    }
+
+    p_vci_ixr.trdid   = r_cleanup_to_ixr_cmd_trdid.read();
+    p_vci_ixr.eop     = (r_ixr_cmd_cpt == (m_words - 2));
   }
   else