Ignore:
Timestamp:
Aug 8, 2013, 4:17:35 PM (9 years ago)
Author:
haoliu
Message:

Optimization in the vci_cc_vcache_wrapper component:

In the icache and dcache fsm,
the cleanup request and the clack request can be handled in the same cycle
in the state miss_wait and miss_updt_dir.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/modules/vci_cc_vcache_wrapper/caba/source/src/vci_cc_vcache_wrapper.cpp

    r487 r488  
    16341634        if (m_ireq.valid) m_cost_ins_miss_frz++;
    16351635
    1636         // coherence clack interrupt
    1637         if ( r_icache_clack_req.read() )
    1638         {
    1639             r_icache_fsm = ICACHE_CC_CHECK;
    1640             r_icache_fsm_save = r_icache_fsm.read();
    1641             break;
    1642         }
    1643        
    16441636        // send cleanup victim request
    16451637        if ( r_icache_cleanup_victim_req.read() and not r_icache_cc_send_req.read() )
     
    16521644        }   
    16531645
     1646        // coherence clack interrupt
     1647        if ( r_icache_clack_req.read() )
     1648        {
     1649            r_icache_fsm = ICACHE_CC_CHECK;
     1650            r_icache_fsm_save = r_icache_fsm.read();
     1651            break;
     1652        }
     1653       
    16541654        // coherence interrupt
    16551655        if ( r_cc_receive_icache_req.read() and not r_icache_cc_send_req.read() and not r_icache_cleanup_victim_req.read() )
     
    17231723        if ( m_ireq.valid ) m_cost_ins_miss_frz++;
    17241724
    1725         // coherence clack interrupt
    1726         if ( r_icache_clack_req.read() )
    1727         {
    1728             r_icache_fsm = ICACHE_CC_CHECK;
    1729             r_icache_fsm_save = r_icache_fsm.read();
    1730             break;
    1731         }
    1732 
    17331725        // send cleanup victim request
    17341726        if ( r_icache_cleanup_victim_req.read() and not r_icache_cc_send_req.read() )
     
    17401732            r_icache_cleanup_victim_req = false;
    17411733        }   
     1734
     1735        // coherence clack interrupt
     1736        if ( r_icache_clack_req.read() )
     1737        {
     1738            r_icache_fsm = ICACHE_CC_CHECK;
     1739            r_icache_fsm_save = r_icache_fsm.read();
     1740            break;
     1741        }
    17421742
    17431743        // coherence interrupt
     
    41514151        if ( m_dreq.valid) m_cost_data_miss_frz++;
    41524152
    4153         // coherence clack request (from DSPIN CLACK)
    4154         if ( r_dcache_clack_req.read() )
    4155         {
    4156             r_dcache_fsm = DCACHE_CC_CHECK;
    4157             r_dcache_fsm_cc_save = r_dcache_fsm.read();
    4158             break;
    4159         }
    4160 
    41614153        // send cleanup victim request
    41624154        if ( r_dcache_cleanup_victim_req.read() and not r_dcache_cc_send_req.read() )
     
    41684160            r_dcache_cleanup_victim_req = false;
    41694161        }   
     4162
     4163        // coherence clack request (from DSPIN CLACK)
     4164        if ( r_dcache_clack_req.read() )
     4165        {
     4166            r_dcache_fsm = DCACHE_CC_CHECK;
     4167            r_dcache_fsm_cc_save = r_dcache_fsm.read();
     4168            break;
     4169        }
    41704170
    41714171        // coherence request (from CC_RECEIVE FSM)
     
    42844284        if ( m_dreq.valid) m_cost_data_miss_frz++;
    42854285
    4286         // coherence clack request (from DSPIN CLACK)
    4287         if ( r_dcache_clack_req.read() )
    4288         {
    4289             r_dcache_fsm = DCACHE_CC_CHECK;
    4290             r_dcache_fsm_cc_save = r_dcache_fsm.read();
    4291             break;
    4292         }
    4293 
    42944286        // send cleanup victim request
    42954287        if ( r_dcache_cleanup_victim_req.read() and not r_dcache_cc_send_req.read() )
     
    43014293            r_dcache_cleanup_victim_req = false;
    43024294        }   
     4295
     4296        // coherence clack request (from DSPIN CLACK)
     4297        if ( r_dcache_clack_req.read() )
     4298        {
     4299            r_dcache_fsm = DCACHE_CC_CHECK;
     4300            r_dcache_fsm_cc_save = r_dcache_fsm.read();
     4301            break;
     4302        }
    43034303
    43044304        // coherence request (from CC_RECEIVE FSM)
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