Changeset 549 for trunk/modules/vci_iox_network/caba/source/src/vci_iox_network.cpp

Timestamp:

Oct 17, 2013, 8:50:46 PM (11 years ago)

Author:

alain

Message:

Compliance with mapping_table defined in release 2462
Introducing the dspin_router_tsar component used in tsar_generic_iob
platform to implement the RAM networt (between L2 & L3).

File:

• trunk/modules/vci_iox_network/caba/source/src/vci_iox_network.cpp (modified) (5 diffs)

trunk/modules/vci_iox_network/caba/source/src/vci_iox_network.cpp

@@ -26 +26 @@
  */
 
+////////////////////////////////////////////////////////////////////////////////
+// This component emulates an external IO bus such as PCIe or Hypertransport,
+// but respect the VCI protocol. It can be attached to one OR SEVERAL clusters,
+// using a vci_io_bridge component.
+// It is considered as a local interconnect, for the ADDRESS or SRCID
+// decoding tables: 
+// - the CMD routing_table decodes the local field of the VCI ADDRESS 
+//   to return the local target port
+// - The RSP routing_table decodes the local field of the VCI SRCID
+//   to return the initator port 
+// It is implemented as two independant crossbars, for VCI commands and 
+// VCI responses respectively.
+// - The CMD crossbar has nb_ini input ports, and nb_tgt output ports,
+//   including the ports to the vci_io_bridge component(s).
+// - The RSP crossbar has nb_tgt input ports, and nb_ini output ports.
+//   including the ports to the vci_io_bridge component(s).
+// For both crossbars, output ports allocation policy is round robin.
+////////////////////////////////////////////////////////////////////////////////
+
 #include <systemc>
 #include <cassert>
@@ -50 +69 @@
     typedef typename pkt_t::output_port_t   output_port_t;
 
-    const bool                              m_is_cmd;         // CMD XBAR if true
-    const size_t                                    m_inputs;         // number of inputs 
-    const size_t                                    m_outputs;        // number of outputs 
-    AddressDecodingTable<uint64_t,size_t>*  m_rt;             // pointer on routing table (CMD or RSP)
-
-    sc_signal<bool>*                            r_out_allocated;  // for each output: allocation state 
-    sc_signal<size_t>*                          r_out_origin;     // for each output: input port index
-    sc_signal<bool>*                            r_in_allocated;   // for each input: allocation state 
-    sc_signal<size_t>*                          r_in_dest;        // for each input: output port index
+    const bool            m_is_cmd;         // CMD XBAR if true
+    const size_t                  m_inputs;         // number of inputs 
+    const size_t                  m_outputs;        // number of outputs 
+    void*                 m_rt;             // pointer on routing table (CMD or RSP)
+
+    sc_signal<bool>*      r_out_allocated;  // for each output: allocation state 
+    sc_signal<size_t>*    r_out_origin;     // for each output: input port index
+    sc_signal<bool>*      r_in_allocated;   // for each input: allocation state 
+    sc_signal<size_t>*    r_in_dest;        // for each input: output port index
 
 public:
     ///////////////////////
-    IoXbar( bool                                    is_cmd, 
-            size_t                                  nb_inputs,
-            size_t                                  nb_outputs,
-                AddressDecodingTable<uint64_t,size_t>*  rt )
+    IoXbar( bool   is_cmd, 
+            size_t nb_inputs,
+            size_t nb_outputs,
+                void*  rt )
         : m_is_cmd( is_cmd ),
       m_inputs( nb_inputs ),
@@ -150 +169 @@
                         if ( m_is_cmd ) 
                         {
-                            req = ((AddressDecodingTable<uint64_t,size_t>*)m_rt)->get_value( 
-                                   (uint64_t)(input_port[in]->address.read()) ); 
+                            AddressDecodingTable<uint64_t, size_t>* rt = 
+                               (AddressDecodingTable<uint64_t, size_t>*)m_rt;
+                            req = rt->get_value((uint64_t)(input_port[in]->address.read())); 
                         }
                         else            
                         {
-                            req = ((AddressDecodingTable<uint64_t,size_t>*)m_rt)->get_value( 
-                                   (uint64_t)(input_port[in]->rsrcid.read()) ); 
+                            AddressDecodingTable<uint32_t, size_t>* rt = 
+                               (AddressDecodingTable<uint32_t, size_t>*)m_rt;
+                            req = rt->get_value((uint32_t)(input_port[in]->rsrcid.read())); 
                         }
                         // allocate the output port if requested
@@ -260 +281 @@
 tmpl(/**/)::VciIoxNetwork( sc_core::sc_module_name             name,
                                const soclib::common::MappingTable  &mt,
-                           size_t                              cluster_id,
                                            size_t                              nb_tgt,
                                            size_t                              nb_ini )
@@ -274 +294 @@
            m_nb_ini( nb_ini ),
 
-           m_cmd_rt( mt.getPortidFromAddress(cluster_id) ),
-           m_rsp_rt( mt.getPortidFromSrcid(cluster_id) )
+           m_cmd_rt( mt.getLocalIndexFromAddress(0) ),
+           m_rsp_rt( mt.getLocalIndexFromSrcid(0) )
 {
     std::cout << "    Building VciIoxNetwork : " << name << std::endl;