Changeset 549 for trunk/modules/vci_mem_cache
- Timestamp:
- Oct 17, 2013, 8:50:46 PM (11 years ago)
- Location:
- trunk/modules/vci_mem_cache/caba/source
- Files:
-
- 3 edited
-
include/vci_mem_cache.h (modified) (1 diff)
-
include/xram_transaction.h (modified) (5 diffs)
-
src/vci_mem_cache.cpp (modified) (5 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/modules/vci_mem_cache/caba/source/include/vci_mem_cache.h
r535 r549 516 516 517 517 void print_stats(bool activity_counters, bool stats); 518 void print_trace( );518 void print_trace( size_t detailed = 0 ); 519 519 void cache_monitor(addr_t addr); 520 520 void start_monitor(addr_t addr, addr_t length); -
trunk/modules/vci_mem_cache/caba/source/include/xram_transaction.h
r489 r549 29 29 bool proc_read; // read request from processor 30 30 size_t read_length; // length of the read (for the response) 31 size_t word_index; // index of the first read word (for theresponse)31 size_t word_index; // index of the first read word (for response) 32 32 std::vector<data_t> wdata; // write buffer (one cache line) 33 33 std::vector<be_t> wdata_be; // be for each data in the write buffer … … 48 48 ///////////////////////////////////////////////////////////////////// 49 49 // The alloc() function initializes the vectors of an entry 50 // Its arguments are : 51 // - n_words : number of words per line in the cache 50 // The "n_words" argument is the number of words in a cache line. 52 51 ///////////////////////////////////////////////////////////////////// 53 52 void alloc(size_t n_words) … … 64 63 //////////////////////////////////////////////////////////////////// 65 64 // The copy() function copies an existing entry 66 // Its arguments are :67 // - source : the transaction tab entry to copy68 65 //////////////////////////////////////////////////////////////////// 69 66 void copy(const TransactionTabEntry &source) … … 86 83 87 84 //////////////////////////////////////////////////////////////////// 88 // The print() function prints the entry 89 //////////////////////////////////////////////////////////////////// 90 void print() 91 { 92 std::cout << "------- TRT entry -------" << std::endl; 93 std::cout << "valid = " << valid << std::endl; 94 std::cout << "xram_read = " << xram_read << std::endl; 95 std::cout << "nline = " << std::hex << nline << std::endl; 96 std::cout << "srcid = " << srcid << std::endl; 97 std::cout << "trdid = " << trdid << std::endl; 98 std::cout << "pktid = " << pktid << std::endl; 99 std::cout << "proc_read = " << proc_read << std::endl; 100 std::cout << "read_length = " << read_length << std::endl; 101 std::cout << "word_index = " << word_index << std::endl; 102 for(size_t i=0; i<wdata_be.size() ; i++) 103 { 104 std::cout << "wdata_be[" << std::dec << i << "] = " 105 << std::hex << wdata_be[i] << std::endl; 106 } 107 for(size_t i=0; i<wdata.size() ; i++) 108 { 109 std::cout << "wdata[" << std::dec << i << "] = " 110 << std::hex << wdata[i] << std::endl; 111 } 112 std::cout << "rerror = " << rerror << std::endl; 113 std::cout << "ll_key = " << ll_key << std::endl; 114 std::cout << "config = " << config << std::endl; 115 std::cout << std::endl; 85 // The print() function prints the entry identified by "index". 86 //////////////////////////////////////////////////////////////////// 87 void print( size_t index, size_t mode ) 88 { 89 std::cout << " TRT[" << std::dec << index << "] " 90 << " valid = " << valid 91 << " / error = " << rerror 92 << " / get = " << xram_read 93 << " / config = " << config << std::hex 94 << " / address = " << nline*4*wdata.size() 95 << " / srcid = " << srcid << std::endl; 96 if ( mode ) 97 { 98 std::cout << " trdid = " << trdid 99 << " / pktid = " << pktid << std::dec 100 << " / proc_read = " << proc_read 101 << " / read_length = " << read_length 102 << " / word_index = " << word_index << std::hex 103 << " / ll_key = " << ll_key << std::endl; 104 std::cout << " wdata = "; 105 for(size_t i=0; i<wdata.size() ; i++) 106 { 107 std::cout << std::hex << wdata[i] << " / "; 108 } 109 std::cout << std::endl; 110 } 116 111 } 117 112 … … 228 223 } 229 224 ///////////////////////////////////////////////////////////////////// 230 // The print() function prints a transaction tab entry 231 // Arguments : 232 // - index : the index of the entry to print 233 ///////////////////////////////////////////////////////////////////// 234 void print(const size_t index) 235 { 236 assert( (index < size_tab) and 237 "MEMC ERROR: The selected entry is out of range in TRT write_data_mask()"); 238 239 tab[index].print(); 240 return; 225 // The print() function prints TRT content. 226 // Detailed content if detailed argument is non zero. 227 ///////////////////////////////////////////////////////////////////// 228 void print( size_t detailed = 0 ) 229 { 230 std::cout << " < TRT content in " << tab_name << " >" << std::endl; 231 for ( size_t id = 0 ; id < size_tab ; id++ ) 232 { 233 tab[id].print( id , detailed ); 234 } 241 235 } 242 236 ///////////////////////////////////////////////////////////////////// -
trunk/modules/vci_mem_cache/caba/source/src/vci_mem_cache.cpp
r537 r549 654 654 655 655 ////////////////////////////////////////////////// 656 tmpl(void)::print_trace( )656 tmpl(void)::print_trace( size_t detailed ) 657 657 ////////////////////////////////////////////////// 658 658 { … … 676 676 << " | " << alloc_ivt_fsm_str[r_alloc_ivt_fsm.read()] 677 677 << " | " << alloc_heap_fsm_str[r_alloc_heap_fsm.read()] << std::endl; 678 679 if ( detailed ) m_trt.print(0); 678 680 } 679 681 … … 4011 4013 4012 4014 assert( ((p_vci_ixr.rerror.read() & 0x1) == 0) and 4013 4015 "MEMC ERROR in IXR_RSP state: XRAM response error !"); 4014 4016 4015 4017 if (p_vci_ixr.reop.read()) // PUT … … 4018 4020 4019 4021 #if DEBUG_MEMC_IXR_RSP 4020 4021 4022 4022 if (m_debug) 4023 std::cout << " <MEMC " << name() 4024 << " IXR_RSP_IDLE> Response from XRAM to a put transaction" << std::endl; 4023 4025 #endif 4024 4026 } … … 4028 4030 4029 4031 #if DEBUG_MEMC_IXR_RSP 4030 4031 4032 4033 #endif 4034 } 4035 } 4036 break; 4037 } 4038 4032 if (m_debug) 4033 std::cout << " <MEMC " << name() 4034 << " IXR_RSP_IDLE> Response from XRAM to a get transaction" << std::endl; 4035 #endif 4036 } 4037 } 4038 break; 4039 } 4040 //////////////////////// 4039 4041 case IXR_RSP_TRT_ERASE: // erase the entry in the TRT 4040 // decrease the line counter if config request 4041 { 4042 if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) 4043 { 4044 size_t index = r_ixr_rsp_trt_index.read(); 4045 if (m_trt.is_config(index)) r_config_rsp_lines = r_config_rsp_lines.read() - 1; 4046 m_trt.erase(index); 4042 // decrease the line counter if config request 4043 { 4044 if (r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) 4045 { 4046 size_t index = r_ixr_rsp_trt_index.read(); 4047 if (m_trt.is_config(index)) 4048 r_config_rsp_lines = r_config_rsp_lines.read() - 1; 4049 m_trt.erase(index); 4050 r_ixr_rsp_fsm = IXR_RSP_IDLE; 4051 4052 #if DEBUG_MEMC_IXR_RSP 4053 if (m_debug) 4054 std::cout << " <MEMC " << name() << " IXR_RSP_TRT_ERASE> Erase TRT entry " 4055 << r_ixr_rsp_trt_index.read() << std::endl; 4056 #endif 4057 } 4058 break; 4059 } 4060 ////////////////////// 4061 case IXR_RSP_TRT_READ: // write a 64 bits data word in TRT 4062 { 4063 if ((r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) and p_vci_ixr.rspval) 4064 { 4065 size_t index = r_ixr_rsp_trt_index.read(); 4066 size_t word = r_ixr_rsp_cpt.read(); 4067 bool eop = p_vci_ixr.reop.read(); 4068 wide_data_t data = p_vci_ixr.rdata.read(); 4069 bool error = ((p_vci_ixr.rerror.read() & 0x1) == 1); 4070 4071 assert(((eop == (word == (m_words-2))) or error) and 4072 "MEMC ERROR in IXR_RSP_TRT_READ state : invalid response from XRAM"); 4073 4074 m_trt.write_rsp( index, word, data ); 4075 4076 r_ixr_rsp_cpt = word + 2; 4077 4078 if (eop ) 4079 { 4080 r_ixr_rsp_to_xram_rsp_rok[r_ixr_rsp_trt_index.read()] = true; 4047 4081 r_ixr_rsp_fsm = IXR_RSP_IDLE; 4082 } 4048 4083 4049 4084 #if DEBUG_MEMC_IXR_RSP 4050 if (m_debug) 4051 std::cout << " <MEMC " << name() << " IXR_RSP_TRT_ERASE> Erase TRT entry " 4052 << r_ixr_rsp_trt_index.read() << std::endl; 4053 #endif 4054 } 4055 break; 4056 } 4057 ////////////////////// 4058 case IXR_RSP_TRT_READ: // write a 64 bits data word in TRT 4059 { 4060 if ((r_alloc_trt_fsm.read() == ALLOC_TRT_IXR_RSP) and p_vci_ixr.rspval) 4061 { 4062 size_t index = r_ixr_rsp_trt_index.read(); 4063 size_t word = r_ixr_rsp_cpt.read(); 4064 bool eop = p_vci_ixr.reop.read(); 4065 wide_data_t data = p_vci_ixr.rdata.read(); 4066 bool error = ((p_vci_ixr.rerror.read() & 0x1) == 1); 4067 4068 assert(((eop == (word == (m_words-2))) or error) and 4069 "MEMC ERROR in IXR_RSP_TRT_READ state : invalid response from XRAM"); 4070 4071 m_trt.write_rsp( index, 4072 word, 4073 data ); 4074 4075 r_ixr_rsp_cpt = word + 2; 4076 4077 if (eop ) 4078 { 4079 r_ixr_rsp_to_xram_rsp_rok[r_ixr_rsp_trt_index.read()] = true; 4080 r_ixr_rsp_fsm = IXR_RSP_IDLE; 4081 } 4082 4083 #if DEBUG_MEMC_IXR_RSP 4084 if (m_debug) 4085 std::cout << " <MEMC " << name() << " IXR_RSP_TRT_READ> Writing 2 words in TRT : " 4086 << " index = " << std::dec << index 4087 << " / word = " << word 4088 << " / data = " << std::hex << data << std::endl; 4089 #endif 4090 } 4091 break; 4092 } 4085 if (m_debug) 4086 std::cout << " <MEMC " << name() << " IXR_RSP_TRT_READ> Writing 2 words in TRT : " 4087 << " index = " << std::dec << index 4088 << " / word = " << word 4089 << " / data = " << std::hex << data << std::endl; 4090 #endif 4091 } 4092 break; 4093 } 4093 4094 } // end swich r_ixr_rsp_fsm 4094 4095
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